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authorTom Rini <trini@ti.com>2015-06-05 15:51:11 +0530
committerTom Rini <trini@konsulko.com>2015-06-15 10:57:26 -0400
commit7c352cd38d0ad7a25f98592182704667dfde37a8 (patch)
treeab155ec66d04a7a7e7096cb41fdf1eeaa1d200bb /arch/arm/cpu/armv7/omap5
parent37be54fd1351a177c061c2c351ffdd53efaebb59 (diff)
downloadtalos-obmc-uboot-7c352cd38d0ad7a25f98592182704667dfde37a8.tar.gz
talos-obmc-uboot-7c352cd38d0ad7a25f98592182704667dfde37a8.zip
am33xx: Re-enable SW levelling for DDR2
The recent changes for hw leveling on am33xx were not intended for DDR2 boards, only DDR3. Update emif_sdram_type to take a sdram_config value to check against. This lets us pass in the value we would use to configure, when we have not yet configured the board yet. In other cases update the call to be as functional as before and check an already programmed value in. Tested-by: Yan Liu <yan-liu@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'arch/arm/cpu/armv7/omap5')
-rw-r--r--arch/arm/cpu/armv7/omap5/hwinit.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c b/arch/arm/cpu/armv7/omap5/hwinit.c
index 222540f9c1..39f8d0d5e2 100644
--- a/arch/arm/cpu/armv7/omap5/hwinit.c
+++ b/arch/arm/cpu/armv7/omap5/hwinit.c
@@ -122,6 +122,7 @@ static void io_settings_ddr3(void)
void do_io_settings(void)
{
u32 io_settings = 0, mask = 0;
+ struct emif_reg_struct *emif = (struct emif_reg_struct *)EMIF1_BASE;
/* Impedance settings EMMC, C2C 1,2, hsi2 */
mask = (ds_mask << 2) | (ds_mask << 8) |
@@ -177,7 +178,7 @@ void do_io_settings(void)
(sc_fast << 17) | (sc_fast << 14);
writel(io_settings, (*ctrl)->control_smart3io_padconf_1);
- if (emif_sdram_type() == EMIF_SDRAM_TYPE_LPDDR2)
+ if (emif_sdram_type(emif->emif_sdram_config) == EMIF_SDRAM_TYPE_LPDDR2)
io_settings_lpddr2();
else
io_settings_ddr3();
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