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author | Wu, Josh <Josh.wu@atmel.com> | 2015-07-27 11:40:17 +0800 |
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committer | Tom Rini <trini@konsulko.com> | 2015-08-12 20:47:48 -0400 |
commit | 633b6ccedf9d536fd93299b2207a5227dedd987c (patch) | |
tree | 1fca53c6a3d3ed616fa172e68b2ae78c0b074d7a /arch/arm/cpu/arm926ejs | |
parent | 387871a10edc777a5d94bfdbd6b86e493991826e (diff) | |
download | talos-obmc-uboot-633b6ccedf9d536fd93299b2207a5227dedd987c.tar.gz talos-obmc-uboot-633b6ccedf9d536fd93299b2207a5227dedd987c.zip |
ARM: cache: implement a default weak flush_cache() function
Current many cpu use the same flush_cache() function, which just call
the flush_dcache_range().
So implement a weak flush_cache() for all the cpus to use.
In original weak flush_cache() in arch/arm/lib/cache.c, there has some
code for ARM1136 & ARM926ejs. But in the arch/arm/cpu/arm1136/cpu.c and
arch/arm/cpu/arm926ejs/cache.c, there implements a real flush_cache()
function as well. That means the original code for ARM1136 & ARM926ejs
in weak flush_cache() of arch/arm/lib/cache.c is totally useless.
So in this patch remove such code in flush_cache() and only call
flush_dcache_range().
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Diffstat (limited to 'arch/arm/cpu/arm926ejs')
-rw-r--r-- | arch/arm/cpu/arm926ejs/cache.c | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c index 99d1a139b0..e5c1a6ae6c 100644 --- a/arch/arm/cpu/arm926ejs/cache.c +++ b/arch/arm/cpu/arm926ejs/cache.c @@ -69,11 +69,6 @@ void flush_dcache_range(unsigned long start, unsigned long stop) asm volatile("mcr p15, 0, %0, c7, c10, 4\n" : : "r"(0)); } - -void flush_cache(unsigned long start, unsigned long size) -{ - flush_dcache_range(start, start + size); -} #else /* #ifndef CONFIG_SYS_DCACHE_OFF */ void invalidate_dcache_all(void) { @@ -82,10 +77,6 @@ void invalidate_dcache_all(void) void flush_dcache_all(void) { } - -void flush_cache(unsigned long start, unsigned long size) -{ -} #endif /* #ifndef CONFIG_SYS_DCACHE_OFF */ /* |