diff options
| author | Alexey Brodkin <abrodkin@synopsys.com> | 2015-01-13 18:35:46 +0300 |
|---|---|---|
| committer | Alexey Brodkin <abrodkin@synopsys.com> | 2015-02-13 09:17:51 +0300 |
| commit | f13606b77d32344d35f6430eb45cffd47302e244 (patch) | |
| tree | 51f37e30744315357efdec447a3ccb2d11ef56f0 /arch/arc/include | |
| parent | bd2a4888b123713adec271d6c8040ca9f609aa2f (diff) | |
| download | talos-obmc-uboot-f13606b77d32344d35f6430eb45cffd47302e244.tar.gz talos-obmc-uboot-f13606b77d32344d35f6430eb45cffd47302e244.zip | |
arc: introduce U-Boot port for ARCv2 ISA
ARC HS and ARC EM are new cores based on ARCv2 ISA which is binary
incompatible with ISAv1 (AKA ARCompact).
Significant difference between ISAv2 and v1 is implementation of
interrupt vector table.
In v1 it is implemented in the same way as on many other architectures -
as a special location where user may put whether code executed in place
(if machine word of space is enough) or jump to a full-scale interrupt
handler.
In v2 interrupt table is just an array of adresses of real interrupt
handlers. That requires a separate section for IVT that is not encoded
as code by assembler.
This change adds support for following cores:
* ARC EM6 (simple 32-bit microcontroller without MMU)
* ARC HS36 (advanced 32-bit microcontroller without MMU)
* ARC HS38 (advanced 32-bit microcontroller with MMU)
As a part of ARC HS38 new version of MMU (v4) was introduced.
Also this change adds AXS131 board which is the same DW ARC SDP base board but
with ARC HS38 CPU tile.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Diffstat (limited to 'arch/arc/include')
| -rw-r--r-- | arch/arc/include/asm/cache.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h index 2725961221..8a77cd93af 100644 --- a/arch/arc/include/asm/cache.h +++ b/arch/arc/include/asm/cache.h @@ -17,10 +17,14 @@ #define ARCH_DMA_MINALIGN 128 #endif -#if defined(CONFIG_ARC_MMU_V2) +#if defined(ARC_MMU_ABSENT) +#define CONFIG_ARC_MMU_VER 0 +#elif defined(CONFIG_ARC_MMU_V2) #define CONFIG_ARC_MMU_VER 2 #elif defined(CONFIG_ARC_MMU_V3) #define CONFIG_ARC_MMU_VER 3 +#elif defined(CONFIG_ARC_MMU_V4) +#define CONFIG_ARC_MMU_VER 4 #endif #endif /* __ASM_ARC_CACHE_H */ |
