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authorIgor Guryanov <guryanov@synopsys.com>2014-12-24 17:17:11 +0300
committerAlexey Brodkin <abrodkin@synopsys.com>2015-01-15 22:38:42 +0300
commit20a58ac0d8e09d0bf1a74c6b68fea22784512b51 (patch)
treedf909ca56ce3685deec112fdda3e723e77c09262 /arch/arc/Makefile
parentdcb431e723f132d0df63fb1e711042a6bbfc3a6a (diff)
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arc: introduce separate section for interrupt vector table
Even though existing implementation works fine in preparation to submission of ARCv2 architecture we need this change. In case of ARCv2 interrupt vector table consists of just addresses of corresponding handlers. And if those addresses will be in .text section then assembler will encode them as everything in .text section as middle-endian and then on real execution CPU will read swapped addresses and will jump into the wild. Once introduced new section is situated so .text section remains the first which allows us to use common linker option for linking everything to a specified CONFIG_SYS_TEXT_BASE. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Igor Guryanov <guryanov@synopsys.com>
Diffstat (limited to 'arch/arc/Makefile')
-rw-r--r--arch/arc/Makefile2
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arc/Makefile b/arch/arc/Makefile
index 03ea6dbae0..a59231e70e 100644
--- a/arch/arc/Makefile
+++ b/arch/arc/Makefile
@@ -2,8 +2,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
-head-y := arch/arc/cpu/$(CPU)/start.o
-
libs-y += arch/arc/cpu/$(CPU)/
libs-y += arch/arc/lib/
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