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authorYork Sun <yorksun@freescale.com>2015-03-20 10:20:40 -0700
committerYork Sun <yorksun@freescale.com>2015-04-23 08:55:53 -0700
commitf8cb101e1e3f5ee2007b78b6b12e24120385aeac (patch)
tree7c7f6856d036f7f873b672143a4c2266d98f392c /README
parent585acc9de65554e2d77dc3d30a65d59b8766ba39 (diff)
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driver/i2c/mxc: Enable I2C bus 3 and 4
Some SoCs have more than two I2C busses. Instead of adding ifdef to the driver, macros are put into board header file where CONFIG_SYS_I2C_MXC is defined. Signed-off-by: York Sun <yorksun@freescale.com> CC: Heiko Schocher <hs@denx.de>
Diffstat (limited to 'README')
-rw-r--r--README2
1 files changed, 2 insertions, 0 deletions
diff --git a/README b/README
index fc1fd52..d33f3b5 100644
--- a/README
+++ b/README
@@ -2395,6 +2395,8 @@ CBFS (Coreboot Filesystem) support
- define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
If those defines are not set, default value is 100000
for speed, and 0 for slave.
+ - enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3
+ - enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4
- drivers/i2c/rcar_i2c.c:
- activate this driver with CONFIG_SYS_I2C_RCAR
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