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authorYork Sun <yorksun@freescale.com>2015-03-19 09:30:28 -0700
committerYork Sun <yorksun@freescale.com>2015-04-23 08:55:53 -0700
commit4516ff816084605990115d127df97950c23e389c (patch)
tree10c3c0f7de5a6feddd5a6e14d940ad2f70411ff0 /README
parent6b95be228024c7d15b9164b59187ef02333bb0c8 (diff)
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driver/ddr/fsl: Add built-in memory test for DDR4 driver
Add built-in memory test to catch errors after DDR is initialized, before any other transactions. To enable this test, define CONFIG_FSL_DDR_BIST. An environmental variable "ddr_bist" is checked before starting test. It takes a while (several seconds) depending on system memory size. Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'README')
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diff --git a/README b/README
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--- a/README
+++ b/README
@@ -4884,6 +4884,9 @@ Low Level (hardware related) configuration options:
- CONFIG_FSL_DDR_SYNC_REFRESH
Enable sync of refresh for multiple controllers.
+- CONFIG_FSL_DDR_BIST
+ Enable built-in memory test for Freescale DDR controllers.
+
- CONFIG_SYS_83XX_DDR_USES_CS0
Only for 83xx systems. If specified, then DDR should
be configured using CS0 and CS1 instead of CS2 and CS3.
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