diff options
| author | Simon Glass <sjg@chromium.org> | 2016-05-05 07:28:06 -0600 |
|---|---|---|
| committer | Andreas Bießmann <andreas@biessmann.org> | 2016-06-12 23:49:38 +0200 |
| commit | b5bd09820c79dc92b3e5fb5be4b47ce22c731443 (patch) | |
| tree | 6a5fe76224aed2accdc889e21ae4f5d91c31d4bd /README | |
| parent | 909584665546ec51c54ac7d362f91fdabaef2cc2 (diff) | |
| download | talos-obmc-uboot-b5bd09820c79dc92b3e5fb5be4b47ce22c731443.tar.gz talos-obmc-uboot-b5bd09820c79dc92b3e5fb5be4b47ce22c731443.zip | |
arm: Allow skipping of low-level init with I-cache on
At present CONFIG_SKIP_LOWLEVEL_INIT prevents U-Boot from calling
lowlevel_init(). This means that the instruction cache is not enabled and
the board runs very slowly.
What is really needed in many cases is to skip the call to lowlevel_init()
but still perform CP15 init. Add an option to handle this.
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested-on: smartweb, corvus, taurus, axm
Tested-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
Diffstat (limited to 'README')
| -rw-r--r-- | README | 5 |
1 files changed, 5 insertions, 0 deletions
@@ -4824,6 +4824,11 @@ Low Level (hardware related) configuration options: other boot loader or by a debugger which performs these initializations itself. +- CONFIG_SKIP_LOWLEVEL_INIT_ONLY + [ARM926EJ-S only] This allows just the call to lowlevel_init() + to be skipped. The normal CPU15 init (such as enabling the + instruction cache) is still performed. + - CONFIG_SPL_BUILD Modifies the behaviour of start.S when compiling a loader that is executed before the actual U-Boot. E.g. when |
