diff options
| author | York Sun <yorksun at freescale.com> | 2015-05-28 14:54:09 +0530 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2015-07-20 11:44:35 -0700 |
| commit | fc7b3855e1c285e59487699d898f4415a8f62c05 (patch) | |
| tree | 5bac1e8fa4d3570beba1815d6eb03e79bbf40b4b | |
| parent | b92557cd3f37538fbd813e72f447109cbde4ff87 (diff) | |
| download | talos-obmc-uboot-fc7b3855e1c285e59487699d898f4415a8f62c05.tar.gz talos-obmc-uboot-fc7b3855e1c285e59487699d898f4415a8f62c05.zip | |
armv8/ls2085ardb: Fix SPD address error on early boards
Board rev C and earlier has duplicated SPD address on 2nd DDR
controller slots. It is fixed on rev D and later. SPD addresses
need to be updated accordingly.
Signed-off-by: York Sun <yorksun at freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
| -rw-r--r-- | board/freescale/ls2085ardb/ls2085ardb.c | 19 | ||||
| -rw-r--r-- | include/configs/ls2085ardb.h | 4 |
2 files changed, 21 insertions, 2 deletions
diff --git a/board/freescale/ls2085ardb/ls2085ardb.c b/board/freescale/ls2085ardb/ls2085ardb.c index 5f25328021..abe2114e17 100644 --- a/board/freescale/ls2085ardb/ls2085ardb.c +++ b/board/freescale/ls2085ardb/ls2085ardb.c @@ -273,3 +273,22 @@ void qixis_dump_switch(void) printf("SW%d = (0x%02x)\n", i, QIXIS_READ(cms[1])); } } + +/* + * Board rev C and earlier has duplicated I2C addresses for 2nd controller. + * Both slots has 0x54, resulting 2nd slot unusable. + */ +void update_spd_address(unsigned int ctrl_num, + unsigned int slot, + unsigned int *addr) +{ + u8 sw; + + sw = QIXIS_READ(arch); + if ((sw & 0xf) < 0x3) { + if (ctrl_num == 1 && slot == 0) + *addr = SPD_EEPROM_ADDRESS4; + else if (ctrl_num == 1 && slot == 1) + *addr = SPD_EEPROM_ADDRESS3; + } +} diff --git a/include/configs/ls2085ardb.h b/include/configs/ls2085ardb.h index ccb85d0179..ec103935a2 100644 --- a/include/configs/ls2085ardb.h +++ b/include/configs/ls2085ardb.h @@ -28,8 +28,8 @@ unsigned long get_board_sys_clk(void); #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 -#define SPD_EEPROM_ADDRESS3 0x54 -#define SPD_EEPROM_ADDRESS4 0x53 /* Board error */ +#define SPD_EEPROM_ADDRESS3 0x53 +#define SPD_EEPROM_ADDRESS4 0x54 #define SPD_EEPROM_ADDRESS5 0x55 #define SPD_EEPROM_ADDRESS6 0x56 /* dummy address */ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 |
