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| author | Heiko Schocher <hs@denx.de> | 2015-05-18 10:56:24 +0200 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2015-05-26 14:16:54 +0200 |
| commit | 21a26940f9048e668f9a79f64b802406b2e8d18c (patch) | |
| tree | 69ad60b6af602381609ecfc3760755757031dc20 | |
| parent | ab87fc6bbd80f4e702e7dde102b1c74f0f4678b3 (diff) | |
| download | talos-obmc-uboot-21a26940f9048e668f9a79f64b802406b2e8d18c.tar.gz talos-obmc-uboot-21a26940f9048e668f9a79f64b802406b2e8d18c.zip | |
arm, imx6, i2c: add I2C4 for MX6DL
add I2C4 modul for MX6DL based boards.
Signed-off-by: Heiko Schocher <hs@denx.de>
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/clock.c | 33 | ||||
| -rw-r--r-- | arch/arm/imx-common/i2c-mxv7.c | 5 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/crm_regs.h | 2 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/imx-regs.h | 1 | ||||
| -rw-r--r-- | drivers/i2c/mxc_i2c.c | 3 |
5 files changed, 32 insertions, 12 deletions
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index 055f44e8e4..ae99945304 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -140,23 +140,34 @@ int enable_usdhc_clk(unsigned char enable, unsigned bus_num) #endif #ifdef CONFIG_SYS_I2C_MXC -/* i2c_num can be from 0 - 2 */ +/* i2c_num can be from 0 - 3 */ int enable_i2c_clk(unsigned char enable, unsigned i2c_num) { u32 reg; u32 mask; - if (i2c_num > 2) + if (i2c_num > 3) return -EINVAL; - - mask = MXC_CCM_CCGR_CG_MASK - << (MXC_CCM_CCGR2_I2C1_SERIAL_OFFSET + (i2c_num << 1)); - reg = __raw_readl(&imx_ccm->CCGR2); - if (enable) - reg |= mask; - else - reg &= ~mask; - __raw_writel(reg, &imx_ccm->CCGR2); + if (i2c_num < 3) { + mask = MXC_CCM_CCGR_CG_MASK + << (MXC_CCM_CCGR2_I2C1_SERIAL_OFFSET + + (i2c_num << 1)); + reg = __raw_readl(&imx_ccm->CCGR2); + if (enable) + reg |= mask; + else + reg &= ~mask; + __raw_writel(reg, &imx_ccm->CCGR2); + } else { + mask = MXC_CCM_CCGR_CG_MASK + << (MXC_CCM_CCGR1_I2C4_SERIAL_OFFSET); + reg = __raw_readl(&imx_ccm->CCGR1); + if (enable) + reg |= mask; + else + reg &= ~mask; + __raw_writel(reg, &imx_ccm->CCGR1); + } return 0; } #endif diff --git a/arch/arm/imx-common/i2c-mxv7.c b/arch/arm/imx-common/i2c-mxv7.c index f3a5c3f326..ff72b1a1fc 100644 --- a/arch/arm/imx-common/i2c-mxv7.c +++ b/arch/arm/imx-common/i2c-mxv7.c @@ -67,9 +67,12 @@ static void * const i2c_bases[] = { #ifdef I2C3_BASE_ADDR (void *)I2C3_BASE_ADDR, #endif +#ifdef I2C4_BASE_ADDR + (void *)I2C4_BASE_ADDR, +#endif }; -/* i2c_index can be from 0 - 2 */ +/* i2c_index can be from 0 - 3 */ int setup_i2c(unsigned i2c_index, int speed, int slave_addr, struct i2c_pads_info *p) { diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h b/arch/arm/include/asm/arch-mx6/crm_regs.h index 0592ce0171..887d04850f 100644 --- a/arch/arm/include/asm/arch-mx6/crm_regs.h +++ b/arch/arm/include/asm/arch-mx6/crm_regs.h @@ -592,6 +592,8 @@ struct mxc_ccm_reg { #define MXC_CCM_CCGR2_I2C2_SERIAL_MASK (3 << MXC_CCM_CCGR2_I2C2_SERIAL_OFFSET) #define MXC_CCM_CCGR2_I2C3_SERIAL_OFFSET 10 #define MXC_CCM_CCGR2_I2C3_SERIAL_MASK (3 << MXC_CCM_CCGR2_I2C3_SERIAL_OFFSET) +#define MXC_CCM_CCGR1_I2C4_SERIAL_OFFSET 8 +#define MXC_CCM_CCGR1_I2C4_SERIAL_MASK (3 << MXC_CCM_CCGR1_I2C4_SERIAL_OFFSET) #define MXC_CCM_CCGR2_OCOTP_CTRL_OFFSET 12 #define MXC_CCM_CCGR2_OCOTP_CTRL_MASK (3 << MXC_CCM_CCGR2_OCOTP_CTRL_OFFSET) #define MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_OFFSET 14 diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 35bb005552..0d38d450da 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -277,6 +277,7 @@ #define UART3_BASE (AIPS2_OFF_BASE_ADDR + 0x6C000) #define UART4_BASE (AIPS2_OFF_BASE_ADDR + 0x70000) #define UART5_BASE (AIPS2_OFF_BASE_ADDR + 0x74000) +#define I2C4_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x78000) #define IP2APB_USBPHY1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x78000) #define IP2APB_USBPHY2_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x7C000) diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index 81adf6f450..2949e52b72 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -517,6 +517,9 @@ static struct mxc_i2c_bus mxc_i2c_buses[] = { { 0, I2C1_BASE_ADDR }, { 1, I2C2_BASE_ADDR }, { 2, I2C3_BASE_ADDR }, +#if defined(CONFIG_MX6DL) + { 3, I2C4_BASE_ADDR }, +#endif #elif defined(CONFIG_LS102XA) { 0, I2C1_BASE_ADDR, I2C_QUIRK_FLAG }, { 1, I2C2_BASE_ADDR, I2C_QUIRK_FLAG }, |
