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author | Dinh Nguyen <dinguyen@opensource.altera.com> | 2015-12-07 16:48:04 -0600 |
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committer | Marek Vasut <marex@denx.de> | 2015-12-20 03:36:52 +0100 |
commit | ccf5648e0e3c4a61fe57109b39bf64c1cc1418c9 (patch) | |
tree | 64e99e48ee7bada8a3fd93cb60b99845b1bd5fbc | |
parent | dbd6fcfbe2331b953784ba972f66cb3df3e50ab2 (diff) | |
download | talos-obmc-uboot-ccf5648e0e3c4a61fe57109b39bf64c1cc1418c9.tar.gz talos-obmc-uboot-ccf5648e0e3c4a61fe57109b39bf64c1cc1418c9.zip |
arm: socfpga: remove note to add CONFIG_USB_DWC2_REG_ADDR
Now that the USB DWC2 probing is done from OF, remove this note to add
CONFIG_USB_DWC2_REG_ADDR.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
-rw-r--r-- | include/configs/socfpga_common.h | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index f74c758f5a..b57fd4cb6f 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -233,13 +233,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #ifdef CONFIG_CMD_USB #define CONFIG_USB_DWC2 #define CONFIG_USB_STORAGE -/* - * NOTE: User must define either of the following to select which - * of the two USB controllers available on SoCFPGA to use. - * The DWC2 driver doesn't support multiple USB controllers. - * #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB0_ADDRESS - * #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS - */ #endif /* |