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authorJoel Stanley <joel@jms.id.au>2017-06-26 21:03:30 +0930
committerJoel Stanley <joel@jms.id.au>2017-06-26 22:20:03 +0930
commitf8161aba476e554680285c177caceb90bf3d2f2a (patch)
tree49a9b442f284044ac8c4bfc11bf3a7982a47e22f
parented9e4abbf3f0aab348bc64d5439aadda03f42e4c (diff)
downloadtalos-obmc-uboot-f8161aba476e554680285c177caceb90bf3d2f2a.tar.gz
talos-obmc-uboot-f8161aba476e554680285c177caceb90bf3d2f2a.zip
aspeed: Add defines for all watchdogs
This adds defines for WDT2 (and WDT3 for the ast2500), and renames the existing one to WDT1. Signed-off-by: Joel Stanley <joel@jms.id.au>
-rw-r--r--arch/arm/include/asm/arch-aspeed/ast2400_platform.h3
-rw-r--r--arch/arm/include/asm/arch-aspeed/ast_g5_platform.h4
-rw-r--r--arch/arm/mach-aspeed/reset.c6
3 files changed, 8 insertions, 5 deletions
diff --git a/arch/arm/include/asm/arch-aspeed/ast2400_platform.h b/arch/arm/include/asm/arch-aspeed/ast2400_platform.h
index 5c00bb60ea..33c559eb1f 100644
--- a/arch/arm/include/asm/arch-aspeed/ast2400_platform.h
+++ b/arch/arm/include/asm/arch-aspeed/ast2400_platform.h
@@ -57,7 +57,8 @@
#define AST_TIMER_BASE 0x1E782000 /* TIMER #0~7*/
#define AST_UART1_BASE 0x1E783000 /* UART1 */
#define AST_UART0_BASE 0x1E784000 /* UART5 */
-#define AST_WDT_BASE 0x1E785000 /* WDT */
+#define AST_WDT1_BASE 0x1E785000 /* WDT1 */
+#define AST_WDT2_BASE 0x1E785020 /* WDT2 */
#define AST_PWM_BASE 0x1E786000 /* PWM */
#define AST_VUART0_BASE 0x1E787000 /* VUART1 */
#define AST_PUART_BASE 0x1E788000 /* PUART */
diff --git a/arch/arm/include/asm/arch-aspeed/ast_g5_platform.h b/arch/arm/include/asm/arch-aspeed/ast_g5_platform.h
index 3b178cdbe2..42108733f3 100644
--- a/arch/arm/include/asm/arch-aspeed/ast_g5_platform.h
+++ b/arch/arm/include/asm/arch-aspeed/ast_g5_platform.h
@@ -96,7 +96,9 @@
#define AST_TIMER_BASE 0x1E782000 /* TIMER #0~2*/
#define AST_UART1_BASE 0x1E783000 /* UART1 */
#define AST_UART0_BASE 0x1E784000 /* UART5 */
-#define AST_WDT_BASE 0x1E785000 /* WDT */
+#define AST_WDT1_BASE 0x1E785000 /* WDT1 */
+#define AST_WDT2_BASE 0x1E785020 /* WDT2 */
+#define AST_WDT3_BASE 0x1E785040 /* WDT3 */
#define AST_PWM_BASE 0x1E786000 /* PWM */
#define AST_VUART0_BASE 0x1E787000 /* VUART1 */
#define AST_PUART_BASE 0x1E788000 /* PUART */
diff --git a/arch/arm/mach-aspeed/reset.c b/arch/arm/mach-aspeed/reset.c
index b4d8c40623..1a44b3ae3a 100644
--- a/arch/arm/mach-aspeed/reset.c
+++ b/arch/arm/mach-aspeed/reset.c
@@ -9,9 +9,9 @@
void reset_cpu(ulong addr)
{
- __raw_writel(0x10 , AST_WDT_BASE+0x04);
- __raw_writel(0x4755, AST_WDT_BASE+0x08);
- __raw_writel(0x3, AST_WDT_BASE+0x0c);
+ __raw_writel(0x10 , AST_WDT1_BASE+0x04);
+ __raw_writel(0x4755, AST_WDT1_BASE+0x08);
+ __raw_writel(0x3, AST_WDT1_BASE+0x0c);
while (1)
/*nothing*/;
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