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| author | Michal Simek <michal.simek@xilinx.com> | 2015-07-22 11:20:54 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2015-07-28 11:56:25 +0200 |
| commit | b4e9eaf71f715358afd6b9e9512e8e463f553053 (patch) | |
| tree | e3a525637f9d7faaa204e89ba0ffdf98f5d2111c | |
| parent | 05e7ca63b7495d0d428184d3eca979e49f29fdc0 (diff) | |
| download | talos-obmc-uboot-b4e9eaf71f715358afd6b9e9512e8e463f553053.tar.gz talos-obmc-uboot-b4e9eaf71f715358afd6b9e9512e8e463f553053.zip | |
ARM: zynq: DT: Get rid of ps-clk-frequency
ps-clk-frequency is platform specific setting and shouldn't be the part
of DTSI.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| -rw-r--r-- | arch/arm/dts/zynq-7000.dtsi | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi index a1de993b98..095c0f67e1 100644 --- a/arch/arm/dts/zynq-7000.dtsi +++ b/arch/arm/dts/zynq-7000.dtsi @@ -241,7 +241,6 @@ clkc: clkc@100 { #clock-cells = <1>; compatible = "xlnx,ps7-clkc"; - ps-clk-frequency = <33333333>; fclk-enable = <0>; clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", |
