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authorSimon Glass <sjg@chromium.org>2012-02-27 10:52:47 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-03-29 08:12:48 +0200
commit9ab4ce223c1d991e92e15c9aa0f522d61072155d (patch)
tree8a43e077026f24e4a143a04446c48b216d239d92
parent1920172ec80b709d017608b6a1d40b766e84c731 (diff)
downloadtalos-obmc-uboot-9ab4ce223c1d991e92e15c9aa0f522d61072155d.tar.gz
talos-obmc-uboot-9ab4ce223c1d991e92e15c9aa0f522d61072155d.zip
usb: Add support for txfifo threshold
CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the txfilltuning field in the EHCI controller on reset. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Tom Warren <twarren@nvidia.com>
-rw-r--r--README3
-rw-r--r--drivers/usb/host/ehci-hcd.c7
-rw-r--r--drivers/usb/host/ehci.h6
3 files changed, 15 insertions, 1 deletions
diff --git a/README b/README
index 5452813449..d4799e222f 100644
--- a/README
+++ b/README
@@ -1125,6 +1125,9 @@ The following options need to be configured:
May be defined to allow interrupt polling
instead of using asynchronous interrupts
+ CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
+ txfilltuning field in the EHCI controller on reset.
+
- USB Device:
Define the below if you wish to use the USB console.
Once firmware is rebuilt from a serial console issue the
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index ef5afc22b0..b6422d7d7a 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -255,6 +255,13 @@ static int ehci_reset(void)
#endif
ehci_writel(reg_ptr, tmp);
}
+
+#ifdef CONFIG_USB_EHCI_TXFIFO_THRESH
+ cmd = ehci_readl(&hcor->or_txfilltuning);
+ cmd &= ~TXFIFO_THRESH(0x3f);
+ cmd |= TXFIFO_THRESH(CONFIG_USB_EHCI_TXFIFO_THRESH);
+ ehci_writel(&hcor->or_txfilltuning, cmd);
+#endif
out:
return ret;
}
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index 3d0ad0c852..cc00ce428b 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -80,7 +80,11 @@ struct ehci_hcor {
uint32_t or_ctrldssegment;
uint32_t or_periodiclistbase;
uint32_t or_asynclistaddr;
- uint32_t _reserved_[9];
+ uint32_t _reserved_0_;
+ uint32_t or_burstsize;
+ uint32_t or_txfilltuning;
+#define TXFIFO_THRESH(p) ((p & 0x3f) << 16)
+ uint32_t _reserved_1_[6];
uint32_t or_configflag;
#define FLAG_CF (1 << 0) /* true: we'll support "high speed" */
uint32_t or_portsc[CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS];
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