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authorNikita Kiryanov <nikita@compulab.co.il>2014-11-21 12:47:22 +0200
committerStefano Babic <sbabic@denx.de>2014-11-24 11:59:59 +0100
commit8d29cef5887887157f54f98493440ce5c824d5cb (patch)
tree620dd940c026dc4095daafe5cdc83444250e6ba0
parent3a7577e5f384f6fdbd8e9b8eefa8573c508fd6de (diff)
downloadtalos-obmc-uboot-8d29cef5887887157f54f98493440ce5c824d5cb.tar.gz
talos-obmc-uboot-8d29cef5887887157f54f98493440ce5c824d5cb.zip
arm: mx6: introduce disable_sata_clock
Implement disable_sata_clock for mx6 SoCs. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de>
-rw-r--r--arch/arm/cpu/armv7/mx6/clock.c8
-rw-r--r--arch/arm/include/asm/arch-mx6/clock.h1
2 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index 80b11aaf50..ab7ac3d703 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -596,6 +596,14 @@ int enable_sata_clock(void)
ungate_sata_clock();
return enable_enet_pll(BM_ANADIG_PLL_ENET_ENABLE_SATA);
}
+
+void disable_sata_clock(void)
+{
+ struct mxc_ccm_reg *const imx_ccm =
+ (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+
+ clrbits_le32(&imx_ccm->CCGR5, MXC_CCM_CCGR5_SATA_MASK);
+}
#endif
int enable_pcie_clock(void)
diff --git a/arch/arm/include/asm/arch-mx6/clock.h b/arch/arm/include/asm/arch-mx6/clock.h
index 8e51f9b3a0..323805c75c 100644
--- a/arch/arm/include/asm/arch-mx6/clock.h
+++ b/arch/arm/include/asm/arch-mx6/clock.h
@@ -60,6 +60,7 @@ void enable_uart_clk(unsigned char enable);
int enable_cspi_clock(unsigned char enable, unsigned spi_num);
int enable_usdhc_clk(unsigned char enable, unsigned bus_num);
int enable_sata_clock(void);
+void disable_sata_clock(void);
int enable_pcie_clock(void);
int enable_i2c_clk(unsigned char enable, unsigned i2c_num);
int enable_spi_clk(unsigned char enable, unsigned spi_num);
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