diff options
| author | Simon Glass <sjg@chromium.org> | 2016-01-17 16:11:13 -0700 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2016-01-24 12:07:19 +0800 |
| commit | 858361b174ca44cd3ae3bfd87fcd33bcfeb31188 (patch) | |
| tree | c3a00164b097de4f8f1cb9e149397023a4bf194e | |
| parent | fe40bd4d8f62637aac0d2b3e6195d56dc96b1342 (diff) | |
| download | talos-obmc-uboot-858361b174ca44cd3ae3bfd87fcd33bcfeb31188.tar.gz talos-obmc-uboot-858361b174ca44cd3ae3bfd87fcd33bcfeb31188.zip | |
x86: ivybridge: Rename bd82x6x_init()
Rename the existing bd82x6x_init() to bd82x6x_init_extra(). We will remove
this in a later patch.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| -rw-r--r-- | arch/x86/cpu/ivybridge/bd82x6x.c | 2 | ||||
| -rw-r--r-- | arch/x86/cpu/ivybridge/cpu.c | 8 | ||||
| -rw-r--r-- | arch/x86/cpu/ivybridge/pci.c | 2 | ||||
| -rw-r--r-- | arch/x86/include/asm/arch-ivybridge/bd82x6x.h | 2 |
4 files changed, 11 insertions, 3 deletions
diff --git a/arch/x86/cpu/ivybridge/bd82x6x.c b/arch/x86/cpu/ivybridge/bd82x6x.c index 72f2ed4d71..6556eeb11d 100644 --- a/arch/x86/cpu/ivybridge/bd82x6x.c +++ b/arch/x86/cpu/ivybridge/bd82x6x.c @@ -102,7 +102,7 @@ static int bd82x6x_probe(struct udevice *dev) } /* TODO(sjg@chromium.org): Move this to the PCH init() method */ -int bd82x6x_init(void) +int bd82x6x_init_extra(void) { const void *blob = gd->fdt_blob; int sata_node; diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c index 1e6f656685..2a15fc0220 100644 --- a/arch/x86/cpu/ivybridge/cpu.c +++ b/arch/x86/cpu/ivybridge/cpu.c @@ -15,6 +15,7 @@ #include <dm.h> #include <errno.h> #include <fdtdec.h> +#include <pch.h> #include <asm/cpu.h> #include <asm/io.h> #include <asm/lapic.h> @@ -211,6 +212,7 @@ int print_cpuinfo(void) { enum pei_boot_mode_t boot_mode = PEI_BOOT_NONE; char processor_name[CPU_MAX_NAME_LEN]; + struct udevice *dev; const char *name; uint32_t pm1_cnt; uint16_t pm1_sts; @@ -241,6 +243,12 @@ int print_cpuinfo(void) } /* Early chipset init required before RAM init can work */ + ret = uclass_first_device(UCLASS_PCH, &dev); + if (ret) + return ret; + if (!dev) + return -ENODEV; + sandybridge_early_init(SANDYBRIDGE_MOBILE); /* Check PM1_STS[15] to see if we are waking from Sx */ diff --git a/arch/x86/cpu/ivybridge/pci.c b/arch/x86/cpu/ivybridge/pci.c index 5e90f30e08..8af99b4447 100644 --- a/arch/x86/cpu/ivybridge/pci.c +++ b/arch/x86/cpu/ivybridge/pci.c @@ -26,7 +26,7 @@ static int pci_ivybridge_probe(struct udevice *bus) if (!(gd->flags & GD_FLG_RELOC)) return 0; post_code(0x50); - bd82x6x_init(); + bd82x6x_init_extra(); post_code(0x51); reg16 = 0xff; diff --git a/arch/x86/include/asm/arch-ivybridge/bd82x6x.h b/arch/x86/include/asm/arch-ivybridge/bd82x6x.h index fcdf6e26cb..d76cb8dd78 100644 --- a/arch/x86/include/asm/arch-ivybridge/bd82x6x.h +++ b/arch/x86/include/asm/arch-ivybridge/bd82x6x.h @@ -13,7 +13,7 @@ void bd82x6x_pci_init(pci_dev_t dev); void bd82x6x_usb_ehci_init(pci_dev_t dev); void bd82x6x_usb_xhci_init(pci_dev_t dev); int gma_func0_init(struct udevice *dev, const void *blob, int node); -int bd82x6x_init(void); +int bd82x6x_init_extra(void); /** * struct x86_cpu_priv - Information about a single CPU |
