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| author | Zhou Zhu <zzhu3@marvell.com> | 2015-03-23 17:57:01 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-04-23 13:59:18 -0400 |
| commit | 3d046f6a87513b917ef198099365938a50655221 (patch) | |
| tree | 887e83c3e05eacabed3c467cd13a1c10c1cbb01c | |
| parent | ee4303cffa52216c4d12c6182eb41480713f439a (diff) | |
| download | talos-obmc-uboot-3d046f6a87513b917ef198099365938a50655221.tar.gz talos-obmc-uboot-3d046f6a87513b917ef198099365938a50655221.zip | |
mvgpio: remove CONFIG_SHEEVA_88SV331xV5 dependency
The Marvell GPIO driver can be used on Marvell platforms other than
Sheeva, so remove the ifdef to enable it for others.
Signed-off-by: Rob Herring <robh@kernel.org>
| -rw-r--r-- | drivers/gpio/mvgpio.h | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/drivers/gpio/mvgpio.h b/drivers/gpio/mvgpio.h index a3f17a0c31..1de739568a 100644 --- a/drivers/gpio/mvgpio.h +++ b/drivers/gpio/mvgpio.h @@ -14,9 +14,8 @@ #include <common.h> -#ifdef CONFIG_SHEEVA_88SV331xV5 /* - * GPIO Register map for SHEEVA 88SV331xV5 + * GPIO Register map for Marvell SOCs */ struct gpio_reg { u32 gplr; /* Pin Level Register - 0x0000 */ @@ -51,8 +50,5 @@ struct gpio_reg { u32 pad12[2]; u32 apmask; /* Bitwise Mask of Edge Detect Register - 0x009C */ }; -#else -#error "CPU core subversion not defined" -#endif #endif /* __MVGPIO_H__ */ |
