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| author | Simon Glass <sjg@chromium.org> | 2016-01-17 16:11:18 -0700 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2016-01-24 12:08:16 +0800 |
| commit | 2b27d205290b43418c7f51026915782551f03e6b (patch) | |
| tree | a9b2d118bebb5332d0ae5f84ba10879d2835ae06 | |
| parent | 977a59189303277a7ec3906cc91d93ed440ca52e (diff) | |
| download | talos-obmc-uboot-2b27d205290b43418c7f51026915782551f03e6b.tar.gz talos-obmc-uboot-2b27d205290b43418c7f51026915782551f03e6b.zip | |
x86: ivybridge: Rename lpc_init() to lpc_init_extra()
In preparation for adding an init() method to the LPC uclass, rename this
existing function so that it will not conflict.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| -rw-r--r-- | arch/x86/cpu/ivybridge/bd82x6x.c | 2 | ||||
| -rw-r--r-- | arch/x86/cpu/ivybridge/lpc.c | 2 | ||||
| -rw-r--r-- | arch/x86/include/asm/arch-ivybridge/pch.h | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/arch/x86/cpu/ivybridge/bd82x6x.c b/arch/x86/cpu/ivybridge/bd82x6x.c index 6556eeb11d..c71596d073 100644 --- a/arch/x86/cpu/ivybridge/bd82x6x.c +++ b/arch/x86/cpu/ivybridge/bd82x6x.c @@ -70,7 +70,7 @@ static int bd82x6x_probe(struct udevice *dev) hose = pci_bus_to_hose(0); lpc_enable(PCH_LPC_DEV); - lpc_init(hose, PCH_LPC_DEV); + lpc_init_extra(hose, PCH_LPC_DEV); sata_node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_PANTHERPOINT_AHCI); if (sata_node < 0) { diff --git a/arch/x86/cpu/ivybridge/lpc.c b/arch/x86/cpu/ivybridge/lpc.c index 9dad9e4ee9..9f41f22850 100644 --- a/arch/x86/cpu/ivybridge/lpc.c +++ b/arch/x86/cpu/ivybridge/lpc.c @@ -538,7 +538,7 @@ static int lpc_early_init(struct udevice *dev) return 0; } -int lpc_init(struct pci_controller *hose, pci_dev_t dev) +int lpc_init_extra(struct pci_controller *hose, pci_dev_t dev) { const void *blob = gd->fdt_blob; int node; diff --git a/arch/x86/include/asm/arch-ivybridge/pch.h b/arch/x86/include/asm/arch-ivybridge/pch.h index 19cd7e5beb..f35803bbf4 100644 --- a/arch/x86/include/asm/arch-ivybridge/pch.h +++ b/arch/x86/include/asm/arch-ivybridge/pch.h @@ -470,7 +470,7 @@ void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue); #define DMISCI_STS (1 << 9) #define TCO2_STS 0x66 -int lpc_init(struct pci_controller *hose, pci_dev_t dev); +int lpc_init_extra(struct pci_controller *hose, pci_dev_t dev); void lpc_enable(pci_dev_t dev); #endif |
