From d25bf7e5fe73b5b6d2246ab0be08ae35d718456b Mon Sep 17 00:00:00 2001 From: Venkatesh Pallipadi Date: Wed, 11 Jan 2006 22:44:24 +0100 Subject: [PATCH] x86_64: Handle missing local APIC timer interrupts on C3 state Whenever we see that a CPU is capable of C3 (during ACPI cstate init), we disable local APIC timer and switch to using a broadcast from external timer interrupt (IRQ 0). Patch below adds the code for x86_64. Signed-off-by: Venkatesh Pallipadi Signed-off-by: Andi Kleen Signed-off-by: Linus Torvalds --- include/asm-x86_64/apic.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include/asm-x86_64/apic.h') diff --git a/include/asm-x86_64/apic.h b/include/asm-x86_64/apic.h index 5647b7de1749..1768ce719156 100644 --- a/include/asm-x86_64/apic.h +++ b/include/asm-x86_64/apic.h @@ -113,6 +113,12 @@ extern int disable_timer_pin_1; extern void setup_threshold_lvt(unsigned long lvt_off); +void smp_send_timer_broadcast_ipi(void); +void switch_APIC_timer_to_ipi(void *cpumask); +void switch_ipi_to_APIC_timer(void *cpumask); + +#define ARCH_APICTIMER_STOPS_ON_C3 1 + #endif /* CONFIG_X86_LOCAL_APIC */ extern unsigned boot_cpu_id; -- cgit v1.2.1