From a5bba930d802009c259e56c8d53086d96f63813b Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Tue, 30 May 2006 13:51:37 +1000 Subject: [PATCH] powerpc vdso updates This patch cleans up some locking & error handling in the ppc vdso and moves the vdso base pointer from the thread struct to the mm context where it more logically belongs. It brings the powerpc implementation closer to Ingo's new x86 one and also adds an arch_vma_name() function allowing to print [vsdo] in /proc//maps if Ingo's x86 vdso patch is also applied. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Paul Mackerras --- include/asm-powerpc/processor.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include/asm-powerpc/processor.h') diff --git a/include/asm-powerpc/processor.h b/include/asm-powerpc/processor.h index 93f83efeb310..d5c7ef1cca26 100644 --- a/include/asm-powerpc/processor.h +++ b/include/asm-powerpc/processor.h @@ -153,7 +153,6 @@ struct thread_struct { unsigned long start_tb; /* Start purr when proc switched in */ unsigned long accum_tb; /* Total accumilated purr for process */ #endif - unsigned long vdso_base; /* base of the vDSO library */ unsigned long dabr; /* Data address breakpoint register */ #ifdef CONFIG_ALTIVEC /* Complete AltiVec register set */ -- cgit v1.2.1 From fab5db97e44f76461f76b24adfa8ccb14d4df498 Mon Sep 17 00:00:00 2001 From: Paul Mackerras Date: Wed, 7 Jun 2006 16:14:40 +1000 Subject: [PATCH] powerpc: Implement support for setting little-endian mode via prctl This adds the PowerPC part of the code to allow processes to change their endian mode via prctl. This also extends the alignment exception handler to be able to fix up alignment exceptions that occur in little-endian mode, both for "PowerPC" little-endian and true little-endian. We always enter signal handlers in big-endian mode -- the support for little-endian mode does not amount to the creation of a little-endian user/kernel ABI. If the signal handler returns, the endian mode is restored to what it was when the signal was delivered. We have two new kernel CPU feature bits, one for PPC little-endian and one for true little-endian. Most of the classic 32-bit processors support PPC little-endian, and this is reflected in the CPU feature table. There are two corresponding feature bits reported to userland in the AT_HWCAP aux vector entry. This is based on an earlier patch by Anton Blanchard. Signed-off-by: Paul Mackerras --- include/asm-powerpc/processor.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include/asm-powerpc/processor.h') diff --git a/include/asm-powerpc/processor.h b/include/asm-powerpc/processor.h index d5c7ef1cca26..fa6163268153 100644 --- a/include/asm-powerpc/processor.h +++ b/include/asm-powerpc/processor.h @@ -211,6 +211,12 @@ unsigned long get_wchan(struct task_struct *p); extern int get_fpexc_mode(struct task_struct *tsk, unsigned long adr); extern int set_fpexc_mode(struct task_struct *tsk, unsigned int val); +#define GET_ENDIAN(tsk, adr) get_endian((tsk), (adr)) +#define SET_ENDIAN(tsk, val) set_endian((tsk), (val)) + +extern int get_endian(struct task_struct *tsk, unsigned long adr); +extern int set_endian(struct task_struct *tsk, unsigned int val); + static inline unsigned int __unpack_fe01(unsigned long msr_bits) { return ((msr_bits & MSR_FE0) >> 10) | ((msr_bits & MSR_FE1) >> 8); -- cgit v1.2.1 From e9370ae15dc2f8ba1e1889ce26f13cda565b6ecb Mon Sep 17 00:00:00 2001 From: Paul Mackerras Date: Wed, 7 Jun 2006 16:15:39 +1000 Subject: [PATCH] powerpc: Implement PR_[GS]ET_UNALIGN prctls for powerpc This gives the ability to control whether alignment exceptions get fixed up or reported to the process as a SIGBUS, using the existing PR_SET_UNALIGN and PR_GET_UNALIGN prctls. We do not implement the option of logging a message on alignment exceptions. Signed-off-by: Paul Mackerras --- include/asm-powerpc/processor.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include/asm-powerpc/processor.h') diff --git a/include/asm-powerpc/processor.h b/include/asm-powerpc/processor.h index fa6163268153..d2c2c95f913b 100644 --- a/include/asm-powerpc/processor.h +++ b/include/asm-powerpc/processor.h @@ -149,6 +149,7 @@ struct thread_struct { unsigned int val; /* Floating point status */ } fpscr; int fpexc_mode; /* floating-point exception mode */ + unsigned int align_ctl; /* alignment handling control */ #ifdef CONFIG_PPC64 unsigned long start_tb; /* Start purr when proc switched in */ unsigned long accum_tb; /* Total accumilated purr for process */ @@ -217,6 +218,12 @@ extern int set_fpexc_mode(struct task_struct *tsk, unsigned int val); extern int get_endian(struct task_struct *tsk, unsigned long adr); extern int set_endian(struct task_struct *tsk, unsigned int val); +#define GET_UNALIGN_CTL(tsk, adr) get_unalign_ctl((tsk), (adr)) +#define SET_UNALIGN_CTL(tsk, val) set_unalign_ctl((tsk), (val)) + +extern int get_unalign_ctl(struct task_struct *tsk, unsigned long adr); +extern int set_unalign_ctl(struct task_struct *tsk, unsigned int val); + static inline unsigned int __unpack_fe01(unsigned long msr_bits) { return ((msr_bits & MSR_FE0) >> 10) | ((msr_bits & MSR_FE1) >> 8); -- cgit v1.2.1 From ddf5f75a16b3e7460ffee881795aa168dffcd0cf Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Tue, 20 Jun 2006 02:30:33 +0200 Subject: [POWERPC] disable floating point exceptions for init Floating point exceptions should not be enabled by default, as this setting impacts the performance on some CPUs, in particular the Cell BE. Since the bits are inherited from parent processes, the place to change the default is the thread struct used for init. glibc sets this up correctly per thread in its fesetenv function, so user space should not be impacted by this setting. None of the other common libc implementations (uClibc, dietlibc, newlib, klibc) has support for fp exceptions, so they are unlikely to be hit by this either. There is a small risk that somebody wrote their own application that manually sets the fpscr bits instead of calling fesetenv, without changing the MSR bits as well. Those programs will break with this change. It probably makes sense to change glibc in the future to be more clever about FE bits, so that when running on a CPU where this is expensive, it disables exceptions ASAP, while it keeps them enabled on CPUs where running with exceptions on is cheaper than changing the state often. Signed-off-by: Arnd Bergmann Signed-off-by: Paul Mackerras --- include/asm-powerpc/processor.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/asm-powerpc/processor.h') diff --git a/include/asm-powerpc/processor.h b/include/asm-powerpc/processor.h index d2c2c95f913b..22e54a2a6604 100644 --- a/include/asm-powerpc/processor.h +++ b/include/asm-powerpc/processor.h @@ -190,7 +190,7 @@ struct thread_struct { .fs = KERNEL_DS, \ .fpr = {0}, \ .fpscr = { .val = 0, }, \ - .fpexc_mode = MSR_FE0|MSR_FE1, \ + .fpexc_mode = 0, \ } #endif -- cgit v1.2.1