From e5c3370ffbe1336f7ee01233ba6b48a1ac06ec07 Mon Sep 17 00:00:00 2001 From: Akeem G Abodunrin Date: Thu, 6 Jun 2013 01:31:09 +0000 Subject: igb: Read register for latch_on without return value This patch changes register read to "just-read" without returning a value for hardware to accurately latch the register value. Signed-off-by: Akeem G Abodunrin Tested-by: Aaron Brown Signed-off-by: Jeff Kirsher --- drivers/net/ethernet/intel/igb/e1000_82575.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) (limited to 'drivers/net/ethernet/intel/igb/e1000_82575.c') diff --git a/drivers/net/ethernet/intel/igb/e1000_82575.c b/drivers/net/ethernet/intel/igb/e1000_82575.c index f21a91a299a2..9057d10a698a 100644 --- a/drivers/net/ethernet/intel/igb/e1000_82575.c +++ b/drivers/net/ethernet/intel/igb/e1000_82575.c @@ -1320,7 +1320,7 @@ void igb_shutdown_serdes_link_82575(struct e1000_hw *hw) **/ static s32 igb_reset_hw_82575(struct e1000_hw *hw) { - u32 ctrl, icr; + u32 ctrl; s32 ret_val; /* Prevent the PCI-E bus from sticking if there is no TLP connection @@ -1365,7 +1365,7 @@ static s32 igb_reset_hw_82575(struct e1000_hw *hw) /* Clear any pending interrupt events. */ wr32(E1000_IMC, 0xffffffff); - icr = rd32(E1000_ICR); + rd32(E1000_ICR); /* Install any alternate MAC address into RAR0 */ ret_val = igb_check_alt_mac_addr(hw); @@ -2103,10 +2103,9 @@ static s32 igb_reset_hw_82580(struct e1000_hw *hw) s32 ret_val = 0; /* BH SW mailbox bit in SW_FW_SYNC */ u16 swmbsw_mask = E1000_SW_SYNCH_MB; - u32 ctrl, icr; + u32 ctrl; bool global_device_reset = hw->dev_spec._82575.global_device_reset; - hw->dev_spec._82575.global_device_reset = false; /* due to hw errata, global device reset doesn't always @@ -2165,7 +2164,7 @@ static s32 igb_reset_hw_82580(struct e1000_hw *hw) /* Clear any pending interrupt events. */ wr32(E1000_IMC, 0xffffffff); - icr = rd32(E1000_ICR); + rd32(E1000_ICR); ret_val = igb_reset_mdicnfg_82580(hw); if (ret_val) -- cgit v1.2.1