From f7225a832dde995325b486b41728dfbe4634311c Mon Sep 17 00:00:00 2001 From: Jon Mason Date: Thu, 15 Oct 2015 15:48:31 -0400 Subject: clk: ns2: add clock support for Broadcom Northstar 2 SoC The Broadcom Northstar 2 SoC is architected under the iProc architecture. It has the following PLLs: GENPLL SCR, GENPLL SW, LCPLL DDR, LCPLL Ports, all derived from an onboard crystal. Signed-off-by: Jon Mason Signed-off-by: Stephen Boyd --- drivers/clk/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/clk/Makefile') diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index d08b3e5985be..6124bd31e557 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -47,7 +47,7 @@ obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o obj-$(CONFIG_COMMON_CLK_XGENE) += clk-xgene.o obj-$(CONFIG_COMMON_CLK_PWM) += clk-pwm.o obj-$(CONFIG_COMMON_CLK_AT91) += at91/ -obj-$(CONFIG_ARCH_BCM) += bcm/ +obj-y += bcm/ obj-$(CONFIG_ARCH_BERLIN) += berlin/ obj-$(CONFIG_ARCH_HISI) += hisilicon/ obj-$(CONFIG_ARCH_MXC) += imx/ -- cgit v1.2.1