From 6333ed8f26cf77311088d2e2b7cf16d8480bcbb2 Mon Sep 17 00:00:00 2001 From: Haren Myneni Date: Sun, 13 Dec 2015 03:30:41 -0800 Subject: crypto: nx-842 - Mask XERS0 bit in return value NX842 coprocessor sets 3rd bit in CR register with XER[S0] which is nothing to do with NX request. Since this bit can be set with other valuable return status, mast this bit. One of other bits (INITIATED, BUSY or REJECTED) will be returned for any given NX request. Signed-off-by: Haren Myneni Signed-off-by: Herbert Xu --- arch/powerpc/include/asm/icswx.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/powerpc/include/asm/icswx.h') diff --git a/arch/powerpc/include/asm/icswx.h b/arch/powerpc/include/asm/icswx.h index 9f8402b35115..27e588f6c72e 100644 --- a/arch/powerpc/include/asm/icswx.h +++ b/arch/powerpc/include/asm/icswx.h @@ -164,6 +164,7 @@ struct coprocessor_request_block { #define ICSWX_INITIATED (0x8) #define ICSWX_BUSY (0x4) #define ICSWX_REJECTED (0x2) +#define ICSWX_XERS0 (0x1) /* undefined or set from XERSO. */ static inline int icswx(__be32 ccw, struct coprocessor_request_block *crb) { -- cgit v1.2.1