From 9519ef37a4a4e9c3c2d7d89ecbecfaf3c839208a Mon Sep 17 00:00:00 2001 From: "Maciej W. Rozycki" Date: Fri, 13 Nov 2015 00:46:55 +0000 Subject: MIPS: Define the legacy-NaN and 2008-NaN features Allocate CPU option bits and define macros for the legacy-NaN and 2008-NaN IEEE Std 754 MIPS architecture features. Unconditionally mark the legacy-NaN feature as present across hardware and emulated floating-point configurations. Signed-off-by: Maciej W. Rozycki Cc: Andrew Morton Cc: Matthew Fortune Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/11475/ Signed-off-by: Ralf Baechle --- arch/mips/include/asm/cpu.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/mips/include/asm/cpu.h') diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index 82ad15f11049..a97ca97285ec 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -386,6 +386,8 @@ enum cpu_type_enum { #define MIPS_CPU_BP_GHIST 0x8000000000ull /* R12K+ Branch Prediction Global History */ #define MIPS_CPU_SP 0x10000000000ull /* Small (1KB) page support */ #define MIPS_CPU_FTLB 0x20000000000ull /* CPU has Fixed-page-size TLB */ +#define MIPS_CPU_NAN_LEGACY 0x40000000000ull /* Legacy NaN implemented */ +#define MIPS_CPU_NAN_2008 0x80000000000ull /* 2008 NaN implemented */ /* * CPU ASE encodings -- cgit v1.2.1