From 24a07a124198153540f8f43d9e91d16227aba66e Mon Sep 17 00:00:00 2001 From: Roy Huang Date: Thu, 12 Jul 2007 22:41:45 +0800 Subject: Blackfin arch: initial supporting for BF548-EZKIT The ADSP-BF54x was specifically designed to meet the needs of convergent multimedia applications where system performance and cost are essential ingredients. The integration of multimedia, human interface, and connectivity peripherals combined with increased system bandwidth and on-chip memory provides customers a platform to design the most demanding applications. Since now, ADSP-BF54x will be supported in the Linux kernel and bunch of related drivers such as USB OTG, ATAPI, NAND flash controller, LCD framebuffer, sound, touch screen will be submitted later. Please enjoy the show. Signed-off-by: Roy Huang Signed-off-by: Bryan Wu --- arch/blackfin/kernel/Makefile | 5 +- arch/blackfin/kernel/bfin_dma_5xx.c | 205 +----------------------------------- arch/blackfin/kernel/setup.c | 3 +- 3 files changed, 6 insertions(+), 207 deletions(-) (limited to 'arch/blackfin/kernel') diff --git a/arch/blackfin/kernel/Makefile b/arch/blackfin/kernel/Makefile index f3b7d2f9d49c..93d21406cade 100644 --- a/arch/blackfin/kernel/Makefile +++ b/arch/blackfin/kernel/Makefile @@ -6,9 +6,10 @@ extra-y := init_task.o vmlinux.lds obj-y := \ entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \ - sys_bfin.o time.o traps.o irqchip.o dma-mapping.o bfin_gpio.o \ - flat.o + sys_bfin.o time.o traps.o irqchip.o dma-mapping.o flat.o +obj-$(CONFIG_BF53x) += bfin_gpio.o +obj-$(CONFIG_BF561) += bfin_gpio.o obj-$(CONFIG_MODULES) += module.o obj-$(CONFIG_BFIN_DMA_5XX) += bfin_dma_5xx.o obj-$(CONFIG_DUAL_CORE_TEST_MODULE) += dualcore_test.o diff --git a/arch/blackfin/kernel/bfin_dma_5xx.c b/arch/blackfin/kernel/bfin_dma_5xx.c index 069a896a8f26..8a16c2bbec04 100644 --- a/arch/blackfin/kernel/bfin_dma_5xx.c +++ b/arch/blackfin/kernel/bfin_dma_5xx.c @@ -34,6 +34,7 @@ #include #include +#include #include #include @@ -45,67 +46,6 @@ ***************************************************************************/ static struct dma_channel dma_ch[MAX_BLACKFIN_DMA_CHANNEL]; -#if defined (CONFIG_BF561) -static struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = { - (struct dma_register *) DMA1_0_NEXT_DESC_PTR, - (struct dma_register *) DMA1_1_NEXT_DESC_PTR, - (struct dma_register *) DMA1_2_NEXT_DESC_PTR, - (struct dma_register *) DMA1_3_NEXT_DESC_PTR, - (struct dma_register *) DMA1_4_NEXT_DESC_PTR, - (struct dma_register *) DMA1_5_NEXT_DESC_PTR, - (struct dma_register *) DMA1_6_NEXT_DESC_PTR, - (struct dma_register *) DMA1_7_NEXT_DESC_PTR, - (struct dma_register *) DMA1_8_NEXT_DESC_PTR, - (struct dma_register *) DMA1_9_NEXT_DESC_PTR, - (struct dma_register *) DMA1_10_NEXT_DESC_PTR, - (struct dma_register *) DMA1_11_NEXT_DESC_PTR, - (struct dma_register *) DMA2_0_NEXT_DESC_PTR, - (struct dma_register *) DMA2_1_NEXT_DESC_PTR, - (struct dma_register *) DMA2_2_NEXT_DESC_PTR, - (struct dma_register *) DMA2_3_NEXT_DESC_PTR, - (struct dma_register *) DMA2_4_NEXT_DESC_PTR, - (struct dma_register *) DMA2_5_NEXT_DESC_PTR, - (struct dma_register *) DMA2_6_NEXT_DESC_PTR, - (struct dma_register *) DMA2_7_NEXT_DESC_PTR, - (struct dma_register *) DMA2_8_NEXT_DESC_PTR, - (struct dma_register *) DMA2_9_NEXT_DESC_PTR, - (struct dma_register *) DMA2_10_NEXT_DESC_PTR, - (struct dma_register *) DMA2_11_NEXT_DESC_PTR, - (struct dma_register *) MDMA1_D0_NEXT_DESC_PTR, - (struct dma_register *) MDMA1_S0_NEXT_DESC_PTR, - (struct dma_register *) MDMA1_D1_NEXT_DESC_PTR, - (struct dma_register *) MDMA1_S1_NEXT_DESC_PTR, - (struct dma_register *) MDMA2_D0_NEXT_DESC_PTR, - (struct dma_register *) MDMA2_S0_NEXT_DESC_PTR, - (struct dma_register *) MDMA2_D1_NEXT_DESC_PTR, - (struct dma_register *) MDMA2_S1_NEXT_DESC_PTR, - (struct dma_register *) IMDMA_D0_NEXT_DESC_PTR, - (struct dma_register *) IMDMA_S0_NEXT_DESC_PTR, - (struct dma_register *) IMDMA_D1_NEXT_DESC_PTR, - (struct dma_register *) IMDMA_S1_NEXT_DESC_PTR, -}; -#else -static struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = { - (struct dma_register *) DMA0_NEXT_DESC_PTR, - (struct dma_register *) DMA1_NEXT_DESC_PTR, - (struct dma_register *) DMA2_NEXT_DESC_PTR, - (struct dma_register *) DMA3_NEXT_DESC_PTR, - (struct dma_register *) DMA4_NEXT_DESC_PTR, - (struct dma_register *) DMA5_NEXT_DESC_PTR, - (struct dma_register *) DMA6_NEXT_DESC_PTR, - (struct dma_register *) DMA7_NEXT_DESC_PTR, -#if (defined(CONFIG_BF537) || defined(CONFIG_BF534) || defined(CONFIG_BF536)) - (struct dma_register *) DMA8_NEXT_DESC_PTR, - (struct dma_register *) DMA9_NEXT_DESC_PTR, - (struct dma_register *) DMA10_NEXT_DESC_PTR, - (struct dma_register *) DMA11_NEXT_DESC_PTR, -#endif - (struct dma_register *) MDMA_D0_NEXT_DESC_PTR, - (struct dma_register *) MDMA_S0_NEXT_DESC_PTR, - (struct dma_register *) MDMA_D1_NEXT_DESC_PTR, - (struct dma_register *) MDMA_S1_NEXT_DESC_PTR, -}; -#endif /*------------------------------------------------------------------------------ * Set the Buffer Clear bit in the Configuration register of specific DMA @@ -138,149 +78,6 @@ static int __init blackfin_dma_init(void) arch_initcall(blackfin_dma_init); -/* - * Form the channel find the irq number for that channel. - */ -#if !defined(CONFIG_BF561) - -static int bf533_channel2irq(unsigned int channel) -{ - int ret_irq = -1; - - switch (channel) { - case CH_PPI: - ret_irq = IRQ_PPI; - break; - -#if (defined(CONFIG_BF537) || defined(CONFIG_BF534) || defined(CONFIG_BF536)) - case CH_EMAC_RX: - ret_irq = IRQ_MAC_RX; - break; - - case CH_EMAC_TX: - ret_irq = IRQ_MAC_TX; - break; - - case CH_UART1_RX: - ret_irq = IRQ_UART1_RX; - break; - - case CH_UART1_TX: - ret_irq = IRQ_UART1_TX; - break; -#endif - - case CH_SPORT0_RX: - ret_irq = IRQ_SPORT0_RX; - break; - - case CH_SPORT0_TX: - ret_irq = IRQ_SPORT0_TX; - break; - - case CH_SPORT1_RX: - ret_irq = IRQ_SPORT1_RX; - break; - - case CH_SPORT1_TX: - ret_irq = IRQ_SPORT1_TX; - break; - - case CH_SPI: - ret_irq = IRQ_SPI; - break; - - case CH_UART_RX: - ret_irq = IRQ_UART_RX; - break; - - case CH_UART_TX: - ret_irq = IRQ_UART_TX; - break; - - case CH_MEM_STREAM0_SRC: - case CH_MEM_STREAM0_DEST: - ret_irq = IRQ_MEM_DMA0; - break; - - case CH_MEM_STREAM1_SRC: - case CH_MEM_STREAM1_DEST: - ret_irq = IRQ_MEM_DMA1; - break; - } - return ret_irq; -} - -# define channel2irq(channel) bf533_channel2irq(channel) - -#else - -static int bf561_channel2irq(unsigned int channel) -{ - int ret_irq = -1; - - switch (channel) { - case CH_PPI0: - ret_irq = IRQ_PPI0; - break; - case CH_PPI1: - ret_irq = IRQ_PPI1; - break; - case CH_SPORT0_RX: - ret_irq = IRQ_SPORT0_RX; - break; - case CH_SPORT0_TX: - ret_irq = IRQ_SPORT0_TX; - break; - case CH_SPORT1_RX: - ret_irq = IRQ_SPORT1_RX; - break; - case CH_SPORT1_TX: - ret_irq = IRQ_SPORT1_TX; - break; - case CH_SPI: - ret_irq = IRQ_SPI; - break; - case CH_UART_RX: - ret_irq = IRQ_UART_RX; - break; - case CH_UART_TX: - ret_irq = IRQ_UART_TX; - break; - - case CH_MEM_STREAM0_SRC: - case CH_MEM_STREAM0_DEST: - ret_irq = IRQ_MEM_DMA0; - break; - case CH_MEM_STREAM1_SRC: - case CH_MEM_STREAM1_DEST: - ret_irq = IRQ_MEM_DMA1; - break; - case CH_MEM_STREAM2_SRC: - case CH_MEM_STREAM2_DEST: - ret_irq = IRQ_MEM_DMA2; - break; - case CH_MEM_STREAM3_SRC: - case CH_MEM_STREAM3_DEST: - ret_irq = IRQ_MEM_DMA3; - break; - - case CH_IMEM_STREAM0_SRC: - case CH_IMEM_STREAM0_DEST: - ret_irq = IRQ_IMEM_DMA0; - break; - case CH_IMEM_STREAM1_SRC: - case CH_IMEM_STREAM1_DEST: - ret_irq = IRQ_IMEM_DMA1; - break; - } - return ret_irq; -} - -# define channel2irq(channel) bf561_channel2irq(channel) - -#endif - /*------------------------------------------------------------------------------ * Request the specific DMA channel from the system. *-----------------------------------------------------------------------------*/ diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c index 83060f98d15d..76bf2cea61d7 100644 --- a/arch/blackfin/kernel/setup.c +++ b/arch/blackfin/kernel/setup.c @@ -500,8 +500,9 @@ static void __fill_code_cplbtab(struct cplb_tab *t, int i, cplb_data[i].end, SIZE_4M, cplb_data[i].i_conf); - } else { + } else #endif + { fill_cplbtab(t, cplb_data[i].start, a_start, -- cgit v1.2.1 From 7adfb58fbd0a27469d26536f99b66391c4c8e2a0 Mon Sep 17 00:00:00 2001 From: Bernd Schmidt Date: Thu, 21 Jun 2007 11:34:16 +0800 Subject: Blackfin arch: defines and provides entry points for certain user space functions at fixed addresses This patch defines (and provides) entry points for certain user space functions at fixed addresses. The Blackfin has no usable atomic instructions, but we can ensure that these code sequences appear atomic from a user space point of view by detecting when we're in the process of executing them during the interrupt handler return path. This allows much more efficient pthread lock implementations than the bfin_spinlock syscall we're currently using. Also provided is a small sys_rt_sigreturn stub which can be used by the signal handler setup code. The signal.c part will be committed separately. Signed-off-by: Bernd Schmidt Signed-off-by: Bryan Wu --- arch/blackfin/kernel/Makefile | 3 +- arch/blackfin/kernel/fixed_code.S | 132 ++++++++++++++++++++++++++++++++++++++ arch/blackfin/kernel/process.c | 65 +++++++++++++++++++ arch/blackfin/kernel/setup.c | 22 +++++++ 4 files changed, 221 insertions(+), 1 deletion(-) create mode 100644 arch/blackfin/kernel/fixed_code.S (limited to 'arch/blackfin/kernel') diff --git a/arch/blackfin/kernel/Makefile b/arch/blackfin/kernel/Makefile index 93d21406cade..b7b6de824011 100644 --- a/arch/blackfin/kernel/Makefile +++ b/arch/blackfin/kernel/Makefile @@ -6,7 +6,8 @@ extra-y := init_task.o vmlinux.lds obj-y := \ entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \ - sys_bfin.o time.o traps.o irqchip.o dma-mapping.o flat.o + sys_bfin.o time.o traps.o irqchip.o dma-mapping.o flat.o \ + fixed_code.o obj-$(CONFIG_BF53x) += bfin_gpio.o obj-$(CONFIG_BF561) += bfin_gpio.o diff --git a/arch/blackfin/kernel/fixed_code.S b/arch/blackfin/kernel/fixed_code.S new file mode 100644 index 000000000000..99ea296c82c7 --- /dev/null +++ b/arch/blackfin/kernel/fixed_code.S @@ -0,0 +1,132 @@ +/* + * This file contains sequences of code that will be copied to a + * fixed location, defined in . The interrupt + * handlers ensure that these sequences appear to be atomic when + * executed from userspace. + * These are aligned to 16 bytes, so that we have some space to replace + * these sequences with something else (e.g. kernel traps if we ever do + * BF561 SMP). + */ +#include +#include +#include + +.text +ENTRY(_fixed_code_start) + +.align 16 +ENTRY(_sigreturn_stub) + P0 = __NR_rt_sigreturn; + EXCPT 0; + /* Speculative execution paranoia. */ +0: JUMP.S 0b; +ENDPROC (_sigreturn_stub) + +.align 16 + /* + * Atomic swap, 8 bit. + * Inputs: P0: memory address to use + * R1: value to store + * Output: R0: old contents of the memory address, zero extended. + */ +ENTRY(_atomic_xchg32) + R0 = [P0]; + [P0] = R1; + rts; +ENDPROC (_atomic_xchg32) + +.align 16 + /* + * Compare and swap, 32 bit. + * Inputs: P0: memory address to use + * R1: compare value + * R2: new value to store + * The new value is stored if the contents of the memory + * address is equal to the compare value. + * Output: R0: old contents of the memory address. + */ +ENTRY(_atomic_cas32) + R0 = [P0]; + CC = R0 == R1; + IF !CC JUMP 1f; + [P0] = R2; +1: + rts; +ENDPROC (_atomic_cas32) + +.align 16 + /* + * Atomic add, 32 bit. + * Inputs: P0: memory address to use + * R0: value to add + * Outputs: R0: new contents of the memory address. + * R1: previous contents of the memory address. + */ +ENTRY(_atomic_add32) + R1 = [P0]; + R0 = R1 + R0; + [P0] = R0; + rts; +ENDPROC (_atomic_add32) + +.align 16 + /* + * Atomic sub, 32 bit. + * Inputs: P0: memory address to use + * R0: value to subtract + * Outputs: R0: new contents of the memory address. + * R1: previous contents of the memory address. + */ +ENTRY(_atomic_sub32) + R1 = [P0]; + R0 = R1 - R0; + [P0] = R0; + rts; +ENDPROC (_atomic_sub32) + +.align 16 + /* + * Atomic ior, 32 bit. + * Inputs: P0: memory address to use + * R0: value to ior + * Outputs: R0: new contents of the memory address. + * R1: previous contents of the memory address. + */ +ENTRY(_atomic_ior32) + R1 = [P0]; + R0 = R1 | R0; + [P0] = R0; + rts; +ENDPROC (_atomic_ior32) + +.align 16 + /* + * Atomic ior, 32 bit. + * Inputs: P0: memory address to use + * R0: value to ior + * Outputs: R0: new contents of the memory address. + * R1: previous contents of the memory address. + */ +ENTRY(_atomic_and32) + R1 = [P0]; + R0 = R1 & R0; + [P0] = R0; + rts; +ENDPROC (_atomic_ior32) + +.align 16 + /* + * Atomic ior, 32 bit. + * Inputs: P0: memory address to use + * R0: value to ior + * Outputs: R0: new contents of the memory address. + * R1: previous contents of the memory address. + */ +ENTRY(_atomic_xor32) + R1 = [P0]; + R0 = R1 ^ R0; + [P0] = R0; + rts; +ENDPROC (_atomic_ior32) + +ENTRY(_fixed_code_end) diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c index 3eff7439d8d3..6b7a94ab96c2 100644 --- a/arch/blackfin/kernel/process.c +++ b/arch/blackfin/kernel/process.c @@ -35,6 +35,7 @@ #include #include +#include #define LED_ON 0 #define LED_OFF 1 @@ -350,6 +351,70 @@ unsigned long get_wchan(struct task_struct *p) return 0; } +void finish_atomic_sections (struct pt_regs *regs) +{ + if (regs->pc < ATOMIC_SEQS_START || regs->pc >= ATOMIC_SEQS_END) + return; + + switch (regs->pc) { + case ATOMIC_XCHG32 + 2: + put_user(regs->r1, (int *)regs->p0); + regs->pc += 2; + break; + + case ATOMIC_CAS32 + 2: + case ATOMIC_CAS32 + 4: + if (regs->r0 == regs->r1) + put_user(regs->r2, (int *)regs->p0); + regs->pc = ATOMIC_CAS32 + 8; + break; + case ATOMIC_CAS32 + 6: + put_user(regs->r2, (int *)regs->p0); + regs->pc += 2; + break; + + case ATOMIC_ADD32 + 2: + regs->r0 = regs->r1 + regs->r0; + /* fall through */ + case ATOMIC_ADD32 + 4: + put_user(regs->r0, (int *)regs->p0); + regs->pc = ATOMIC_ADD32 + 6; + break; + + case ATOMIC_SUB32 + 2: + regs->r0 = regs->r1 - regs->r0; + /* fall through */ + case ATOMIC_SUB32 + 4: + put_user(regs->r0, (int *)regs->p0); + regs->pc = ATOMIC_SUB32 + 6; + break; + + case ATOMIC_IOR32 + 2: + regs->r0 = regs->r1 | regs->r0; + /* fall through */ + case ATOMIC_IOR32 + 4: + put_user(regs->r0, (int *)regs->p0); + regs->pc = ATOMIC_IOR32 + 6; + break; + + case ATOMIC_AND32 + 2: + regs->r0 = regs->r1 & regs->r0; + /* fall through */ + case ATOMIC_AND32 + 4: + put_user(regs->r0, (int *)regs->p0); + regs->pc = ATOMIC_AND32 + 6; + break; + + case ATOMIC_XOR32 + 2: + regs->r0 = regs->r1 ^ regs->r0; + /* fall through */ + case ATOMIC_XOR32 + 4: + put_user(regs->r0, (int *)regs->p0); + regs->pc = ATOMIC_XOR32 + 6; + break; + } +} + #if defined(CONFIG_ACCESS_CHECK) int _access_ok(unsigned long addr, unsigned long size) { diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c index 76bf2cea61d7..534227f4da30 100644 --- a/arch/blackfin/kernel/setup.c +++ b/arch/blackfin/kernel/setup.c @@ -42,6 +42,7 @@ #include #include #include +#include u16 _bfin_swrst; @@ -404,6 +405,27 @@ void __init setup_arch(char **cmdline_p) printk(KERN_INFO "Hardware Trace Enabled\n"); bfin_write_TBUFCTL(0x03); + + /* Copy atomic sequences to their fixed location, and sanity check that + these locations are the ones that we advertise to userspace. */ + memcpy((void *)FIXED_CODE_START, &fixed_code_start, + FIXED_CODE_END - FIXED_CODE_START); + BUG_ON((char *)&sigreturn_stub - (char *)&fixed_code_start + != SIGRETURN_STUB - FIXED_CODE_START); + BUG_ON((char *)&atomic_xchg32 - (char *)&fixed_code_start + != ATOMIC_XCHG32 - FIXED_CODE_START); + BUG_ON((char *)&atomic_cas32 - (char *)&fixed_code_start + != ATOMIC_CAS32 - FIXED_CODE_START); + BUG_ON((char *)&atomic_add32 - (char *)&fixed_code_start + != ATOMIC_ADD32 - FIXED_CODE_START); + BUG_ON((char *)&atomic_sub32 - (char *)&fixed_code_start + != ATOMIC_SUB32 - FIXED_CODE_START); + BUG_ON((char *)&atomic_ior32 - (char *)&fixed_code_start + != ATOMIC_IOR32 - FIXED_CODE_START); + BUG_ON((char *)&atomic_and32 - (char *)&fixed_code_start + != ATOMIC_AND32 - FIXED_CODE_START); + BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start + != ATOMIC_XOR32 - FIXED_CODE_START); } static int __init topology_init(void) -- cgit v1.2.1 From 474f1a667d4bd40b6dcacc6870b70f4d2ba4e155 Mon Sep 17 00:00:00 2001 From: Sonic Zhang Date: Fri, 29 Jun 2007 16:35:17 +0800 Subject: Blackfin arch: kgdb specific code Signed-off-by: Sonic Zhang Signed-off-by: Bryan Wu --- arch/blackfin/kernel/Makefile | 1 + arch/blackfin/kernel/kgdb.c | 421 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 422 insertions(+) create mode 100644 arch/blackfin/kernel/kgdb.c (limited to 'arch/blackfin/kernel') diff --git a/arch/blackfin/kernel/Makefile b/arch/blackfin/kernel/Makefile index b7b6de824011..6fac57f6ce06 100644 --- a/arch/blackfin/kernel/Makefile +++ b/arch/blackfin/kernel/Makefile @@ -14,3 +14,4 @@ obj-$(CONFIG_BF561) += bfin_gpio.o obj-$(CONFIG_MODULES) += module.o obj-$(CONFIG_BFIN_DMA_5XX) += bfin_dma_5xx.o obj-$(CONFIG_DUAL_CORE_TEST_MODULE) += dualcore_test.o +obj-$(CONFIG_KGDB) += kgdb.o diff --git a/arch/blackfin/kernel/kgdb.c b/arch/blackfin/kernel/kgdb.c new file mode 100644 index 000000000000..a9c15515bfd7 --- /dev/null +++ b/arch/blackfin/kernel/kgdb.c @@ -0,0 +1,421 @@ +/* + * File: arch/blackfin/kernel/kgdb.c + * Based on: + * Author: Sonic Zhang + * + * Created: + * Description: + * + * Rev: $Id: kgdb_bfin_linux-2.6.x.patch 4934 2007-02-13 09:32:11Z sonicz $ + * + * Modified: + * Copyright 2005-2006 Analog Devices Inc. + * + * Bugs: Enter bugs at http://blackfin.uclinux.org/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see the file COPYING, or write + * to the Free Software Foundation, Inc., + * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include +#include +#include +#include +#include +#include +#include /* for linux pt_regs struct */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Put the error code here just in case the user cares. */ +int gdb_bf533errcode; +/* Likewise, the vector number here (since GDB only gets the signal + number through the usual means, and that's not very specific). */ +int gdb_bf533vector = -1; + +#if KGDB_MAX_NO_CPUS != 8 +#error change the definition of slavecpulocks +#endif + +void regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs) +{ + gdb_regs[BFIN_R0] = regs->r0; + gdb_regs[BFIN_R1] = regs->r1; + gdb_regs[BFIN_R2] = regs->r2; + gdb_regs[BFIN_R3] = regs->r3; + gdb_regs[BFIN_R4] = regs->r4; + gdb_regs[BFIN_R5] = regs->r5; + gdb_regs[BFIN_R6] = regs->r6; + gdb_regs[BFIN_R7] = regs->r7; + gdb_regs[BFIN_P0] = regs->p0; + gdb_regs[BFIN_P1] = regs->p1; + gdb_regs[BFIN_P2] = regs->p2; + gdb_regs[BFIN_P3] = regs->p3; + gdb_regs[BFIN_P4] = regs->p4; + gdb_regs[BFIN_P5] = regs->p5; + gdb_regs[BFIN_SP] = regs->reserved; + gdb_regs[BFIN_FP] = regs->fp; + gdb_regs[BFIN_I0] = regs->i0; + gdb_regs[BFIN_I1] = regs->i1; + gdb_regs[BFIN_I2] = regs->i2; + gdb_regs[BFIN_I3] = regs->i3; + gdb_regs[BFIN_M0] = regs->m0; + gdb_regs[BFIN_M1] = regs->m1; + gdb_regs[BFIN_M2] = regs->m2; + gdb_regs[BFIN_M3] = regs->m3; + gdb_regs[BFIN_B0] = regs->b0; + gdb_regs[BFIN_B1] = regs->b1; + gdb_regs[BFIN_B2] = regs->b2; + gdb_regs[BFIN_B3] = regs->b3; + gdb_regs[BFIN_L0] = regs->l0; + gdb_regs[BFIN_L1] = regs->l1; + gdb_regs[BFIN_L2] = regs->l2; + gdb_regs[BFIN_L3] = regs->l3; + gdb_regs[BFIN_A0_DOT_X] = regs->a0x; + gdb_regs[BFIN_A0_DOT_W] = regs->a0w; + gdb_regs[BFIN_A1_DOT_X] = regs->a1x; + gdb_regs[BFIN_A1_DOT_W] = regs->a1w; + gdb_regs[BFIN_ASTAT] = regs->astat; + gdb_regs[BFIN_RETS] = regs->rets; + gdb_regs[BFIN_LC0] = regs->lc0; + gdb_regs[BFIN_LT0] = regs->lt0; + gdb_regs[BFIN_LB0] = regs->lb0; + gdb_regs[BFIN_LC1] = regs->lc1; + gdb_regs[BFIN_LT1] = regs->lt1; + gdb_regs[BFIN_LB1] = regs->lb1; + gdb_regs[BFIN_CYCLES] = 0; + gdb_regs[BFIN_CYCLES2] = 0; + gdb_regs[BFIN_USP] = regs->usp; + gdb_regs[BFIN_SEQSTAT] = regs->seqstat; + gdb_regs[BFIN_SYSCFG] = regs->syscfg; + gdb_regs[BFIN_RETI] = regs->pc; + gdb_regs[BFIN_RETX] = regs->retx; + gdb_regs[BFIN_RETN] = regs->retn; + gdb_regs[BFIN_RETE] = regs->rete; + gdb_regs[BFIN_PC] = regs->pc; + gdb_regs[BFIN_CC] = 0; + gdb_regs[BFIN_EXTRA1] = 0; + gdb_regs[BFIN_EXTRA2] = 0; + gdb_regs[BFIN_EXTRA3] = 0; + gdb_regs[BFIN_IPEND] = regs->ipend; +} + +/* + * Extracts ebp, esp and eip values understandable by gdb from the values + * saved by switch_to. + * thread.esp points to ebp. flags and ebp are pushed in switch_to hence esp + * prior to entering switch_to is 8 greater then the value that is saved. + * If switch_to changes, change following code appropriately. + */ +void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p) +{ + gdb_regs[BFIN_SP] = p->thread.ksp; + gdb_regs[BFIN_PC] = p->thread.pc; + gdb_regs[BFIN_SEQSTAT] = p->thread.seqstat; +} + +void gdb_regs_to_regs(unsigned long *gdb_regs, struct pt_regs *regs) +{ + regs->r0 = gdb_regs[BFIN_R0]; + regs->r1 = gdb_regs[BFIN_R1]; + regs->r2 = gdb_regs[BFIN_R2]; + regs->r3 = gdb_regs[BFIN_R3]; + regs->r4 = gdb_regs[BFIN_R4]; + regs->r5 = gdb_regs[BFIN_R5]; + regs->r6 = gdb_regs[BFIN_R6]; + regs->r7 = gdb_regs[BFIN_R7]; + regs->p0 = gdb_regs[BFIN_P0]; + regs->p1 = gdb_regs[BFIN_P1]; + regs->p2 = gdb_regs[BFIN_P2]; + regs->p3 = gdb_regs[BFIN_P3]; + regs->p4 = gdb_regs[BFIN_P4]; + regs->p5 = gdb_regs[BFIN_P5]; + regs->fp = gdb_regs[BFIN_FP]; + regs->i0 = gdb_regs[BFIN_I0]; + regs->i1 = gdb_regs[BFIN_I1]; + regs->i2 = gdb_regs[BFIN_I2]; + regs->i3 = gdb_regs[BFIN_I3]; + regs->m0 = gdb_regs[BFIN_M0]; + regs->m1 = gdb_regs[BFIN_M1]; + regs->m2 = gdb_regs[BFIN_M2]; + regs->m3 = gdb_regs[BFIN_M3]; + regs->b0 = gdb_regs[BFIN_B0]; + regs->b1 = gdb_regs[BFIN_B1]; + regs->b2 = gdb_regs[BFIN_B2]; + regs->b3 = gdb_regs[BFIN_B3]; + regs->l0 = gdb_regs[BFIN_L0]; + regs->l1 = gdb_regs[BFIN_L1]; + regs->l2 = gdb_regs[BFIN_L2]; + regs->l3 = gdb_regs[BFIN_L3]; + regs->a0x = gdb_regs[BFIN_A0_DOT_X]; + regs->a0w = gdb_regs[BFIN_A0_DOT_W]; + regs->a1x = gdb_regs[BFIN_A1_DOT_X]; + regs->a1w = gdb_regs[BFIN_A1_DOT_W]; + regs->rets = gdb_regs[BFIN_RETS]; + regs->lc0 = gdb_regs[BFIN_LC0]; + regs->lt0 = gdb_regs[BFIN_LT0]; + regs->lb0 = gdb_regs[BFIN_LB0]; + regs->lc1 = gdb_regs[BFIN_LC1]; + regs->lt1 = gdb_regs[BFIN_LT1]; + regs->lb1 = gdb_regs[BFIN_LB1]; + regs->usp = gdb_regs[BFIN_USP]; + regs->syscfg = gdb_regs[BFIN_SYSCFG]; + regs->retx = gdb_regs[BFIN_PC]; + regs->retn = gdb_regs[BFIN_RETN]; + regs->rete = gdb_regs[BFIN_RETE]; + regs->pc = gdb_regs[BFIN_PC]; + +#if 0 /* can't change these */ + regs->astat = gdb_regs[BFIN_ASTAT]; + regs->seqstat = gdb_regs[BFIN_SEQSTAT]; + regs->ipend = gdb_regs[BFIN_IPEND]; +#endif +} + +struct hw_breakpoint { + unsigned int occupied:1; + unsigned int skip:1; + unsigned int enabled:1; + unsigned int type:1; + unsigned int dataacc:2; + unsigned short count; + unsigned int addr; +} breakinfo[HW_BREAKPOINT_NUM]; + +int kgdb_arch_init(void) +{ + kgdb_remove_all_hw_break(); + return 0; +} + +int kgdb_set_hw_break(unsigned long addr) +{ + int breakno; + for (breakno = 0; breakno < HW_BREAKPOINT_NUM; breakno++) + if (!breakinfo[breakno].occupied) { + breakinfo[breakno].occupied = 1; + breakinfo[breakno].enabled = 1; + breakinfo[breakno].type = 1; + breakinfo[breakno].addr = addr; + return 0; + } + + return -ENOSPC; +} + +int kgdb_remove_hw_break(unsigned long addr) +{ + int breakno; + for (breakno = 0; breakno < HW_BREAKPOINT_NUM; breakno++) + if (breakinfo[breakno].addr == addr) + memset(&(breakinfo[breakno]), 0, sizeof(struct hw_breakpoint)); + + return 0; +} + +void kgdb_remove_all_hw_break(void) +{ + memset(breakinfo, 0, sizeof(struct hw_breakpoint)*8); +} + +/* +void kgdb_show_info(void) +{ + printk(KERN_DEBUG "hwd: wpia0=0x%x, wpiacnt0=%d, wpiactl=0x%x, wpstat=0x%x\n", + bfin_read_WPIA0(), bfin_read_WPIACNT0(), + bfin_read_WPIACTL(), bfin_read_WPSTAT()); +} +*/ + +void kgdb_correct_hw_break(void) +{ + int breakno; + int correctit; + uint32_t wpdactl = bfin_read_WPDACTL(); + + correctit = 0; + for (breakno = 0; breakno < HW_BREAKPOINT_NUM; breakno++) { + if (breakinfo[breakno].type == 1) { + switch (breakno) { + case 0: + if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN0)) { + correctit = 1; + wpdactl &= ~(WPIREN01|EMUSW0); + wpdactl |= WPIAEN0|WPICNTEN0; + bfin_write_WPIA0(breakinfo[breakno].addr); + bfin_write_WPIACNT0(breakinfo[breakno].skip); + } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN0)) { + correctit = 1; + wpdactl &= ~WPIAEN0; + } + break; + + case 1: + if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN1)) { + correctit = 1; + wpdactl &= ~(WPIREN01|EMUSW1); + wpdactl |= WPIAEN1|WPICNTEN1; + bfin_write_WPIA1(breakinfo[breakno].addr); + bfin_write_WPIACNT1(breakinfo[breakno].skip); + } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN1)) { + correctit = 1; + wpdactl &= ~WPIAEN1; + } + break; + + case 2: + if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN2)) { + correctit = 1; + wpdactl &= ~(WPIREN23|EMUSW2); + wpdactl |= WPIAEN2|WPICNTEN2; + bfin_write_WPIA2(breakinfo[breakno].addr); + bfin_write_WPIACNT2(breakinfo[breakno].skip); + } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN2)) { + correctit = 1; + wpdactl &= ~WPIAEN2; + } + break; + + case 3: + if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN3)) { + correctit = 1; + wpdactl &= ~(WPIREN23|EMUSW3); + wpdactl |= WPIAEN3|WPICNTEN3; + bfin_write_WPIA3(breakinfo[breakno].addr); + bfin_write_WPIACNT3(breakinfo[breakno].skip); + } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN3)) { + correctit = 1; + wpdactl &= ~WPIAEN3; + } + break; + case 4: + if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN4)) { + correctit = 1; + wpdactl &= ~(WPIREN45|EMUSW4); + wpdactl |= WPIAEN4|WPICNTEN4; + bfin_write_WPIA4(breakinfo[breakno].addr); + bfin_write_WPIACNT4(breakinfo[breakno].skip); + } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN4)) { + correctit = 1; + wpdactl &= ~WPIAEN4; + } + break; + case 5: + if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN5)) { + correctit = 1; + wpdactl &= ~(WPIREN45|EMUSW5); + wpdactl |= WPIAEN5|WPICNTEN5; + bfin_write_WPIA5(breakinfo[breakno].addr); + bfin_write_WPIACNT5(breakinfo[breakno].skip); + } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN5)) { + correctit = 1; + wpdactl &= ~WPIAEN5; + } + break; + } + } + } + if (correctit) { + wpdactl &= ~WPAND; + wpdactl |= WPPWR; + /*printk("correct_hw_break: wpdactl=0x%x\n", wpdactl);*/ + bfin_write_WPDACTL(wpdactl); + CSYNC(); + /*kgdb_show_info();*/ + } +} + +void kgdb_disable_hw_debug(struct pt_regs *regs) +{ + /* Disable hardware debugging while we are in kgdb */ + bfin_write_WPIACTL(bfin_read_WPIACTL() & ~0x1); + CSYNC(); +} + +void kgdb_post_master_code(struct pt_regs *regs, int eVector, int err_code) +{ + /* Master processor is completely in the debugger */ + gdb_bf533vector = eVector; + gdb_bf533errcode = err_code; +} + +int kgdb_arch_handle_exception(int exceptionVector, int signo, + int err_code, char *remcom_in_buffer, + char *remcom_out_buffer, + struct pt_regs *linux_regs) +{ + long addr; + long breakno; + char *ptr; + int newPC; + int wp_status; + + switch (remcom_in_buffer[0]) { + case 'c': + case 's': + if (kgdb_contthread && kgdb_contthread != current) { + strcpy(remcom_out_buffer, "E00"); + break; + } + + kgdb_contthread = NULL; + + /* try to read optional parameter, pc unchanged if no parm */ + ptr = &remcom_in_buffer[1]; + if (kgdb_hex2long(&ptr, &addr)) { + linux_regs->retx = addr; + } + newPC = linux_regs->retx; + + /* clear the trace bit */ + linux_regs->syscfg &= 0xfffffffe; + + /* set the trace bit if we're stepping */ + if (remcom_in_buffer[0] == 's') { + linux_regs->syscfg |= 0x1; + debugger_step = 1; + } + + wp_status = bfin_read_WPSTAT(); + CSYNC(); + + if (exceptionVector == VEC_WATCH) { + for (breakno = 0; breakno < 6; ++breakno) { + if (wp_status & (1 << breakno)) { + breakinfo->skip = 1; + break; + } + } + } + kgdb_correct_hw_break(); + + bfin_write_WPSTAT(0); + + return 0; + } /* switch */ + return -1; /* this means that we do not want to exit from the handler */ +} + +struct kgdb_arch arch_kgdb_ops = { + .gdb_bpt_instr = {0xa1}, + .flags = KGDB_HW_BREAKPOINT, +}; -- cgit v1.2.1 From 29440a2b4cd37e32dfe0fa60ef1665775b24dab1 Mon Sep 17 00:00:00 2001 From: Bernd Schmidt Date: Thu, 12 Jul 2007 16:25:29 +0800 Subject: Blackfin arch: Start untangling the CPLB handling code. - Move cache initialization to C from assembly. - Move anomaly workaround for writing [ID]MEM_CONTROL to assembly, so that we don't have to mess around with .align directives in C source. - Fix a bug where bfin_write_DMEM_CONTROL would write to IMEM_CONTROL - Break out CPLB related code from kernel/setup.c into their own file. - Don't define variables in header files, only declare them. Signed-off-by: Bernd Schmidt Signed-off-by: Bryan Wu --- arch/blackfin/kernel/Makefile | 2 +- arch/blackfin/kernel/cacheinit.c | 66 ++++++ arch/blackfin/kernel/cplbinit.c | 433 +++++++++++++++++++++++++++++++++++++++ arch/blackfin/kernel/setup.c | 289 +------------------------- 4 files changed, 502 insertions(+), 288 deletions(-) create mode 100644 arch/blackfin/kernel/cacheinit.c create mode 100644 arch/blackfin/kernel/cplbinit.c (limited to 'arch/blackfin/kernel') diff --git a/arch/blackfin/kernel/Makefile b/arch/blackfin/kernel/Makefile index 6fac57f6ce06..f429ebc3a961 100644 --- a/arch/blackfin/kernel/Makefile +++ b/arch/blackfin/kernel/Makefile @@ -7,7 +7,7 @@ extra-y := init_task.o vmlinux.lds obj-y := \ entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \ sys_bfin.o time.o traps.o irqchip.o dma-mapping.o flat.o \ - fixed_code.o + fixed_code.o cplbinit.o cacheinit.o obj-$(CONFIG_BF53x) += bfin_gpio.o obj-$(CONFIG_BF561) += bfin_gpio.o diff --git a/arch/blackfin/kernel/cacheinit.c b/arch/blackfin/kernel/cacheinit.c new file mode 100644 index 000000000000..4d41a40e8133 --- /dev/null +++ b/arch/blackfin/kernel/cacheinit.c @@ -0,0 +1,66 @@ +/* + * Copyright 2004-2007 Analog Devices Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see the file COPYING, or write + * to the Free Software Foundation, Inc., + * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include + +#include +#include +#include + +#if defined(CONFIG_BLKFIN_CACHE) +void bfin_icache_init(void) +{ + unsigned long *table = icplb_table; + unsigned long ctrl; + int i; + + for (i = 0; i < MAX_CPLBS; i++) { + unsigned long addr = *table++; + unsigned long data = *table++; + if (addr == (unsigned long)-1) + break; + bfin_write32(ICPLB_ADDR0 + i * 4, addr); + bfin_write32(ICPLB_DATA0 + i * 4, data); + } + ctrl = bfin_read_IMEM_CONTROL(); + ctrl |= IMC | ENICPLB; + bfin_write_IMEM_CONTROL(ctrl); +} +#endif + +#if defined(CONFIG_BLKFIN_DCACHE) +void bfin_dcache_init(void) +{ + unsigned long *table = dcplb_table; + unsigned long ctrl; + int i; + + for (i = 0; i < MAX_CPLBS; i++) { + unsigned long addr = *table++; + unsigned long data = *table++; + if (addr == (unsigned long)-1) + break; + bfin_write32(DCPLB_ADDR0 + i * 4, addr); + bfin_write32(DCPLB_DATA0 + i * 4, data); + } + ctrl = bfin_read_DMEM_CONTROL(); + ctrl |= DMEM_CNTR; + bfin_write_DMEM_CONTROL(ctrl); +} +#endif diff --git a/arch/blackfin/kernel/cplbinit.c b/arch/blackfin/kernel/cplbinit.c new file mode 100644 index 000000000000..bbdb403fcb55 --- /dev/null +++ b/arch/blackfin/kernel/cplbinit.c @@ -0,0 +1,433 @@ +/* + * Blackfin CPLB initialization + * + * Copyright 2004-2007 Analog Devices Inc. + * + * Bugs: Enter bugs at http://blackfin.uclinux.org/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see the file COPYING, or write + * to the Free Software Foundation, Inc., + * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ +#include + +#include +#include + +u_long icplb_table[MAX_CPLBS+1]; +u_long dcplb_table[MAX_CPLBS+1]; + +#ifdef CONFIG_CPLB_SWITCH_TAB_L1 +u_long ipdt_table[MAX_SWITCH_I_CPLBS+1]__attribute__((l1_data)); +u_long dpdt_table[MAX_SWITCH_D_CPLBS+1]__attribute__((l1_data)); + +#ifdef CONFIG_CPLB_INFO +u_long ipdt_swapcount_table[MAX_SWITCH_I_CPLBS]__attribute__((l1_data)); +u_long dpdt_swapcount_table[MAX_SWITCH_D_CPLBS]__attribute__((l1_data)); +#endif /* CONFIG_CPLB_INFO */ + +#else + +u_long ipdt_table[MAX_SWITCH_I_CPLBS+1]; +u_long dpdt_table[MAX_SWITCH_D_CPLBS+1]; + +#ifdef CONFIG_CPLB_INFO +u_long ipdt_swapcount_table[MAX_SWITCH_I_CPLBS]; +u_long dpdt_swapcount_table[MAX_SWITCH_D_CPLBS]; +#endif /* CONFIG_CPLB_INFO */ + +#endif /*CONFIG_CPLB_SWITCH_TAB_L1*/ + +struct s_cplb { + struct cplb_tab init_i; + struct cplb_tab init_d; + struct cplb_tab switch_i; + struct cplb_tab switch_d; +}; + +#if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE) +static struct cplb_desc cplb_data[] = { + { + .start = 0, + .end = SIZE_1K, + .psize = SIZE_1K, + .attr = INITIAL_T | SWITCH_T | I_CPLB | D_CPLB, + .i_conf = SDRAM_OOPS, + .d_conf = SDRAM_OOPS, +#if defined(CONFIG_DEBUG_HUNT_FOR_ZERO) + .valid = 1, +#else + .valid = 0, +#endif + .name = "ZERO Pointer Saveguard", + }, + { + .start = L1_CODE_START, + .end = L1_CODE_START + L1_CODE_LENGTH, + .psize = SIZE_4M, + .attr = INITIAL_T | SWITCH_T | I_CPLB, + .i_conf = L1_IMEMORY, + .d_conf = 0, + .valid = 1, + .name = "L1 I-Memory", + }, + { + .start = L1_DATA_A_START, + .end = L1_DATA_B_START + L1_DATA_B_LENGTH, + .psize = SIZE_4M, + .attr = INITIAL_T | SWITCH_T | D_CPLB, + .i_conf = 0, + .d_conf = L1_DMEMORY, +#if ((L1_DATA_A_LENGTH > 0) || (L1_DATA_B_LENGTH > 0)) + .valid = 1, +#else + .valid = 0, +#endif + .name = "L1 D-Memory", + }, + { + .start = 0, + .end = 0, /* dynamic */ + .psize = 0, + .attr = INITIAL_T | SWITCH_T | I_CPLB | D_CPLB, + .i_conf = SDRAM_IGENERIC, + .d_conf = SDRAM_DGENERIC, + .valid = 1, + .name = "SDRAM Kernel", + }, + { + .start = 0, /* dynamic */ + .end = 0, /* dynamic */ + .psize = 0, + .attr = INITIAL_T | SWITCH_T | D_CPLB, + .i_conf = SDRAM_IGENERIC, + .d_conf = SDRAM_DNON_CHBL, + .valid = 1, + .name = "SDRAM RAM MTD", + }, + { + .start = 0, /* dynamic */ + .end = 0, /* dynamic */ + .psize = SIZE_1M, + .attr = INITIAL_T | SWITCH_T | D_CPLB, + .d_conf = SDRAM_DNON_CHBL, + .valid = 1, + .name = "SDRAM Uncached DMA ZONE", + }, + { + .start = 0, /* dynamic */ + .end = 0, /* dynamic */ + .psize = 0, + .attr = SWITCH_T | D_CPLB, + .i_conf = 0, /* dynamic */ + .d_conf = 0, /* dynamic */ + .valid = 1, + .name = "SDRAM Reserved Memory", + }, + { + .start = ASYNC_BANK0_BASE, + .end = ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE, + .psize = 0, + .attr = SWITCH_T | D_CPLB, + .d_conf = SDRAM_EBIU, + .valid = 1, + .name = "ASYNC Memory", + }, + { +#if defined(CONFIG_BF561) + .start = L2_SRAM, + .end = L2_SRAM_END, + .psize = SIZE_1M, + .attr = SWITCH_T | D_CPLB, + .i_conf = L2_MEMORY, + .d_conf = L2_MEMORY, + .valid = 1, +#else + .valid = 0, +#endif + .name = "L2 Memory", + } +}; + +static u16 __init lock_kernel_check(u32 start, u32 end) +{ + if ((start <= (u32) _stext && end >= (u32) _end) + || (start >= (u32) _stext && end <= (u32) _end)) + return IN_KERNEL; + return 0; +} + +static unsigned short __init +fill_cplbtab(struct cplb_tab *table, + unsigned long start, unsigned long end, + unsigned long block_size, unsigned long cplb_data) +{ + int i; + + switch (block_size) { + case SIZE_4M: + i = 3; + break; + case SIZE_1M: + i = 2; + break; + case SIZE_4K: + i = 1; + break; + case SIZE_1K: + default: + i = 0; + break; + } + + cplb_data = (cplb_data & ~(3 << 16)) | (i << 16); + + while ((start < end) && (table->pos < table->size)) { + + table->tab[table->pos++] = start; + + if (lock_kernel_check(start, start + block_size) == IN_KERNEL) + table->tab[table->pos++] = + cplb_data | CPLB_LOCK | CPLB_DIRTY; + else + table->tab[table->pos++] = cplb_data; + + start += block_size; + } + return 0; +} + +static unsigned short __init +close_cplbtab(struct cplb_tab *table) +{ + + while (table->pos < table->size) { + + table->tab[table->pos++] = 0; + table->tab[table->pos++] = 0; /* !CPLB_VALID */ + } + return 0; +} + +/* helper function */ +static void __fill_code_cplbtab(struct cplb_tab *t, int i, u32 a_start, u32 a_end) +{ + if (cplb_data[i].psize) { + fill_cplbtab(t, + cplb_data[i].start, + cplb_data[i].end, + cplb_data[i].psize, + cplb_data[i].i_conf); + } else { +#if (defined(CONFIG_BLKFIN_CACHE) && defined(ANOMALY_05000263)) + if (i == SDRAM_KERN) { + fill_cplbtab(t, + cplb_data[i].start, + cplb_data[i].end, + SIZE_4M, + cplb_data[i].i_conf); + } else +#endif + { + fill_cplbtab(t, + cplb_data[i].start, + a_start, + SIZE_1M, + cplb_data[i].i_conf); + fill_cplbtab(t, + a_start, + a_end, + SIZE_4M, + cplb_data[i].i_conf); + fill_cplbtab(t, a_end, + cplb_data[i].end, + SIZE_1M, + cplb_data[i].i_conf); + } + } +} + +static void __fill_data_cplbtab(struct cplb_tab *t, int i, u32 a_start, u32 a_end) +{ + if (cplb_data[i].psize) { + fill_cplbtab(t, + cplb_data[i].start, + cplb_data[i].end, + cplb_data[i].psize, + cplb_data[i].d_conf); + } else { + fill_cplbtab(t, + cplb_data[i].start, + a_start, SIZE_1M, + cplb_data[i].d_conf); + fill_cplbtab(t, a_start, + a_end, SIZE_4M, + cplb_data[i].d_conf); + fill_cplbtab(t, a_end, + cplb_data[i].end, + SIZE_1M, + cplb_data[i].d_conf); + } +} + +void __init generate_cpl_tables(void) +{ + + u16 i, j, process; + u32 a_start, a_end, as, ae, as_1m; + + struct cplb_tab *t_i = NULL; + struct cplb_tab *t_d = NULL; + struct s_cplb cplb; + + cplb.init_i.size = MAX_CPLBS; + cplb.init_d.size = MAX_CPLBS; + cplb.switch_i.size = MAX_SWITCH_I_CPLBS; + cplb.switch_d.size = MAX_SWITCH_D_CPLBS; + + cplb.init_i.pos = 0; + cplb.init_d.pos = 0; + cplb.switch_i.pos = 0; + cplb.switch_d.pos = 0; + + cplb.init_i.tab = icplb_table; + cplb.init_d.tab = dcplb_table; + cplb.switch_i.tab = ipdt_table; + cplb.switch_d.tab = dpdt_table; + + cplb_data[SDRAM_KERN].end = memory_end; + +#ifdef CONFIG_MTD_UCLINUX + cplb_data[SDRAM_RAM_MTD].start = memory_mtd_start; + cplb_data[SDRAM_RAM_MTD].end = memory_mtd_start + mtd_size; + cplb_data[SDRAM_RAM_MTD].valid = mtd_size > 0; +# if defined(CONFIG_ROMFS_FS) + cplb_data[SDRAM_RAM_MTD].attr |= I_CPLB; + + /* + * The ROMFS_FS size is often not multiple of 1MB. + * This can cause multiple CPLB sets covering the same memory area. + * This will then cause multiple CPLB hit exceptions. + * Workaround: We ensure a contiguous memory area by extending the kernel + * memory section over the mtd section. + * For ROMFS_FS memory must be covered with ICPLBs anyways. + * So there is no difference between kernel and mtd memory setup. + */ + + cplb_data[SDRAM_KERN].end = memory_mtd_start + mtd_size;; + cplb_data[SDRAM_RAM_MTD].valid = 0; + +# endif +#else + cplb_data[SDRAM_RAM_MTD].valid = 0; +#endif + + cplb_data[SDRAM_DMAZ].start = _ramend - DMA_UNCACHED_REGION; + cplb_data[SDRAM_DMAZ].end = _ramend; + + cplb_data[RES_MEM].start = _ramend; + cplb_data[RES_MEM].end = physical_mem_end; + + if (reserved_mem_dcache_on) + cplb_data[RES_MEM].d_conf = SDRAM_DGENERIC; + else + cplb_data[RES_MEM].d_conf = SDRAM_DNON_CHBL; + + if (reserved_mem_icache_on) + cplb_data[RES_MEM].i_conf = SDRAM_IGENERIC; + else + cplb_data[RES_MEM].i_conf = SDRAM_INON_CHBL; + + for (i = ZERO_P; i <= L2_MEM; i++) { + if (!cplb_data[i].valid) + continue; + + as_1m = cplb_data[i].start % SIZE_1M; + + /* We need to make sure all sections are properly 1M aligned + * However between Kernel Memory and the Kernel mtd section, depending on the + * rootfs size, there can be overlapping memory areas. + */ + + if (as_1m && i != L1I_MEM && i != L1D_MEM) { +#ifdef CONFIG_MTD_UCLINUX + if (i == SDRAM_RAM_MTD) { + if ((cplb_data[SDRAM_KERN].end + 1) > cplb_data[SDRAM_RAM_MTD].start) + cplb_data[SDRAM_RAM_MTD].start = (cplb_data[i].start & (-2*SIZE_1M)) + SIZE_1M; + else + cplb_data[SDRAM_RAM_MTD].start = (cplb_data[i].start & (-2*SIZE_1M)); + } else +#endif + printk(KERN_WARNING "Unaligned Start of %s at 0x%X\n", + cplb_data[i].name, cplb_data[i].start); + } + + as = cplb_data[i].start % SIZE_4M; + ae = cplb_data[i].end % SIZE_4M; + + if (as) + a_start = cplb_data[i].start + (SIZE_4M - (as)); + else + a_start = cplb_data[i].start; + + a_end = cplb_data[i].end - ae; + + for (j = INITIAL_T; j <= SWITCH_T; j++) { + + switch (j) { + case INITIAL_T: + if (cplb_data[i].attr & INITIAL_T) { + t_i = &cplb.init_i; + t_d = &cplb.init_d; + process = 1; + } else + process = 0; + break; + case SWITCH_T: + if (cplb_data[i].attr & SWITCH_T) { + t_i = &cplb.switch_i; + t_d = &cplb.switch_d; + process = 1; + } else + process = 0; + break; + default: + process = 0; + break; + } + + if (!process) + continue; + if (cplb_data[i].attr & I_CPLB) + __fill_code_cplbtab(t_i, i, a_start, a_end); + + if (cplb_data[i].attr & D_CPLB) + __fill_data_cplbtab(t_d, i, a_start, a_end); + } + } + +/* close tables */ + + close_cplbtab(&cplb.init_i); + close_cplbtab(&cplb.init_d); + + cplb.init_i.tab[cplb.init_i.pos] = -1; + cplb.init_d.tab[cplb.init_d.pos] = -1; + cplb.switch_i.tab[cplb.switch_i.pos] = -1; + cplb.switch_d.tab[cplb.switch_d.pos] = -1; + +} + +#endif + diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c index 534227f4da30..07c1cfdc958e 100644 --- a/arch/blackfin/kernel/setup.c +++ b/arch/blackfin/kernel/setup.c @@ -64,10 +64,6 @@ EXPORT_SYMBOL(mtd_size); char __initdata command_line[COMMAND_LINE_SIZE]; -#if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE) -static void generate_cpl_tables(void); -#endif - void __init bf53x_cache_init(void) { #if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE) @@ -401,8 +397,6 @@ void __init setup_arch(char **cmdline_p) _bfin_swrst = bfin_read_SWRST(); #endif - bf53x_cache_init(); - printk(KERN_INFO "Hardware Trace Enabled\n"); bfin_write_TBUFCTL(0x03); @@ -426,6 +420,8 @@ void __init setup_arch(char **cmdline_p) != ATOMIC_AND32 - FIXED_CODE_START); BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start != ATOMIC_XOR32 - FIXED_CODE_START); + + bf53x_cache_init(); } static int __init topology_init(void) @@ -443,287 +439,6 @@ static int __init topology_init(void) subsys_initcall(topology_init); -#if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE) -static u16 __init lock_kernel_check(u32 start, u32 end) -{ - if ((start <= (u32) _stext && end >= (u32) _end) - || (start >= (u32) _stext && end <= (u32) _end)) - return IN_KERNEL; - return 0; -} - -static unsigned short __init -fill_cplbtab(struct cplb_tab *table, - unsigned long start, unsigned long end, - unsigned long block_size, unsigned long cplb_data) -{ - int i; - - switch (block_size) { - case SIZE_4M: - i = 3; - break; - case SIZE_1M: - i = 2; - break; - case SIZE_4K: - i = 1; - break; - case SIZE_1K: - default: - i = 0; - break; - } - - cplb_data = (cplb_data & ~(3 << 16)) | (i << 16); - - while ((start < end) && (table->pos < table->size)) { - - table->tab[table->pos++] = start; - - if (lock_kernel_check(start, start + block_size) == IN_KERNEL) - table->tab[table->pos++] = - cplb_data | CPLB_LOCK | CPLB_DIRTY; - else - table->tab[table->pos++] = cplb_data; - - start += block_size; - } - return 0; -} - -static unsigned short __init -close_cplbtab(struct cplb_tab *table) -{ - - while (table->pos < table->size) { - - table->tab[table->pos++] = 0; - table->tab[table->pos++] = 0; /* !CPLB_VALID */ - } - return 0; -} - -/* helper function */ -static void __fill_code_cplbtab(struct cplb_tab *t, int i, - u32 a_start, u32 a_end) -{ - if (cplb_data[i].psize) { - fill_cplbtab(t, - cplb_data[i].start, - cplb_data[i].end, - cplb_data[i].psize, - cplb_data[i].i_conf); - } else { -#if (defined(CONFIG_BLKFIN_CACHE) && defined(ANOMALY_05000263)) - if (i == SDRAM_KERN) { - fill_cplbtab(t, - cplb_data[i].start, - cplb_data[i].end, - SIZE_4M, - cplb_data[i].i_conf); - } else -#endif - { - fill_cplbtab(t, - cplb_data[i].start, - a_start, - SIZE_1M, - cplb_data[i].i_conf); - fill_cplbtab(t, - a_start, - a_end, - SIZE_4M, - cplb_data[i].i_conf); - fill_cplbtab(t, a_end, - cplb_data[i].end, - SIZE_1M, - cplb_data[i].i_conf); - } - } -} - -static void __fill_data_cplbtab(struct cplb_tab *t, int i, - u32 a_start, u32 a_end) -{ - if (cplb_data[i].psize) { - fill_cplbtab(t, - cplb_data[i].start, - cplb_data[i].end, - cplb_data[i].psize, - cplb_data[i].d_conf); - } else { - fill_cplbtab(t, - cplb_data[i].start, - a_start, SIZE_1M, - cplb_data[i].d_conf); - fill_cplbtab(t, a_start, - a_end, SIZE_4M, - cplb_data[i].d_conf); - fill_cplbtab(t, a_end, - cplb_data[i].end, - SIZE_1M, - cplb_data[i].d_conf); - } -} -static void __init generate_cpl_tables(void) -{ - - u16 i, j, process; - u32 a_start, a_end, as, ae, as_1m; - - struct cplb_tab *t_i = NULL; - struct cplb_tab *t_d = NULL; - struct s_cplb cplb; - - cplb.init_i.size = MAX_CPLBS; - cplb.init_d.size = MAX_CPLBS; - cplb.switch_i.size = MAX_SWITCH_I_CPLBS; - cplb.switch_d.size = MAX_SWITCH_D_CPLBS; - - cplb.init_i.pos = 0; - cplb.init_d.pos = 0; - cplb.switch_i.pos = 0; - cplb.switch_d.pos = 0; - - cplb.init_i.tab = icplb_table; - cplb.init_d.tab = dcplb_table; - cplb.switch_i.tab = ipdt_table; - cplb.switch_d.tab = dpdt_table; - - cplb_data[SDRAM_KERN].end = memory_end; - -#ifdef CONFIG_MTD_UCLINUX - cplb_data[SDRAM_RAM_MTD].start = memory_mtd_start; - cplb_data[SDRAM_RAM_MTD].end = memory_mtd_start + mtd_size; - cplb_data[SDRAM_RAM_MTD].valid = mtd_size > 0; -# if defined(CONFIG_ROMFS_FS) - cplb_data[SDRAM_RAM_MTD].attr |= I_CPLB; - - /* - * The ROMFS_FS size is often not multiple of 1MB. - * This can cause multiple CPLB sets covering the same memory area. - * This will then cause multiple CPLB hit exceptions. - * Workaround: We ensure a contiguous memory area by extending the kernel - * memory section over the mtd section. - * For ROMFS_FS memory must be covered with ICPLBs anyways. - * So there is no difference between kernel and mtd memory setup. - */ - - cplb_data[SDRAM_KERN].end = memory_mtd_start + mtd_size;; - cplb_data[SDRAM_RAM_MTD].valid = 0; - -# endif -#else - cplb_data[SDRAM_RAM_MTD].valid = 0; -#endif - - cplb_data[SDRAM_DMAZ].start = _ramend - DMA_UNCACHED_REGION; - cplb_data[SDRAM_DMAZ].end = _ramend; - - cplb_data[RES_MEM].start = _ramend; - cplb_data[RES_MEM].end = physical_mem_end; - - if (reserved_mem_dcache_on) - cplb_data[RES_MEM].d_conf = SDRAM_DGENERIC; - else - cplb_data[RES_MEM].d_conf = SDRAM_DNON_CHBL; - - if (reserved_mem_icache_on) - cplb_data[RES_MEM].i_conf = SDRAM_IGENERIC; - else - cplb_data[RES_MEM].i_conf = SDRAM_INON_CHBL; - - for (i = ZERO_P; i <= L2_MEM; i++) { - if (!cplb_data[i].valid) - continue; - - as_1m = cplb_data[i].start % SIZE_1M; - - /* - * We need to make sure all sections are properly 1M aligned - * However between Kernel Memory and the Kernel mtd section, - * depending on the rootfs size, there can be overlapping - * memory areas. - */ - - if (as_1m && i != L1I_MEM && i != L1D_MEM) { -#ifdef CONFIG_MTD_UCLINUX - if (i == SDRAM_RAM_MTD) { - if ((cplb_data[SDRAM_KERN].end + 1) > - cplb_data[SDRAM_RAM_MTD].start) - cplb_data[SDRAM_RAM_MTD].start = - (cplb_data[i].start & - (-2*SIZE_1M)) + SIZE_1M; - else - cplb_data[SDRAM_RAM_MTD].start = - (cplb_data[i].start & - (-2*SIZE_1M)); - } else -#endif - printk(KERN_WARNING - "Unaligned Start of %s at 0x%X\n", - cplb_data[i].name, cplb_data[i].start); - } - - as = cplb_data[i].start % SIZE_4M; - ae = cplb_data[i].end % SIZE_4M; - - if (as) - a_start = cplb_data[i].start + (SIZE_4M - (as)); - else - a_start = cplb_data[i].start; - - a_end = cplb_data[i].end - ae; - - for (j = INITIAL_T; j <= SWITCH_T; j++) { - - switch (j) { - case INITIAL_T: - if (cplb_data[i].attr & INITIAL_T) { - t_i = &cplb.init_i; - t_d = &cplb.init_d; - process = 1; - } else - process = 0; - break; - case SWITCH_T: - if (cplb_data[i].attr & SWITCH_T) { - t_i = &cplb.switch_i; - t_d = &cplb.switch_d; - process = 1; - } else - process = 0; - break; - default: - process = 0; - break; - } - - if (!process) - continue; - if (cplb_data[i].attr & I_CPLB) - __fill_code_cplbtab(t_i, i, a_start, a_end); - - if (cplb_data[i].attr & D_CPLB) - __fill_data_cplbtab(t_d, i, a_start, a_end); - } - } - -/* close tables */ - - close_cplbtab(&cplb.init_i); - close_cplbtab(&cplb.init_d); - - cplb.init_i.tab[cplb.init_i.pos] = -1; - cplb.init_d.tab[cplb.init_d.pos] = -1; - cplb.switch_i.tab[cplb.switch_i.pos] = -1; - cplb.switch_d.tab[cplb.switch_d.pos] = -1; - -} - -#endif - static u_long get_vco(void) { u_long msel; -- cgit v1.2.1 From 669b792c77bbc30e9f4d9c95dbc918dc348c49c2 Mon Sep 17 00:00:00 2001 From: Robin Getz Date: Thu, 21 Jun 2007 16:34:08 +0800 Subject: Blackfin arch: Clean up trace buffer handling, No major functional changes. Turns on trace earlier, so crashes at kernel start should print out a trace, making things easier to debug. Signed-off-by: Robin Getz Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu --- arch/blackfin/kernel/setup.c | 14 +++++++++++--- arch/blackfin/kernel/traps.c | 11 +---------- 2 files changed, 12 insertions(+), 13 deletions(-) (limited to 'arch/blackfin/kernel') diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c index 07c1cfdc958e..a86bf6545781 100644 --- a/arch/blackfin/kernel/setup.c +++ b/arch/blackfin/kernel/setup.c @@ -194,6 +194,17 @@ void __init setup_arch(char **cmdline_p) /* this give a chance to get printk() working before crash. */ #endif + printk(KERN_INFO "Hardware Trace "); + if (bfin_read_TBUFCTL() & 0x1 ) + printk("Active "); + else + printk("Off "); + if (bfin_read_TBUFCTL() & 0x2) + printk("and Enabled\n"); + else + printk("and Disabled\n"); + + #if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH) /* we need to initialize the Flashrom device here since we might * do things with flash early on in the boot @@ -397,9 +408,6 @@ void __init setup_arch(char **cmdline_p) _bfin_swrst = bfin_read_SWRST(); #endif - printk(KERN_INFO "Hardware Trace Enabled\n"); - bfin_write_TBUFCTL(0x03); - /* Copy atomic sequences to their fixed location, and sanity check that these locations are the ones that we advertise to userspace. */ memcpy((void *)FIXED_CODE_START, &fixed_code_start, diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c index 56058b0b6d4a..a58d0f50be20 100644 --- a/arch/blackfin/kernel/traps.c +++ b/arch/blackfin/kernel/traps.c @@ -33,6 +33,7 @@ #include #include #include +#include #include #include #include @@ -131,16 +132,6 @@ static int printk_address(unsigned long address) return printk("[<0x%p>]", (void*)address); } -#define trace_buffer_save(x) \ - do { \ - (x) = bfin_read_TBUFCTL(); \ - bfin_write_TBUFCTL((x) & ~TBUFEN); \ - } while (0) -#define trace_buffer_restore(x) \ - do { \ - bfin_write_TBUFCTL((x)); \ - } while (0) - asmlinkage void trap_c(struct pt_regs *fp) { int j, sig = 0; -- cgit v1.2.1 From 1f83b8f148a1eb967d2a628cbb741cd56fb54572 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Thu, 12 Jul 2007 22:58:21 +0800 Subject: Blackfin arch: cleanup warnings from checkpatch -- no functional changes Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu --- arch/blackfin/kernel/asm-offsets.c | 7 ++--- arch/blackfin/kernel/bfin_dma_5xx.c | 46 +++++++++++++++--------------- arch/blackfin/kernel/bfin_gpio.c | 11 +++----- arch/blackfin/kernel/bfin_ksyms.c | 5 ++-- arch/blackfin/kernel/dma-mapping.c | 2 +- arch/blackfin/kernel/dualcore_test.c | 6 ++-- arch/blackfin/kernel/fixed_code.S | 2 +- arch/blackfin/kernel/flat.c | 55 +++++++++++++++++------------------- arch/blackfin/kernel/irqchip.c | 2 +- arch/blackfin/kernel/module.c | 32 ++++++++++----------- arch/blackfin/kernel/process.c | 10 +++---- arch/blackfin/kernel/ptrace.c | 6 ++-- arch/blackfin/kernel/setup.c | 44 ++++++++++++++--------------- arch/blackfin/kernel/signal.c | 10 +++---- arch/blackfin/kernel/sys_bfin.c | 8 +++--- arch/blackfin/kernel/time.c | 4 +-- arch/blackfin/kernel/traps.c | 46 +++++++++++++++--------------- 17 files changed, 142 insertions(+), 154 deletions(-) (limited to 'arch/blackfin/kernel') diff --git a/arch/blackfin/kernel/asm-offsets.c b/arch/blackfin/kernel/asm-offsets.c index e455f4504509..b56b2741cdea 100644 --- a/arch/blackfin/kernel/asm-offsets.c +++ b/arch/blackfin/kernel/asm-offsets.c @@ -32,11 +32,10 @@ #include #include #include -#include -#include +#include +#include -#define DEFINE(sym, val) \ - asm volatile("\n->" #sym " %0 " #val : : "i" (val)) +#define DEFINE(sym, val) asm volatile("\n->" #sym " %0 " #val : : "i" (val)) int main(void) { diff --git a/arch/blackfin/kernel/bfin_dma_5xx.c b/arch/blackfin/kernel/bfin_dma_5xx.c index 8a16c2bbec04..7cf02f02a1db 100644 --- a/arch/blackfin/kernel/bfin_dma_5xx.c +++ b/arch/blackfin/kernel/bfin_dma_5xx.c @@ -332,7 +332,7 @@ set_bfin_dma_config(char direction, char flow_mode, } EXPORT_SYMBOL(set_bfin_dma_config); -void set_dma_sg(unsigned int channel, struct dmasg * sg, int nr_sg) +void set_dma_sg(unsigned int channel, struct dmasg *sg, int nr_sg) { BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE && channel < MAX_BLACKFIN_DMA_CHANNEL)); @@ -401,7 +401,7 @@ static void *__dma_memcpy(void *dest, const void *src, size_t size) if (size <= 0) return NULL; - + local_irq_save(flags); if ((unsigned long)src < memory_end) @@ -545,7 +545,6 @@ void *dma_memcpy(void *dest, const void *src, size_t size) addr = __dma_memcpy(dest+bulk, src+bulk, rest); return addr; } - EXPORT_SYMBOL(dma_memcpy); void *safe_dma_memcpy(void *dest, const void *src, size_t size) @@ -558,14 +557,13 @@ EXPORT_SYMBOL(safe_dma_memcpy); void dma_outsb(void __iomem *addr, const void *buf, unsigned short len) { - unsigned long flags; - + local_irq_save(flags); - - blackfin_dcache_flush_range((unsigned int)buf,(unsigned int)(buf) + len); - bfin_write_MDMA_D0_START_ADDR(addr); + blackfin_dcache_flush_range((unsigned int)buf, (unsigned int)(buf) + len); + + bfin_write_MDMA_D0_START_ADDR(addr); bfin_write_MDMA_D0_X_COUNT(len); bfin_write_MDMA_D0_X_MODIFY(0); bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); @@ -593,9 +591,9 @@ EXPORT_SYMBOL(dma_outsb); void dma_insb(const void __iomem *addr, void *buf, unsigned short len) { unsigned long flags; - + local_irq_save(flags); - bfin_write_MDMA_D0_START_ADDR(buf); + bfin_write_MDMA_D0_START_ADDR(buf); bfin_write_MDMA_D0_X_COUNT(len); bfin_write_MDMA_D0_X_MODIFY(1); bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); @@ -624,12 +622,12 @@ EXPORT_SYMBOL(dma_insb); void dma_outsw(void __iomem *addr, const void *buf, unsigned short len) { unsigned long flags; - + local_irq_save(flags); - - blackfin_dcache_flush_range((unsigned int)buf,(unsigned int)(buf) + len); - bfin_write_MDMA_D0_START_ADDR(addr); + blackfin_dcache_flush_range((unsigned int)buf, (unsigned int)(buf) + len); + + bfin_write_MDMA_D0_START_ADDR(addr); bfin_write_MDMA_D0_X_COUNT(len); bfin_write_MDMA_D0_X_MODIFY(0); bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); @@ -656,10 +654,10 @@ EXPORT_SYMBOL(dma_outsw); void dma_insw(const void __iomem *addr, void *buf, unsigned short len) { unsigned long flags; - + local_irq_save(flags); - - bfin_write_MDMA_D0_START_ADDR(buf); + + bfin_write_MDMA_D0_START_ADDR(buf); bfin_write_MDMA_D0_X_COUNT(len); bfin_write_MDMA_D0_X_MODIFY(2); bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); @@ -688,12 +686,12 @@ EXPORT_SYMBOL(dma_insw); void dma_outsl(void __iomem *addr, const void *buf, unsigned short len) { unsigned long flags; - + local_irq_save(flags); - - blackfin_dcache_flush_range((unsigned int)buf,(unsigned int)(buf) + len); - bfin_write_MDMA_D0_START_ADDR(addr); + blackfin_dcache_flush_range((unsigned int)buf, (unsigned int)(buf) + len); + + bfin_write_MDMA_D0_START_ADDR(addr); bfin_write_MDMA_D0_X_COUNT(len); bfin_write_MDMA_D0_X_MODIFY(0); bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); @@ -720,10 +718,10 @@ EXPORT_SYMBOL(dma_outsl); void dma_insl(const void __iomem *addr, void *buf, unsigned short len) { unsigned long flags; - + local_irq_save(flags); - - bfin_write_MDMA_D0_START_ADDR(buf); + + bfin_write_MDMA_D0_START_ADDR(buf); bfin_write_MDMA_D0_X_COUNT(len); bfin_write_MDMA_D0_X_MODIFY(4); bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c index bb1f4fb2467c..bafcfa52142b 100644 --- a/arch/blackfin/kernel/bfin_gpio.c +++ b/arch/blackfin/kernel/bfin_gpio.c @@ -162,7 +162,7 @@ static void port_setup(unsigned short gpio, unsigned short usage) static void default_gpio(unsigned short gpio) { - unsigned short bank,bitmask; + unsigned short bank, bitmask; bank = gpio_bank(gpio); bitmask = gpio_bit(gpio); @@ -183,7 +183,7 @@ static int __init bfin_gpio_init(void) printk(KERN_INFO "Blackfin GPIO Controller\n"); - for (i = 0; i < MAX_BLACKFIN_GPIOS; i+=GPIO_BANKSIZE) + for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) reserved_map[gpio_bank(i)] = 0; #if defined(BF537_FAMILY) && (defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)) @@ -478,7 +478,7 @@ u32 gpio_pm_setup(void) u32 sic_iwr = 0; u16 bank, mask, i, gpio; - for (i = 0; i < MAX_BLACKFIN_GPIOS; i+=GPIO_BANKSIZE) { + for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) { mask = wakeup_map[gpio_bank(i)]; bank = gpio_bank(i); @@ -522,12 +522,11 @@ u32 gpio_pm_setup(void) return IWR_ENABLE_ALL; } - void gpio_pm_restore(void) { u16 bank, mask, i; - for (i = 0; i < MAX_BLACKFIN_GPIOS; i+=GPIO_BANKSIZE) { + for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) { mask = wakeup_map[gpio_bank(i)]; bank = gpio_bank(i); @@ -591,7 +590,6 @@ int gpio_request(unsigned short gpio, const char *label) } EXPORT_SYMBOL(gpio_request); - void gpio_free(unsigned short gpio) { unsigned long flags; @@ -616,7 +614,6 @@ void gpio_free(unsigned short gpio) } EXPORT_SYMBOL(gpio_free); - void gpio_direction_input(unsigned short gpio) { unsigned long flags; diff --git a/arch/blackfin/kernel/bfin_ksyms.c b/arch/blackfin/kernel/bfin_ksyms.c index f64ecb638fab..70455949cfd2 100644 --- a/arch/blackfin/kernel/bfin_ksyms.c +++ b/arch/blackfin/kernel/bfin_ksyms.c @@ -28,10 +28,11 @@ */ #include -#include +#include +#include + #include #include -#include /* platform dependent support */ diff --git a/arch/blackfin/kernel/dma-mapping.c b/arch/blackfin/kernel/dma-mapping.c index 539eb24e062f..bda57ec88151 100644 --- a/arch/blackfin/kernel/dma-mapping.c +++ b/arch/blackfin/kernel/dma-mapping.c @@ -34,8 +34,8 @@ #include #include #include +#include #include -#include #include static spinlock_t dma_page_lock; diff --git a/arch/blackfin/kernel/dualcore_test.c b/arch/blackfin/kernel/dualcore_test.c index 8b89c99f9dfa..0fcba74840b7 100644 --- a/arch/blackfin/kernel/dualcore_test.c +++ b/arch/blackfin/kernel/dualcore_test.c @@ -30,19 +30,19 @@ #include #include -static int *testarg = (int*)0xfeb00000; +static int *testarg = (int *)0xfeb00000; static int test_init(void) { *testarg = 1; - printk("Dual core test module inserted: set testarg = [%d]\n @ [%p]\n", + printk(KERN_INFO "Dual core test module inserted: set testarg = [%d]\n @ [%p]\n", *testarg, testarg); return 0; } static void test_exit(void) { - printk("Dual core test module removed: testarg = [%d]\n", *testarg); + printk(KERN_INFO "Dual core test module removed: testarg = [%d]\n", *testarg); } module_init(test_init); diff --git a/arch/blackfin/kernel/fixed_code.S b/arch/blackfin/kernel/fixed_code.S index 99ea296c82c7..d8b1ebc70996 100644 --- a/arch/blackfin/kernel/fixed_code.S +++ b/arch/blackfin/kernel/fixed_code.S @@ -8,8 +8,8 @@ * BF561 SMP). */ #include +#include #include -#include .text ENTRY(_fixed_code_start) diff --git a/arch/blackfin/kernel/flat.c b/arch/blackfin/kernel/flat.c index a92587b628b5..d188b2430536 100644 --- a/arch/blackfin/kernel/flat.c +++ b/arch/blackfin/kernel/flat.c @@ -36,24 +36,22 @@ unsigned long bfin_get_addr_from_rp(unsigned long *ptr, unsigned long val; switch (type) { - case FLAT_BFIN_RELOC_TYPE_16_BIT: - case FLAT_BFIN_RELOC_TYPE_16H_BIT: - usptr = (unsigned short *)ptr; - pr_debug("*usptr = %x", get_unaligned(usptr)); - val = get_unaligned(usptr); - val += *persistent; - break; + case FLAT_BFIN_RELOC_TYPE_16_BIT: + case FLAT_BFIN_RELOC_TYPE_16H_BIT: + usptr = (unsigned short *)ptr; + pr_debug("*usptr = %x", get_unaligned(usptr)); + val = get_unaligned(usptr); + val += *persistent; + break; - case FLAT_BFIN_RELOC_TYPE_32_BIT: - pr_debug("*ptr = %lx", get_unaligned(ptr)); - val = get_unaligned(ptr); - break; + case FLAT_BFIN_RELOC_TYPE_32_BIT: + pr_debug("*ptr = %lx", get_unaligned(ptr)); + val = get_unaligned(ptr); + break; - default: - pr_debug("BINFMT_FLAT: Unknown relocation type %x\n", - type); - - return 0; + default: + pr_debug("BINFMT_FLAT: Unknown relocation type %x\n", type); + return 0; } /* @@ -81,21 +79,20 @@ void bfin_put_addr_at_rp(unsigned long *ptr, unsigned long addr, int type = (relval >> 26) & 7; switch (type) { - case FLAT_BFIN_RELOC_TYPE_16_BIT: - put_unaligned(addr, usptr); - pr_debug("new value %x at %p", get_unaligned(usptr), - usptr); - break; + case FLAT_BFIN_RELOC_TYPE_16_BIT: + put_unaligned(addr, usptr); + pr_debug("new value %x at %p", get_unaligned(usptr), usptr); + break; - case FLAT_BFIN_RELOC_TYPE_16H_BIT: - put_unaligned(addr >> 16, usptr); - pr_debug("new value %x", get_unaligned(usptr)); - break; + case FLAT_BFIN_RELOC_TYPE_16H_BIT: + put_unaligned(addr >> 16, usptr); + pr_debug("new value %x", get_unaligned(usptr)); + break; - case FLAT_BFIN_RELOC_TYPE_32_BIT: - put_unaligned(addr, ptr); - pr_debug("new ptr =%lx", get_unaligned(ptr)); - break; + case FLAT_BFIN_RELOC_TYPE_32_BIT: + put_unaligned(addr, ptr); + pr_debug("new ptr =%lx", get_unaligned(ptr)); + break; } } EXPORT_SYMBOL(bfin_put_addr_at_rp); diff --git a/arch/blackfin/kernel/irqchip.c b/arch/blackfin/kernel/irqchip.c index 80996a1a94ca..1fc001c7abda 100644 --- a/arch/blackfin/kernel/irqchip.c +++ b/arch/blackfin/kernel/irqchip.c @@ -82,7 +82,7 @@ int show_interrupts(struct seq_file *p, void *v) seq_printf(p, ", %s", action->name); seq_putc(p, '\n'); - unlock: + unlock: spin_unlock_irqrestore(&irq_desc[i].lock, flags); } else if (i == NR_IRQS) { seq_printf(p, "Err: %10lu\n", irq_err_count); diff --git a/arch/blackfin/kernel/module.c b/arch/blackfin/kernel/module.c index 372f756f1ad9..8b9fe29d03f4 100644 --- a/arch/blackfin/kernel/module.c +++ b/arch/blackfin/kernel/module.c @@ -165,8 +165,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs, for (s = sechdrs; s < sechdrs_end; ++s) { if ((strcmp(".l1.text", secstrings + s->sh_name) == 0) || - ((strcmp(".text", secstrings + s->sh_name)==0) && - (hdr->e_flags & FLG_CODE_IN_L1) && (s->sh_size > 0))) { + ((strcmp(".text", secstrings + s->sh_name) == 0) && + (hdr->e_flags & FLG_CODE_IN_L1) && (s->sh_size > 0))) { mod->arch.text_l1 = s; dest = l1_inst_sram_alloc(s->sh_size); if (dest == NULL) { @@ -179,9 +179,9 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs, s->sh_flags &= ~SHF_ALLOC; s->sh_addr = (unsigned long)dest; } - if ((strcmp(".l1.data", secstrings + s->sh_name) == 0)|| - ((strcmp(".data", secstrings + s->sh_name)==0) && - (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) { + if ((strcmp(".l1.data", secstrings + s->sh_name) == 0) || + ((strcmp(".data", secstrings + s->sh_name) == 0) && + (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) { mod->arch.data_a_l1 = s; dest = l1_data_sram_alloc(s->sh_size); if (dest == NULL) { @@ -195,8 +195,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs, s->sh_addr = (unsigned long)dest; } if (strcmp(".l1.bss", secstrings + s->sh_name) == 0 || - ((strcmp(".bss", secstrings + s->sh_name)==0) && - (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) { + ((strcmp(".bss", secstrings + s->sh_name) == 0) && + (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) { mod->arch.bss_a_l1 = s; dest = l1_data_sram_alloc(s->sh_size); if (dest == NULL) { @@ -326,7 +326,7 @@ apply_relocate_add(Elf_Shdr * sechdrs, const char *strtab, pr_debug("before %x after %x\n", *location16, (value & 0xffff)); tmp = (value & 0xffff); - if((unsigned long)location16 >= L1_CODE_START) { + if ((unsigned long)location16 >= L1_CODE_START) { dma_memcpy(location16, &tmp, 2); } else *location16 = tmp; @@ -335,7 +335,7 @@ apply_relocate_add(Elf_Shdr * sechdrs, const char *strtab, pr_debug("before %x after %x\n", *location16, ((value >> 16) & 0xffff)); tmp = ((value >> 16) & 0xffff); - if((unsigned long)location16 >= L1_CODE_START) { + if ((unsigned long)location16 >= L1_CODE_START) { dma_memcpy(location16, &tmp, 2); } else *location16 = tmp; @@ -404,8 +404,8 @@ module_finalize(const Elf_Ehdr * hdr, continue; if ((sechdrs[i].sh_type == SHT_RELA) && - ((strcmp(".rela.l1.text", secstrings + sechdrs[i].sh_name) == 0)|| - ((strcmp(".rela.text", secstrings + sechdrs[i].sh_name) == 0) && + ((strcmp(".rela.l1.text", secstrings + sechdrs[i].sh_name) == 0) || + ((strcmp(".rela.text", secstrings + sechdrs[i].sh_name) == 0) && (hdr->e_flags & FLG_CODE_IN_L1)))) { apply_relocate_add((Elf_Shdr *) sechdrs, strtab, symindex, i, mod); @@ -417,13 +417,13 @@ module_finalize(const Elf_Ehdr * hdr, void module_arch_cleanup(struct module *mod) { if ((mod->arch.text_l1) && (mod->arch.text_l1->sh_addr)) - l1_inst_sram_free((void*)mod->arch.text_l1->sh_addr); + l1_inst_sram_free((void *)mod->arch.text_l1->sh_addr); if ((mod->arch.data_a_l1) && (mod->arch.data_a_l1->sh_addr)) - l1_data_sram_free((void*)mod->arch.data_a_l1->sh_addr); + l1_data_sram_free((void *)mod->arch.data_a_l1->sh_addr); if ((mod->arch.bss_a_l1) && (mod->arch.bss_a_l1->sh_addr)) - l1_data_sram_free((void*)mod->arch.bss_a_l1->sh_addr); + l1_data_sram_free((void *)mod->arch.bss_a_l1->sh_addr); if ((mod->arch.data_b_l1) && (mod->arch.data_b_l1->sh_addr)) - l1_data_B_sram_free((void*)mod->arch.data_b_l1->sh_addr); + l1_data_B_sram_free((void *)mod->arch.data_b_l1->sh_addr); if ((mod->arch.bss_b_l1) && (mod->arch.bss_b_l1->sh_addr)) - l1_data_B_sram_free((void*)mod->arch.bss_b_l1->sh_addr); + l1_data_B_sram_free((void *)mod->arch.bss_b_l1->sh_addr); } diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c index 6b7a94ab96c2..5a51dd6ab280 100644 --- a/arch/blackfin/kernel/process.c +++ b/arch/blackfin/kernel/process.c @@ -32,9 +32,9 @@ #include #include #include +#include #include -#include #include #define LED_ON 0 @@ -174,8 +174,8 @@ void show_regs(struct pt_regs *regs) printk(KERN_NOTICE "R4: %08lx R5: %08lx R6: %08lx R7: %08lx\n", regs->r4, regs->r5, regs->r6, regs->r7); - if (!(regs->ipend)) - printk("USP: %08lx\n", rdusp()); + if (!regs->ipend) + printk(KERN_NOTICE "USP: %08lx\n", rdusp()); } /* Fill in the fpu structure for a core dump. */ @@ -323,7 +323,7 @@ asmlinkage int sys_execve(char *name, char **argv, char **envp) goto out; error = do_execve(filename, argv, envp, regs); putname(filename); - out: + out: unlock_kernel(); return error; } @@ -421,7 +421,7 @@ int _access_ok(unsigned long addr, unsigned long size) if (addr > (addr + size)) return 0; - if (segment_eq(get_fs(),KERNEL_DS)) + if (segment_eq(get_fs(), KERNEL_DS)) return 1; #ifdef CONFIG_MTD_UCLINUX if (addr >= memory_start && (addr + size) <= memory_end) diff --git a/arch/blackfin/kernel/ptrace.c b/arch/blackfin/kernel/ptrace.c index e718bb4a1ef0..ed800c7456dd 100644 --- a/arch/blackfin/kernel/ptrace.c +++ b/arch/blackfin/kernel/ptrace.c @@ -36,8 +36,8 @@ #include #include #include +#include -#include #include #include #include @@ -122,7 +122,7 @@ static inline long get_reg(struct task_struct *task, int regno) static inline int put_reg(struct task_struct *task, int regno, unsigned long data) { - char * reg_ptr; + char *reg_ptr; struct pt_regs *regs = (struct pt_regs *)((unsigned long)task_stack_page(task) + @@ -146,7 +146,7 @@ put_reg(struct task_struct *task, int regno, unsigned long data) break; default: if (regno <= 216) - *(long *)(reg_ptr + regno) = data; + *(long *)(reg_ptr + regno) = data; } return 0; } diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c index a86bf6545781..3309238890ae 100644 --- a/arch/blackfin/kernel/setup.c +++ b/arch/blackfin/kernel/setup.c @@ -362,15 +362,15 @@ void __init setup_arch(char **cmdline_p) , _stext, _etext, __start_rodata, __end_rodata, _sdata, _edata, - (void*)&init_thread_union, (void*)((int)(&init_thread_union) + 0x2000), + (void *)&init_thread_union, (void *)((int)(&init_thread_union) + 0x2000), __init_begin, __init_end, __bss_start, __bss_stop, - (void*)_ramstart, (void*)memory_end + (void *)_ramstart, (void *)memory_end #ifdef CONFIG_MTD_UCLINUX - , (void*)memory_mtd_start, (void*)(memory_mtd_start + mtd_size) + , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size) #endif #if DMA_UNCACHED_REGION > 0 - , (void*)(_ramend - DMA_UNCACHED_REGION), (void*)(_ramend) + , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend) #endif ); @@ -476,7 +476,6 @@ u_long get_cclk(void) return get_vco() / ssel; return get_vco() >> csel; } - EXPORT_SYMBOL(get_cclk); /* Get the System clock */ @@ -495,7 +494,6 @@ u_long get_sclk(void) return get_vco() / ssel; } - EXPORT_SYMBOL(get_sclk); /* @@ -550,23 +548,23 @@ static int show_cpuinfo(struct seq_file *m, void *v) seq_printf(m, "D-CACHE:\tOFF\n"); - switch(bfin_read_DMEM_CONTROL() & (1 << DMC0_P | 1 << DMC1_P)) { - case ACACHE_BSRAM: - seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tSRAM\n"); - dcache_size = 16; - dsup_banks = 1; - break; - case ACACHE_BCACHE: - seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tCACHE\n"); - dcache_size = 32; - dsup_banks = 2; - break; - case ASRAM_BSRAM: - seq_printf(m, "DBANK-A:\tSRAM\n" "DBANK-B:\tSRAM\n"); - dcache_size = 0; - dsup_banks = 0; - break; - default: + switch (bfin_read_DMEM_CONTROL() & (1 << DMC0_P | 1 << DMC1_P)) { + case ACACHE_BSRAM: + seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tSRAM\n"); + dcache_size = 16; + dsup_banks = 1; + break; + case ACACHE_BCACHE: + seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tCACHE\n"); + dcache_size = 32; + dsup_banks = 2; + break; + case ASRAM_BSRAM: + seq_printf(m, "DBANK-A:\tSRAM\n" "DBANK-B:\tSRAM\n"); + dcache_size = 0; + dsup_banks = 0; + break; + default: break; } diff --git a/arch/blackfin/kernel/signal.c b/arch/blackfin/kernel/signal.c index 316e65c3439d..5564c9588aa8 100644 --- a/arch/blackfin/kernel/signal.c +++ b/arch/blackfin/kernel/signal.c @@ -34,8 +34,8 @@ #include #include #include +#include -#include #include #include @@ -124,7 +124,7 @@ asmlinkage int do_rt_sigreturn(unsigned long __unused) return r0; - badframe: + badframe: force_sig(SIGSEGV, current); return 0; } @@ -239,7 +239,7 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t * info, return 0; - give_sigsegv: + give_sigsegv: if (sig == SIGSEGV) ka->sa.sa_handler = SIG_DFL; force_sig(SIGSEGV, current); @@ -263,7 +263,7 @@ handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler) } /* fallthrough */ case -ERESTARTNOINTR: - do_restart: + do_restart: regs->p0 = regs->orig_p0; regs->r0 = regs->orig_r0; regs->pc -= 2; @@ -341,7 +341,7 @@ asmlinkage void do_signal(struct pt_regs *regs) return; } -no_signal: + no_signal: /* Did we come from a system call? */ if (regs->orig_p0 >= 0) /* Restart the system call - no handlers present */ diff --git a/arch/blackfin/kernel/sys_bfin.c b/arch/blackfin/kernel/sys_bfin.c index f436e6743f5a..f5e1ae3d1705 100644 --- a/arch/blackfin/kernel/sys_bfin.c +++ b/arch/blackfin/kernel/sys_bfin.c @@ -37,12 +37,12 @@ #include #include #include +#include +#include +#include #include -#include -#include #include -#include /* * sys_pipe() is the normal C calling standard for creating @@ -83,7 +83,7 @@ do_mmap2(unsigned long addr, unsigned long len, if (file) fput(file); - out: + out: return error; } diff --git a/arch/blackfin/kernel/time.c b/arch/blackfin/kernel/time.c index f578176b6d92..beef057bd1dc 100644 --- a/arch/blackfin/kernel/time.c +++ b/arch/blackfin/kernel/time.c @@ -87,7 +87,7 @@ void __init init_leds(void) static inline void do_leds(void) { static unsigned int count = 50; - static int flag = 0; + static int flag; unsigned short tmp = 0; if (--count == 0) { @@ -200,7 +200,7 @@ irqreturn_t timer_interrupt(int irq, void *dummy)__attribute__((l1_text)); irqreturn_t timer_interrupt(int irq, void *dummy) { /* last time the cmos clock got updated */ - static long last_rtc_update = 0; + static long last_rtc_update; write_seqlock(&xtime_lock); diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c index a58d0f50be20..114277bb46f8 100644 --- a/arch/blackfin/kernel/traps.c +++ b/arch/blackfin/kernel/traps.c @@ -27,16 +27,15 @@ * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#include +#include +#include +#include +#include #include #include #include -#include #include #include -#include -#include -#include #ifdef CONFIG_KGDB # include @@ -77,7 +76,7 @@ static int printk_address(unsigned long address) if (!modname) modname = delim = ""; return printk("<0x%p> { %s%s%s%s + 0x%lx }", - (void*)address, delim, modname, delim, symname, + (void *)address, delim, modname, delim, symname, (unsigned long)offset); } @@ -120,7 +119,7 @@ static int printk_address(unsigned long address) write_unlock_irq(&tasklist_lock); return printk("<0x%p> [ %s + 0x%lx ]", - (void*)address, name, offset); + (void *)address, name, offset); } vml = vml->next; @@ -129,7 +128,7 @@ static int printk_address(unsigned long address) write_unlock_irq(&tasklist_lock); /* we were unable to find this address anywhere */ - return printk("[<0x%p>]", (void*)address); + return printk("[<0x%p>]", (void *)address); } asmlinkage void trap_c(struct pt_regs *fp) @@ -538,29 +537,28 @@ void dump_bfin_regs(struct pt_regs *fp, void *retaddr) printk(KERN_EMERG "TEXT = 0x%p-0x%p DATA = 0x%p-0x%p\n" KERN_EMERG "BSS = 0x%p-0x%p USER-STACK = 0x%p\n" KERN_EMERG "\n", - (void*)current->mm->start_code, - (void*)current->mm->end_code, - (void*)current->mm->start_data, - (void*)current->mm->end_data, - (void*)current->mm->end_data, - (void*)current->mm->brk, - (void*)current->mm->start_stack); + (void *)current->mm->start_code, + (void *)current->mm->end_code, + (void *)current->mm->start_data, + (void *)current->mm->end_data, + (void *)current->mm->end_data, + (void *)current->mm->brk, + (void *)current->mm->start_stack); } printk(KERN_EMERG "return address: [0x%p]; contents of:", retaddr); - if (retaddr != 0 && retaddr <= (void*)physical_mem_end + if (retaddr != 0 && retaddr <= (void *)physical_mem_end #if L1_CODE_LENGTH != 0 /* FIXME: Copy the code out of L1 Instruction SRAM through dma memcpy. */ - && !(retaddr >= (void*)L1_CODE_START - && retaddr < (void*)(L1_CODE_START + L1_CODE_LENGTH)) + && !(retaddr >= (void *)L1_CODE_START + && retaddr < (void *)(L1_CODE_START + L1_CODE_LENGTH)) #endif ) { int i = ((unsigned int)retaddr & 0xFFFFFFF0) - 32; unsigned short x = 0; - for (; i < ((unsigned int)retaddr & 0xFFFFFFF0 ) + 32 ; - i += 2) { - if ( !(i & 0xF) ) + for (; i < ((unsigned int)retaddr & 0xFFFFFFF0) + 32; i += 2) { + if (!(i & 0xF)) printk(KERN_EMERG "\n" KERN_EMERG "0x%08x: ", i); @@ -579,7 +577,7 @@ void dump_bfin_regs(struct pt_regs *fp, void *retaddr) " The rest of this error" " is meanless\n"); #endif - if ( i == (unsigned int)retaddr ) + if (i == (unsigned int)retaddr) printk("[%04x]", x); else printk(" %04x ", x); @@ -672,8 +670,8 @@ void panic_cplb_error(int cplb_panic, struct pt_regs *fp) break; } - printk(KERN_EMERG "DCPLB_FAULT_ADDR=%p\n", (void*)bfin_read_DCPLB_FAULT_ADDR()); - printk(KERN_EMERG "ICPLB_FAULT_ADDR=%p\n", (void*)bfin_read_ICPLB_FAULT_ADDR()); + printk(KERN_EMERG "DCPLB_FAULT_ADDR=%p\n", (void *)bfin_read_DCPLB_FAULT_ADDR()); + printk(KERN_EMERG "ICPLB_FAULT_ADDR=%p\n", (void *)bfin_read_ICPLB_FAULT_ADDR()); dump_bfin_regs(fp, (void *)fp->retx); dump_stack(); panic("Unrecoverable event\n"); -- cgit v1.2.1 From 34e0fc89bdc1e6f50032dc43ed23167f5dbad6da Mon Sep 17 00:00:00 2001 From: Michael Hennerich Date: Thu, 12 Jul 2007 16:17:18 +0800 Subject: Blackfin arch: Enable BF54x PIN/GPIO interrupts Signed-off-bu: Michael Hennerich Signed-off-by: Bryan Wu --- arch/blackfin/kernel/setup.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/blackfin/kernel') diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c index 3309238890ae..f59dcee7bae3 100644 --- a/arch/blackfin/kernel/setup.c +++ b/arch/blackfin/kernel/setup.c @@ -396,11 +396,11 @@ void __init setup_arch(char **cmdline_p) /* check the size of the l1 area */ l1_length = _etext_l1 - _stext_l1; if (l1_length > L1_CODE_LENGTH) - panic("L1 memory overflow\n"); + panic("L1 code memory overflow\n"); l1_length = _ebss_l1 - _sdata_l1; if (l1_length > L1_DATA_A_LENGTH) - panic("L1 memory overflow\n"); + panic("L1 data memory overflow\n"); #ifdef BF561_FAMILY _bfin_swrst = bfin_read_SICA_SWRST(); -- cgit v1.2.1 From 9401e618c8f70920f34893946239e24d40a3519a Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Thu, 12 Jul 2007 11:50:43 +0800 Subject: Blackfin arch: scrub dead code we converted to using a system call for userspace spinlocks rather than a dedicated exception long ago Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu --- arch/blackfin/kernel/traps.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'arch/blackfin/kernel') diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c index 114277bb46f8..3909f5b35536 100644 --- a/arch/blackfin/kernel/traps.c +++ b/arch/blackfin/kernel/traps.c @@ -193,15 +193,14 @@ asmlinkage void trap_c(struct pt_regs *fp) #else /* 0x02 - User Defined, Caught by default */ #endif - /* 0x03 - Atomic test and set */ + /* 0x03 - User Defined, userspace stack overflow */ case VEC_EXCPT03: info.si_code = SEGV_STACKFLOW; sig = SIGSEGV; printk(KERN_EMERG EXC_0x03); CHK_DEBUGGER_TRAP(); break; - /* 0x04 - spinlock - handled by _ex_spinlock, - getting here is an error */ + /* 0x04 - User Defined, Caught by default */ /* 0x05 - User Defined, Caught by default */ /* 0x06 - User Defined, Caught by default */ /* 0x07 - User Defined, Caught by default */ -- cgit v1.2.1 From b07af760c9bd8e87c3aa9275298566379ec4e9c1 Mon Sep 17 00:00:00 2001 From: Sonic Zhang Date: Thu, 12 Jul 2007 12:18:08 +0800 Subject: Blackfin arch: fix bug set dma_address properly in dma_map_sg Signed-off-by: Sonic Zhang Signed-off-by: Bryan Wu --- arch/blackfin/kernel/dma-mapping.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) (limited to 'arch/blackfin/kernel') diff --git a/arch/blackfin/kernel/dma-mapping.c b/arch/blackfin/kernel/dma-mapping.c index bda57ec88151..ea48d5b13f11 100644 --- a/arch/blackfin/kernel/dma-mapping.c +++ b/arch/blackfin/kernel/dma-mapping.c @@ -159,10 +159,13 @@ dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, BUG_ON(direction == DMA_NONE); - for (i = 0; i < nents; i++) - invalidate_dcache_range(sg_dma_address(&sg[i]), - sg_dma_address(&sg[i]) + - sg_dma_len(&sg[i])); + for (i = 0; i < nents; i++, sg++) { + sg->dma_address = page_address(sg->page) + sg->offset; + + invalidate_dcache_range(sg_dma_address(sg), + sg_dma_address(sg) + + sg_dma_len(sg)); + } return nents; } -- cgit v1.2.1 From 520473b0775ce046d179afa686fb3222884c389d Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Thu, 12 Jul 2007 12:20:20 +0800 Subject: Blackfin arch: use PAGE_SIZE when doing aligns rather than hardcoded values Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu --- arch/blackfin/kernel/vmlinux.lds.S | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) (limited to 'arch/blackfin/kernel') diff --git a/arch/blackfin/kernel/vmlinux.lds.S b/arch/blackfin/kernel/vmlinux.lds.S index 1ef1e36b3957..d06f860f4790 100644 --- a/arch/blackfin/kernel/vmlinux.lds.S +++ b/arch/blackfin/kernel/vmlinux.lds.S @@ -31,6 +31,7 @@ #include #include +#include OUTPUT_FORMAT("elf32-bfin") ENTRY(__start) @@ -63,8 +64,8 @@ SECTIONS .data : { + . = ALIGN(PAGE_SIZE); __sdata = .; - . = ALIGN(0x2000); *(.data.init_task) DATA_DATA CONSTRUCTORS @@ -72,14 +73,14 @@ SECTIONS . = ALIGN(32); *(.data.cacheline_aligned) - . = ALIGN(0x2000); + . = ALIGN(PAGE_SIZE); __edata = .; } + . = ALIGN(PAGE_SIZE); ___init_begin = .; .init : { - . = ALIGN(4096); __sinittext = .; *(.init.text) __einittext = .; @@ -152,9 +153,10 @@ SECTIONS __ebss_b_l1 = .; } - ___init_end = LOADADDR(.data_b_l1) + SIZEOF(.data_b_l1); + . = LOADADDR(.data_b_l1) + SIZEOF(.data_b_l1); + ___init_end = ALIGN(PAGE_SIZE); - .bss LOADADDR(.data_b_l1) + SIZEOF(.data_b_l1) : + .bss ___init_end : { . = ALIGN(4); ___bss_start = .; -- cgit v1.2.1