From 3a062281129229b50e06547af3110f8eccd2f4e4 Mon Sep 17 00:00:00 2001 From: Changhwan Youn Date: Tue, 4 Oct 2011 17:02:58 +0900 Subject: ARM: EXYNOS4: Add support MCT PPI for EXYNOS4212 This patch implements clock event timer using MCT PPI and make EXYNOS4212 use MCT PPI instead of MCT SPI. Signed-off-by: Changhwan Youn Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos4/include/mach/entry-macro.S | 6 ++++++ arch/arm/mach-exynos4/include/mach/irqs.h | 2 ++ 2 files changed, 8 insertions(+) (limited to 'arch/arm/mach-exynos4/include') diff --git a/arch/arm/mach-exynos4/include/mach/entry-macro.S b/arch/arm/mach-exynos4/include/mach/entry-macro.S index d7a1e281ce7a..61393dcf5559 100644 --- a/arch/arm/mach-exynos4/include/mach/entry-macro.S +++ b/arch/arm/mach-exynos4/include/mach/entry-macro.S @@ -80,4 +80,10 @@ /* As above, this assumes that irqstat and base are preserved.. */ .macro test_for_ltirq, irqnr, irqstat, base, tmp + bic \irqnr, \irqstat, #0x1c00 + mov \tmp, #0 + cmp \irqnr, #28 + moveq \tmp, #1 + streq \irqstat, [\base, #GIC_CPU_EOI] + cmp \tmp, #0 .endm diff --git a/arch/arm/mach-exynos4/include/mach/irqs.h b/arch/arm/mach-exynos4/include/mach/irqs.h index f8952f8f3757..2d3f6bcd9bc0 100644 --- a/arch/arm/mach-exynos4/include/mach/irqs.h +++ b/arch/arm/mach-exynos4/include/mach/irqs.h @@ -19,6 +19,8 @@ #define IRQ_PPI(x) S5P_IRQ(x+16) +#define IRQ_MCT_LOCALTIMER IRQ_PPI(12) + /* SPI: Shared Peripheral Interrupt */ #define IRQ_SPI(x) S5P_IRQ(x+32) -- cgit v1.2.1 From 90a454b4c5ef16ec71797b3dcaf454e604c786a3 Mon Sep 17 00:00:00 2001 From: Changhwan Youn Date: Tue, 4 Oct 2011 17:08:57 +0900 Subject: ARM: EXYNOS4: Add functions for gic interrupt handling This patch adds two functions for gic interrupt handling. 1. Add interrupt handling of 4 cores. 2. Dynamically set gic bank offset according to the type of soc. Gic bank offset of EXYNOS4412 is 0x4000 while the offset of EXYNOS4210 and EXYNOS4212 is 0x8000. This patch is necessary because EXYNOS4 socs cannot support GIC register banking as described in commit aab74d3e75364. Signed-off-by: Changhwan Youn Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos4/include/mach/entry-macro.S | 23 ++++++++++++++++++----- arch/arm/mach-exynos4/include/mach/map.h | 1 - 2 files changed, 18 insertions(+), 6 deletions(-) (limited to 'arch/arm/mach-exynos4/include') diff --git a/arch/arm/mach-exynos4/include/mach/entry-macro.S b/arch/arm/mach-exynos4/include/mach/entry-macro.S index 61393dcf5559..4c9adbd87eac 100644 --- a/arch/arm/mach-exynos4/include/mach/entry-macro.S +++ b/arch/arm/mach-exynos4/include/mach/entry-macro.S @@ -17,12 +17,25 @@ .endm .macro get_irqnr_preamble, base, tmp - ldr \base, =gic_cpu_base_addr + mov \tmp, #0 + + mrc p15, 0, \base, c0, c0, 5 + and \base, \base, #3 + cmp \base, #0 + beq 1f + + ldr \tmp, =gic_bank_offset + ldr \tmp, [\tmp] + cmp \base, #1 + beq 1f + + cmp \base, #2 + addeq \tmp, \tmp, \tmp + addne \tmp, \tmp, \tmp, LSL #1 + +1: ldr \base, =gic_cpu_base_addr ldr \base, [\base] - mrc p15, 0, \tmp, c0, c0, 5 - and \tmp, \tmp, #3 - cmp \tmp, #1 - addeq \base, \base, #EXYNOS4_GIC_BANK_OFFSET + add \base, \base, \tmp .endm .macro arch_ret_to_user, tmp1, tmp2 diff --git a/arch/arm/mach-exynos4/include/mach/map.h b/arch/arm/mach-exynos4/include/mach/map.h index 7073ac730855..9f97eb8499ee 100644 --- a/arch/arm/mach-exynos4/include/mach/map.h +++ b/arch/arm/mach-exynos4/include/mach/map.h @@ -62,7 +62,6 @@ #define EXYNOS4_PA_GIC_CPU 0x10480000 #define EXYNOS4_PA_GIC_DIST 0x10490000 -#define EXYNOS4_GIC_BANK_OFFSET 0x8000 #define EXYNOS4_PA_COREPERI 0x10500000 #define EXYNOS4_PA_TWD 0x10500600 -- cgit v1.2.1 From c8987470a3a3e56295ee8c9130f5298e807bf4f7 Mon Sep 17 00:00:00 2001 From: Changhwan Youn Date: Tue, 4 Oct 2011 17:09:26 +0900 Subject: ARM: EXYNOS4: Add MCT support for EXYNOS4412 Current MCT implementation only provide 2 event timers, thus cannot support EXYNOS4412 which has 4 CPU cores. This patch fixes MCT implementation to support SoCs with 4 cores. Signed-off-by: Changhwan Youn Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos4/include/mach/regs-mct.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-exynos4/include') diff --git a/arch/arm/mach-exynos4/include/mach/regs-mct.h b/arch/arm/mach-exynos4/include/mach/regs-mct.h index ca9c8434b023..80dd02ad6d61 100644 --- a/arch/arm/mach-exynos4/include/mach/regs-mct.h +++ b/arch/arm/mach-exynos4/include/mach/regs-mct.h @@ -31,8 +31,9 @@ #define EXYNOS4_MCT_G_INT_ENB EXYNOS4_MCTREG(0x248) #define EXYNOS4_MCT_G_WSTAT EXYNOS4_MCTREG(0x24C) -#define EXYNOS4_MCT_L0_BASE EXYNOS4_MCTREG(0x300) -#define EXYNOS4_MCT_L1_BASE EXYNOS4_MCTREG(0x400) +#define _EXYNOS4_MCT_L_BASE EXYNOS4_MCTREG(0x300) +#define EXYNOS4_MCT_L_BASE(x) (_EXYNOS4_MCT_L_BASE + (0x100 * x)) +#define EXYNOS4_MCT_L_MASK (0xffffff00) #define MCT_L_TCNTB_OFFSET (0x00) #define MCT_L_ICNTB_OFFSET (0x08) -- cgit v1.2.1