From 197926108cc837474f8807678d6220bdce281620 Mon Sep 17 00:00:00 2001 From: Alexander Shiyan Date: Sat, 17 Nov 2012 17:57:15 +0400 Subject: ARM: clps711x: Add FIQ interrupt handling CLPS711X-target CPU can have a several FIQ interrupts. With this patch we adds handling for a one which will be used for ALSA PCM later. Since FIQ have a separate handler we only add "mask" and "unmask" calls which will used for enable/disable_irq functions. Signed-off-by: Alexander Shiyan Signed-off-by: Olof Johansson --- arch/arm/mach-clps711x/common.c | 37 +++++++++++++++++++++++++++++++++++-- 1 file changed, 35 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-clps711x/common.c') diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c index 08420244c058..fcdcd91ea107 100644 --- a/arch/arm/mach-clps711x/common.c +++ b/arch/arm/mach-clps711x/common.c @@ -30,6 +30,7 @@ #include #include +#include #include #include #include @@ -91,7 +92,7 @@ static void int1_unmask(struct irq_data *d) } static struct irq_chip int1_chip = { - .name = "Interrupt Vector 1 ", + .name = "Interrupt Vector 1", .irq_ack = int1_ack, .irq_eoi = int1_eoi, .irq_mask = int1_mask, @@ -128,13 +129,37 @@ static void int2_unmask(struct irq_data *d) } static struct irq_chip int2_chip = { - .name = "Interrupt Vector 2 ", + .name = "Interrupt Vector 2", .irq_ack = int2_ack, .irq_eoi = int2_eoi, .irq_mask = int2_mask, .irq_unmask = int2_unmask, }; +static void int3_mask(struct irq_data *d) +{ + u32 intmr3; + + intmr3 = clps_readl(INTMR3); + intmr3 &= ~(1 << (d->irq - 32)); + clps_writel(intmr3, INTMR3); +} + +static void int3_unmask(struct irq_data *d) +{ + u32 intmr3; + + intmr3 = clps_readl(INTMR3); + intmr3 |= 1 << (d->irq - 32); + clps_writel(intmr3, INTMR3); +} + +static struct irq_chip int3_chip = { + .name = "Interrupt Vector 3", + .irq_mask = int3_mask, + .irq_unmask = int3_unmask, +}; + static struct { int nr; struct irq_chip *chip; @@ -188,6 +213,14 @@ void __init clps711x_init_irq(void) set_irq_flags(clps711x_irqdescs[i].nr, IRQF_VALID | IRQF_PROBE); } + + if (IS_ENABLED(CONFIG_FIQ)) { + init_FIQ(0); + irq_set_chip_and_handler(IRQ_DAIINT, &int3_chip, + handle_bad_irq); + set_irq_flags(IRQ_DAIINT, + IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN); + } } inline u32 fls16(u32 x) -- cgit v1.2.1