From fc0b2acc754a183aa79e2abb8bca8fd915832694 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Tue, 30 May 2017 17:31:21 +0300 Subject: spi: pxa2xx: Add support for Intel Cannonlake Intel Cannonlake LPSS SPI has up to four chip selects per port like in Broxton and is clocked like Sunrisepoint and Kaby Lake. Add a new type LPSS_CNL_SSP and configuration that enable runtime chip select detection and use the same FIFO thresholds than in Sunrisepoint. Patch adds support for both Cannonlake SoC and PCH. Signed-off-by: Jarkko Nikula Signed-off-by: Mark Brown --- drivers/spi/spi-pxa2xx.c | 22 ++++++++++++++++++++++ include/linux/pxa2xx_ssp.h | 1 + 2 files changed, 23 insertions(+) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index 47b65d7c4072..38d053682892 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -151,6 +151,18 @@ static const struct lpss_config lpss_platforms[] = { .cs_sel_shift = 8, .cs_sel_mask = 3 << 8, }, + { /* LPSS_CNL_SSP */ + .offset = 0x200, + .reg_general = -1, + .reg_ssp = 0x20, + .reg_cs_ctrl = 0x24, + .reg_capabilities = 0xfc, + .rx_threshold = 1, + .tx_threshold_lo = 32, + .tx_threshold_hi = 56, + .cs_sel_shift = 8, + .cs_sel_mask = 3 << 8, + }, }; static inline const struct lpss_config @@ -167,6 +179,7 @@ static bool is_lpss_ssp(const struct driver_data *drv_data) case LPSS_BSW_SSP: case LPSS_SPT_SSP: case LPSS_BXT_SSP: + case LPSS_CNL_SSP: return true; default: return false; @@ -1275,6 +1288,7 @@ static int setup(struct spi_device *spi) case LPSS_BSW_SSP: case LPSS_SPT_SSP: case LPSS_BXT_SSP: + case LPSS_CNL_SSP: config = lpss_get_config(drv_data); tx_thres = config->tx_threshold_lo; tx_hi_thres = config->tx_threshold_hi; @@ -1470,6 +1484,14 @@ static const struct pci_device_id pxa2xx_spi_pci_compound_match[] = { { PCI_VDEVICE(INTEL, 0x5ac2), LPSS_BXT_SSP }, { PCI_VDEVICE(INTEL, 0x5ac4), LPSS_BXT_SSP }, { PCI_VDEVICE(INTEL, 0x5ac6), LPSS_BXT_SSP }, + /* CNL-LP */ + { PCI_VDEVICE(INTEL, 0x9daa), LPSS_CNL_SSP }, + { PCI_VDEVICE(INTEL, 0x9dab), LPSS_CNL_SSP }, + { PCI_VDEVICE(INTEL, 0x9dfb), LPSS_CNL_SSP }, + /* CNL-H */ + { PCI_VDEVICE(INTEL, 0xa32a), LPSS_CNL_SSP }, + { PCI_VDEVICE(INTEL, 0xa32b), LPSS_CNL_SSP }, + { PCI_VDEVICE(INTEL, 0xa37b), LPSS_CNL_SSP }, { }, }; diff --git a/include/linux/pxa2xx_ssp.h b/include/linux/pxa2xx_ssp.h index a0522328d7aa..8461b18e4608 100644 --- a/include/linux/pxa2xx_ssp.h +++ b/include/linux/pxa2xx_ssp.h @@ -196,6 +196,7 @@ enum pxa_ssp_type { LPSS_BSW_SSP, LPSS_SPT_SSP, LPSS_BXT_SSP, + LPSS_CNL_SSP, }; struct ssp_device { -- cgit v1.2.1