From a8a208fa7346ad643e8f6100c49cb7b8468b6d38 Mon Sep 17 00:00:00 2001 From: Raptor Engineering Development Team Date: Sat, 27 Apr 2019 08:04:00 +0000 Subject: Limit BMC SPI Flash speed to 25MHz on Talos II systems We have been receiving sporadic reports of BMC corruption and failure to boot requiring external recovery. The main suspect is the Flash write speed; reduce it by 1/2 to stabilize writes from the BMC to its main Flash storage device. --- arch/arm/boot/dts/aspeed-bmc-opp-talos.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-talos.dts b/arch/arm/boot/dts/aspeed-bmc-opp-talos.dts index d9ab6c5fd55b..10e42416d505 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-talos.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-talos.dts @@ -133,7 +133,7 @@ status = "okay"; m25p,fast-read; label = "bmc"; - spi-max-frequency = <50000000>; + spi-max-frequency = <25000000>; #include "openbmc-flash-layout.dtsi" }; }; -- cgit v1.2.3