From 3ea9e7ae1a2038b9fdff729861c9b4af0087024f Mon Sep 17 00:00:00 2001 From: Dou Liyang Date: Thu, 1 Mar 2018 13:59:29 +0800 Subject: x86/apic: Modernize the pending interrupt code The pending interrupt check code is old, update the following: - Use for_each_set_bit() instead of open coding it - Replace printk() with pr_err() - Get rid of printk line breaks - Make curly braces balanced Suggested-by: Andy Shevchenko Signed-off-by: Dou Liyang Signed-off-by: Thomas Gleixner Reviewed-by: Andy Shevchenko Cc: bhe@redhat.com Cc: ebiederm@xmission.com Link: https://lkml.kernel.org/r/20180301055930.2396-3-douly.fnst@cn.fujitsu.com --- arch/x86/kernel/apic/apic.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index 69d2936e3154..7a347d7450b6 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -1412,7 +1412,8 @@ static void apic_pending_intr_clear(void) { long long max_loops = cpu_khz ? cpu_khz : 1000000; unsigned long long tsc = 0, ntsc; - unsigned int value, queued; + unsigned int queued; + unsigned long value; int i, j, acked = 0; if (boot_cpu_has(X86_FEATURE_TSC)) @@ -1435,24 +1436,22 @@ static void apic_pending_intr_clear(void) for (i = APIC_ISR_NR - 1; i >= 0; i--) { value = apic_read(APIC_ISR + i*0x10); - for (j = 31; j >= 0; j--) { - if (value & (1< 256) { - printk(KERN_ERR "LAPIC pending interrupts after %d EOI\n", - acked); + pr_err("LAPIC pending interrupts after %d EOI\n", acked); break; } if (queued) { if (boot_cpu_has(X86_FEATURE_TSC) && cpu_khz) { ntsc = rdtsc(); max_loops = (cpu_khz << 10) - (ntsc - tsc); - } else + } else { max_loops--; + } } } while (queued && max_loops > 0); WARN_ON(max_loops <= 0); -- cgit v1.2.1