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* Merge tag 'pinctrl-for-v3.7' of ↵Linus Torvalds2012-10-0216-473/+4602
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pinctrl changes from Linus Walleij: "Some of this stuff is hitting arch/arm/* and have been ACKed by the ARM SoC folks, or it's device tree bindings pertaining to the specific driver. These are the bulk pinctrl changes for kernel v3.7: - Add subdrivers for the DB8540 and NHK8815 Nomadik-type ASICs, provide platform config for the Nomadik. - Add a driver for the i.MX35. - Add a driver for the BCM2835, an advanced GPIO expander. - Various fixes and clean-ups and minor improvements for the core, Nomadik, pinctr-single, sirf drivers. - Some platform config for the ux500." * tag 'pinctrl-for-v3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (27 commits) pinctrl: add bcm2835 driver pinctrl: clarify idle vs sleep states pinctrl/nomadik: use irq_find_mapping() pinctrl: sirf: add lost chained_irq_enter and exit in sirfsoc_gpio_handle_irq pinctrl: sirf: initialize the irq_chip pointer of pinctrl_gpio_range pinctrl: sirf: fix spinlock deadlock in sirfsoc_gpio_set_input pinctrl: sirf: add missing pins to pinctrl list pinctrl: sirf: fix a typo in sirfsoc_gpio_probe pinctrl: pinctrl-single: add debugfs pin h/w state info ARM: ux500: 8500: update I2C sleep states pinctrl pinctrl: Fix potential memory leak in pinctrl_register_one_pin() ARM: ux500: tidy up pin sleep modes ARM: ux500: fix spi2 pin group pinctrl: imx: remove duplicated const pinctrl: document semantics vs GPIO ARM: ux500: 8500: use hsit_a_2 group for HSI pinctrl: use kasprintf() in pinmux_request_gpio() pinctrl: pinctrl-single: Add pinctrl-single,bits type of mux pinctrl/nomadik : add MC1_a_2 pin MC1 function group list pinctrl: pinctrl-single: Make sure we do not change bits outside of mask ...
| * pinctrl: add bcm2835 driverSimon Arlott2012-10-013-0/+1081
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The BCM2835 GPIO module is a combined GPIO controller, (GPIO) interrupt controller, and pinmux/control device. Original driver by Simon Arlott. Rewrite including GPIO chip device by Chris Boot. Upstreaming changes by Stephen Warren: * Wrote DT binding documentation. * Changed brcm,function to an integer to more directly match the datasheet, and to match brcm,pins being an integer. * Implemented pull-up/down pin config. * Removed read-only DT property and related code. The restriction this implemented are driven by the board, not the GPIO HW block, so don't really make sense of a HW block binding, were in general incomplete (since they could only know about the few pins hard-coded into the Raspberry Pi B board design and not the uncommitted GPIOS), and are better represented simply by not writing incorrect data into pin configuration nodes. * Don't set GPIO_IN function select in gpio_request_enable() to avoid glitches; defer this to gpio_set_direction(). Consequently, removed empty bcm2835_pmx_gpio_request_enable(). * Simplified enabled_irq_map[]; make it explicitly 1 entry per bank. * Lifted use of enabled_irq_map[] outside the per-interrupt loop in IRQ handler, thus fixing an issue where the code was indexing into enabled_irq_map[] by intra-bank GPIO ID, not global GPIO ID. * Removed locking in IRQ handler, since all other code uses spin_lock_irqsave() and so guarantees it doesn't run concurrently with the handler. * Moved duplicated BUILD_BUG_ON()s into probe(). Also check size of bcm2835_gpio_pins[]. * Remove range-checking from bcm2835_pctl_get_groups_count() since we've decided to trust the pinctrl core. * Made bcm2835_pmx_gpio_disable_free() call bcm2835_pinctrl_fsel_set() directly for simplicity. * Fixed body of dt_free_map() to match latest dt_node_to_map(). * Removed GPIO ownership check from bcm2835_pmx_enable() since the pinctrl core owns doing this. * Made irq_chip and pinctrl_gpio_range .name == MODULE_NAME so it's more descriptive. * Simplified remove(); removed call to non-existent pinctrl_remove_gpio_range(), remove early return on error. * Don't force gpiochip's base to 0. Set gpio_range.base to gpiochip's base GPIO number. * Error-handling cleanups in probe(). * Switched to module_platform_driver() rather than open-coding. * Made pin, group, and function names lower-case. * s/broadcom/brcm/ in DT property names. * s/2708/2835/. * Fixed a couple minor checkpatch warnings, and other minor cleanup. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Chris Boot <bootc@bootc.net> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl/nomadik: use irq_find_mapping()Linus Walleij2012-09-281-3/+1
| | | | | | | | | | | | | | | | | | | | The code was using a homegrown method of looking up the offset from the irq domain, not to be encouraged. Use the proper irq_find_mapping() call instead. Cc: Lee Jones <lee.jones@linaro.org> Cc: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: sirf: add lost chained_irq_enter and exit in sirfsoc_gpio_handle_irqBarry Song2012-09-281-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the chained irq hang issue, tested by DM9000 driver using GPIO0-3(irqnr=131) as the external IRQ on SiRFmarco: $ cat /proc/interrupts CPU0 CPU1 32: 1608 0 GIC sirfsoc_timer0 33: 0 3197 GIC sirfsoc_timer1 50: 10207 0 GIC sirfsoc-uart 56: 2 0 GIC cc0e0000.i2c 70: 44 0 GIC mmc0 131: 333 0 sirf-gpio-irq eth0 ... Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: sirf: initialize the irq_chip pointer of pinctrl_gpio_rangeBarry Song2012-09-281-1/+3
| | | | | | | | | | | | | | | | This patch initializes the optional irq_chip pointer gc in sirfsoc pinctrl_gpio_range. Signed-off-by: Baohua Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: sirf: fix spinlock deadlock in sirfsoc_gpio_set_inputBarry Song2012-09-281-5/+0
| | | | | | | | | | | | | | | | sirfsoc_gpio_set_input() is called in those functions which have held the spinlock, so delete the duplicated locking. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: sirf: add missing pins to pinctrl listBarry Song2012-09-281-0/+6
| | | | | | | | | | | | | | | | | | We always use pinctrl_request_gpio() to get GPIO, If we don't have these missing pins in the pin list, gpio_request and related operations will fail for them. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: sirf: fix a typo in sirfsoc_gpio_probeBarry Song2012-09-281-0/+2
| | | | | | | | | | | | | | Return 0 while probing success. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: pinctrl-single: add debugfs pin h/w state infoMatt Porter2012-09-281-1/+9
| | | | | | | | | | | | | | | | Adds support for displaying the individual pin h/w config state. Signed-off-by: Matt Porter <mporter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: Fix potential memory leak in pinctrl_register_one_pin()Sachin Kamat2012-09-271-1/+3
| | | | | | | | | | | | | | | | 'pindesc' was not freed when returning from an error induced exit path. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: imx: remove duplicated constRichard Zhao2012-09-181-1/+1
| | | | | | | | | | | | | | | | | | fix smatch warning: drivers/pinctrl/pinctrl-imx.c:435:21: warning: duplicate const Signed-off-by: Richard Zhao <richard.zhao@freescale.com> Acked-by: Dong Aisheng <dong.aisheng@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: use kasprintf() in pinmux_request_gpio()Thomas Petazzoni2012-09-141-4/+1
| | | | | | | | | | | | | | | | | | | | Instead of using a temporary buffer, snprintf() and kstrdup(), just use kasprintf() that does the same thing in just oneline. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Colin Cross <ccross@google.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: pinctrl-single: Add pinctrl-single,bits type of muxPeter Ujfalusi2012-09-131-10/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | With pinctrl-single,bits it is possible to update just part of the register within the pinctrl-single,function-mask area. This is useful when one register configures mmore than one pin's mux. pinctrl-single,bits takes three parameters: <reg offset, value, sub-mask> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> [Removed a misplaced comment] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl/nomadik : add MC1_a_2 pin MC1 function group listPatrice Chotard2012-09-101-1/+4
| | | | | | | | | | | | | | Another possible pin configuration for the MC1 pin group. Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: pinctrl-single: Make sure we do not change bits outside of maskPeter Ujfalusi2012-09-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the pcs->fmask to make sure that the value is not changing (setting) bits in areas where it should not. To avoid situations like this: pmx_dummy: pinmux@4a100040 { compatible = "pinctrl-single"; reg = <0x4a100040 0x0196>; #address-cells = <1>; #size-cells = <0>; pinctrl-single,register-width = <16>; pinctrl-single,function-mask = <0x00ff>; }; &pmx_dummy { pinctrl-names = "default"; pinctrl-0 = <&board_pins>; board_pins: pinmux_board_pins { pinctrl-single,pins = < 0x6c 0xf0f 0x6e 0x10f 0x70 0x23f 0x72 0xa5f >; }; }; Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl/nomadik: MASK_ON_SUSPENDEtienne Carriere2012-09-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ux500 machines performs pins (GPIO) reconfiguration when entering in the suspended mode. This reconfiguration aims at reaching an ultra low power HW configuration. Due to this HW reconfiguration, some HW devices can change of HW state and have their output signals at level that could generate IRQs. If the non-wakeup IRQs are disabled but not yet masked (delayed interrupt disable feature from the generic irq layer), effective interrupts reach the system only because the system attempt to enter the suspended mode. To prevent such IRQs to trig, all irq chips embedded in ux500 platform should enable their IRQCHIP_MASK_ON_SUSPEND flag. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: imx5: start numbering pad from 0Shawn Guo2012-09-032-446/+446
| | | | | | | | | | | | | | | | | | | | | | Unlike imx6q pinctrl driver that starts nubmering pad from 0, imx5 pinctrl drivers number pad from 1. It causes problem/confusion when driver accesses imx51_pinctrl_pads array using pin ID as the index. Change imx51_pads and imx53_pads numbering start from 0. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: pinctrl-imx: add imx35 pinctrl driverUwe Kleine-König2012-09-033-0/+1604
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is mostly cut'n'paste from the imx51 pinctrl driver. The data was generated using sed and awk on arch/arm/plat-mxc/include/mach/iomux-mx35.h. Changes since (implicit) v1 - remove references to file names in binding documentation - remove sed commands from comments in driver - add explicit numbers for pins and functions Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Dong Aisheng <dong.aisheng@linaro.org> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl/nomadik: add STn8815 ASIC supportLinus Walleij2012-09-035-0/+377
| | | | | | | | | | | | | | | | This adds support for the STN8815 ASIC for the Nomadik pin controller. Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl/nomadik: add ASIC DB8450 pinctrl driverPatrice Chotard2012-09-035-0/+1021
| | | | | | | | | | | | | | | | | | This implements a subdriver for the DB8540 ASIC for the Nomadik pin controller. Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | Merge tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2012-10-016-0/+1935
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM soc driver specific changes from Olof Johansson: - A long-coming conversion of various platforms to a common LED infrastructure - AT91 is moved over to use the newer MCI driver for MMC - Pincontrol conversions for samsung platforms - DT bindings for gscaler on samsung - i2c driver fixes for tegra, acked by i2c maintainer Fix up conflicts as per Olof. * tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits) drivers: bus: omap_l3: use resources instead of hardcoded irqs pinctrl: exynos: Fix wakeup IRQ domain registration check pinctrl: samsung: Uninline samsung_pinctrl_get_soc_data pinctrl: exynos: Correct the detection of wakeup-eint node pinctrl: exynos: Mark exynos_irq_demux_eint as inline pinctrl: exynos: Handle only unmasked wakeup interrupts pinctrl: exynos: Fix typos in gpio/wkup _irq_mask pinctrl: exynos: Set pin function to EINT in irq_set_type of GPIO EINTa drivers: bus: Move the OMAP interconnect driver to drivers/bus/ i2c: tegra: dynamically control fast clk i2c: tegra: I2_M_NOSTART functionality not supported in Tegra20 ARM: tegra: clock: remove unused clock entry for i2c ARM: tegra: clock: add connection name in i2c clock entry i2c: tegra: pass proper name for getting clock ARM: tegra: clock: add i2c fast clock entry in clock table ARM: EXYNOS: Adds G-Scaler device from Device Tree ARM: EXYNOS: Add clock support for G-Scaler ARM: EXYNOS: Enable pinctrl driver support for EXYNOS4 device tree enabled platform ARM: dts: Add pinctrl node entries for SAMSUNG EXYNOS4210 SoC ARM: EXYNOS: skip wakeup interrupt setup if pinctrl driver is used ...
| * | pinctrl: exynos: Fix wakeup IRQ domain registration checkTomasz Figa2012-09-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Because of a typo, incorrect field of a structure was being checked. This patch fixes the check to use correct field. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | pinctrl: samsung: Uninline samsung_pinctrl_get_soc_dataTomasz Figa2012-09-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Although the function is used only a single time, it is not performance critical and it is pretty heavy, so let the compiler decide whether to inline it instead. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | pinctrl: exynos: Correct the detection of wakeup-eint nodeTomasz Figa2012-09-211-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current way of finding the wakeup-eint node scans the whole device tree not only children of the pinctrl node, so it might detect a wakeup-eint node of another pinctrl device. This patch limits the scope of looking for nodes only to subnodes of the pinctrl node. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | pinctrl: exynos: Mark exynos_irq_demux_eint as inlineTomasz Figa2012-09-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The exynos_irq_demux_eint utility function is used in chained IRQ handler for EINT16-31 to handle multiplexed interrupts. Inlining it should improve the performance a bit. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | pinctrl: exynos: Handle only unmasked wakeup interruptsTomasz Figa2012-09-211-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A bit in EINTxx_PEND register is set regardless of interrupt mask, which causes spurious interrupts. To avoid them, the read value of pending register must be masked with current interrupt mask manually. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | pinctrl: exynos: Fix typos in gpio/wkup _irq_maskTomasz Figa2012-09-211-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To mask GPIO/wakeup IRQ, the corresponding bit in mask register has to be set. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | pinctrl: exynos: Set pin function to EINT in irq_set_type of GPIO EINTaTomasz Figa2012-09-212-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pins used as GPIO interrupts need to be configured as EINTs. This patch adds the required configuration code to exynos_gpio_irq_set_type, to set the pin as EINT when its interrupt trigger is configured. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | pinctrl: add exynos4210 specific extensions for samsung pinctrl driverThomas Abraham2012-09-074-0/+782
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add information about the Exynos4210 pin banks and driver data which is used by the Samsung pinctrl driver. In addition to this, the support for external gpio and wakeup interrupt support is included and hooked up with the Samsung pinctrl driver. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | pinctrl: add samsung pinctrl and gpiolib driverThomas Abraham2012-09-074-0/+1133
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new device tree enabled pinctrl and gpiolib driver for Samsung SoC's. This driver provides a common and extensible framework for all Samsung SoC's to interface with the pinctrl and gpiolib subsystems. This driver supports only device tree based instantiation and hence can be used only on those Samsung platforms that have device tree enabled. This driver is split into two parts: the pinctrl interface and the gpiolib interface. The pinctrl interface registers pinctrl devices with the pinctrl subsystem and gpiolib interface registers gpio chips with the gpiolib subsystem. The information about the pins, pin groups, pin functions and gpio chips, which are SoC specific, are parsed from device tree node. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | Merge tag 'cleanup2' of ↵Linus Torvalds2012-10-012-2/+44
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM soc cleanups, part 2 from Olof Johansson: "A shorter cleanup branch submitted separately due to dependencies with some of the previous topics. Major thing here is that the Broadcom bcmring platform is removed. It's an SoC that's used on some stationary VoIP platforms, and is in desperate need of some cleanup. Broadcom came back and suggested that we just deprecate the platform for now, since they aren't going to spend the resources needed on cleaning it up, and there are no users of the platform directly from mainline." Fix some conflicts due to BCM2835 getting added next to the removed BCMRING, and removal of tegra files that had been converted to devicetree. * tag 'cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: Orion5x: ts78xx: Add IOMEM for virtual addresses. ARM: ux500: use __iomem pointers for MMIO ARM: Remove mach-bcmring ARM: clps711x: Remove board support for CEIVA ARM: clps711x: Fix register definitions ARM: clps711x: Fix lowlevel debug-macro ARM: clps711x: Added simple clock framework pinctrl: tegra: move pinconf-tegra.h content into drivers/pinctrl ARM: tegra: delete unused headers ARM: tegra: remove useless includes of <mach/*.h> ARM: tegra: remove dead code
| * | pinctrl: tegra: move pinconf-tegra.h content into drivers/pinctrlStephen Warren2012-09-142-2/+44
| |/ | | | | | | | | | | | | | | | | | | Now that Tegra's pinmux is configured solely from device tree, there's no need for the pinconf types to be defined in arch/arm/mach-tegra/. Move it into the pinctrl directory to clean up mach-tegra, as a pre- requisite for single-zImage. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* | Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2012-10-011-1/+57
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM soc device tree updates from Olof Johansson: "Device tree conversion and enablement branch. Mostly a bunch of new bindings and setup for various platforms, but the Via/Winchip VT8500 platform is also converted over from being 100% legacy to now use device tree for probing. More of that will come for 3.8." Trivial conflicts due to removal of vt8500 files, and one documentation file that was added with slightly different contents both here and in the USb tree. * tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (212 commits) arm: vt8500: Fixup for missing gpio.h ARM: LPC32xx: LED fix in PHY3250 DTS file ARM: dt: mmp-dma: add binding file arm: vt8500: Update arch-vt8500 to devicetree support. arm: vt8500: gpio: Devicetree support for arch-vt8500 arm: vt8500: doc: Add device tree bindings for arch-vt8500 devices arm: vt8500: clk: Add Common Clock Framework support video: vt8500: Add devicetree support for vt8500-fb and wm8505-fb serial: vt8500: Add devicetree support for vt8500-serial rtc: vt8500: Add devicetree support for vt8500-rtc arm: vt8500: Add device tree files for VIA/Wondermedia SoC's ARM: tegra: Add Avionic Design Tamonten Evaluation Carrier support ARM: tegra: Add Avionic Design Medcom-Wide support ARM: tegra: Add Avionic Design Plutux support ARM: tegra: Add Avionic Design Tamonten support ARM: tegra: dts: Add pwm label ARM: ux500: Fix SSP register address format ARM: ux500: Apply tc3589x's GPIO/IRQ properties to HREF's DT ARM: ux500: Remove redundant #gpio-cell properties from Snowball DT ARM: ux500: Add all encompassing sound node to the HREF Device Tree ...
| * | pinctrl: sirf: add DT-binding pinmux mapping supportBarry Song2012-09-051-1/+57
| |/ | | | | | | | | | | | | | | | | This makes us possible to define pinmux mapping in board-specific DTS. prima2.dtsi provides all possible (groups,functions) configuration, and device in .dts select configurations from dtsi files. Signed-off-by: Barry Song <Baohua.Song@csr.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* | Merge branch 'cleanup/io-pci' into next/cleanupArnd Bergmann2012-09-048-24/+14
|\ \ | |/ | | | | | | | | | | | | | | | | | | | | The io-pci series has gained a merge to resolve a nontrivial conflict. * cleanup/io-pci: ARM: Fix ioremap() of address zero Also includes an update to Linux 3.6-rc3 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * pinctrl/nomadik: add kp_b_2 keyboard function group listPatrice Chotard2012-08-171-1/+4
| | | | | | | | | | | | | | | | There is yet another way to mux the keyboard, so fix up that group. Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: imx51: fix .conf_reg of MX51_PAD_SD2_CMD__CSPI_MOSIShawn Guo2012-08-171-1/+1
| | | | | | | | | | | | | | | | The .conf_reg of MX51_PAD_SD2_CMD__CSPI_MOSI should be 0x7bc rather than NO_PAD. This error will cause SD2 probe failure. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * trivial: pinctrl core: remove extraneous code linesRichard Genoud2012-08-171-10/+3
| | | | | | | | | | | | | | | | | | | | | | | | In function pinctrl_get_locked, pointer p is returned on error, and also return on no_error. So, we just return it with no error test. It's pretty the same in function pinctrl_lookup_state_locked: state is returned in every case, so we drop the error test and just return state. Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
| * pinctrl/nomadik: fix null in irqdomain errorpathLinus Walleij2012-08-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | The irqdomain conversion failed to notice that we do not always have a DT node to dereference, fix this up by using a simple dev_err() that also tells the name of the device. Cc: Loic Pallardy <loic.pallardy@st.com> Cc: Patrice Chotard <patrice.chotard@stericsson.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * drivers/pinctrl/pinctrl-nomadik.c: drop devm_kfree of devm_kzalloc'd dataJulia Lawall2012-08-071-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | devm_kfree should not have to be explicitly used. The semantic patch that fixes this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression x,d; @@ x = devm_kzalloc(...) ... ?-devm_kfree(d,x); // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl-sirf: remove devm_kfree at error pathDevendra Naga2012-08-071-1/+0
| | | | | | | | | | | | | | | | the pointers that are allocated with devm_kzalloc will be automatically freed, at unload time. Signed-off-by: Devendra Naga <develkernel412222@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl/nomadik: fix hsi function group listPatrice Chotard2012-08-071-1/+1
| | | | | | | | | | | | | | Tidy up a small typo in the HSI function group list. Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl/pinctrl-u300: remove unneeded devm_kfree callDevendra Naga2012-08-051-6/+2
| | | | | | | | | | | | | | | | | | the allocated memory will be destroyed at the driver unload time, automatically if driver uses the devm_ functions, so no need of doing devm_kfree at the error path Signed-off-by: Devendra Naga <develkernel412222@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: mxs: register driver at postcore_initcall timeShawn Guo2012-08-052-2/+2
| | | | | | | | | | | | | | | | | | | | It's not so usual, but there are still some cases which require pinctrl driver function at arch_initcall time. So register imx23 and imx28 pinctrl driver at postcore_initcall time. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl/coh901: move header to platform data dirLinus Walleij2012-08-131-1/+1
| | | | | | | | | | | | | | | | Move the platform-specific COH901 pin control header out of the ARM tree and down into the proper platform data include directory. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl/coh901: retire ancient GPIO block versionsLinus Walleij2012-08-131-176/+42
|/ | | | | | | As the non-U335 U300 variants are retired from the ARM tree, also delete the pinctrl driver codepaths for these variants. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge tag 'pinctrl-for-v3.6' of ↵Linus Torvalds2012-07-2411-79/+1064
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control changes from Linus Walleij: "These are the accumulated pin control patches for v3.6: - Various cleanups to the U300 driver - Refactor the pin control core to automatically remove any GPIO ranges when the drivers are removed, instead of having the drivers do this explicitly. - Add a function for registering a batch of GPIO ranges. - Fix a number of incorrect but non-regressive error checks. - Incremental improvements to the COH901, i.MX and Nomadik drivers - Add a one-register-per-pin entirely Device Tree-based pin control driver from Tony Lindgren." * tag 'pinctrl-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: Add one-register-per-pin type device tree based pinctrl driver pinctrl/nomadik: add spi2_oc1_2 pin group pinctrl/nomadik: kerneldoc fix pinctrl/nomadik: use devm_* allocators for gpio probe pinctrl/nomadik: add pin group to mco function pinctrl/nomadik: add hsit_a_2 pin group pinctrl/nomadik: add pin group smcs1 and smps0 pinctrl/nomadik: fix hsir_a_1_pins pin list pinctrl: pinctrl-imx: fix map setting problem if NO_PAD_CTL is set pinctrl/coh901: use clk_prepare_[en|dis]able() pinctrl/pinctrl-tegra: remove IS_ERR checking of pmx->pctl pinctrl/pinctrl-spear: remove IS_ERR checking of pmx->pctl pinctrl/u300: drop unused variable pinctrl: select the proper symbol pinctrl: add pinctrl_add_gpio_ranges function pinctrl: remove pinctrl_remove_gpio_range pinctrl/pinctrl-core: cleanup pinctrl_register pinctrl/u300: delete pointless debug print pinctrl/pinctrl-u300: remove devm_kfree at driver unload
| * pinctrl: Add one-register-per-pin type device tree based pinctrl driverTony Lindgren2012-07-143-0/+996
| | | | | | | | | | | | | | | | | | | | | | Add one-register-per-pin type device tree based pinctrl driver. This driver has been tested on omap2+ series of processors, where there is either an 8 or 16-bit padconf register for each pin. Support for other similar pinmux controllers can be added. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl/nomadik: add spi2_oc1_2 pin groupPatrice Chotard2012-07-051-1/+4
| | | | | | | | | | | | | | | | | | On 8500 and 9540, all SPI2 pins are driven by SPI block except SPI2_FRM which is driven as GPIO due to specific constraints. A new group spi2_oc1_2 is created which exclude SPI2_FRM pin. Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl/nomadik: kerneldoc fixLinus Walleij2012-07-041-1/+1
| | | | | | | | | | | | Document a missing function parameter to nmk_config_pin(). Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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