summaryrefslogtreecommitdiffstats
path: root/drivers/pinctrl/pinctrl-single.c
Commit message (Collapse)AuthorAgeFilesLines
* pinctrl: pinctrl-single: fix compile warning when no CONFIG_PMJean-Francois Moine2013-07-221-0/+2
| | | | | | | | | This warning has been introduced by the commit 0f9bc4bcdf4f pinctrl: single: adopt pinctrl sleep mode management Signed-off-by: Jean-Francois Moine <moinejf@free.fr> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: single: adopt pinctrl sleep mode managementHebbar Gururaja2013-06-171-0/+27
| | | | | | | | | Make pinctrl-single able to handle suspend/resume events and change hogged pins states accordingly. Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: pinctrl-single: pin names for pinctrl-single.bitsManjunathappa, Prakash2013-06-161-5/+10
| | | | | | | | | | | Take care to name pin names as register-offset.bit-pos-of-pin-in-register in case configuring multiple pins in register. Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: pinctrl-single: enhance to configure multiple pins of different modulesManjunathappa, Prakash2013-06-161-33/+165
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add support to configure multiple pins in each register, existing implementation added by [1] does not support full fledge multiple pin configuration in single register, reports a pin clash when different modules configure different bits of same register. The issue reported and discussed here http://www.spinics.net/lists/arm-kernel/msg235213.html With pinctrl-single,bits-per-mux property specified, use function-mask property to find out number pins to configure. Allocate and register pin control functions based sub mask. Tested on da850/omap-l138 EVM. does not support variable submask for pins. does not support pinconf. [1] "pinctrl: pinctrl-single: Add pinctrl-single,bits type of mux" (9e605cb68a21d5704839a192a46ebcf387773704), Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com> Reported-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> Tested-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: single: fix error return code in pcs_parse_one_pinctrl_entry()Wei Yongjun2013-05-141-1/+2
| | | | | | | | | | | | Fix to return a negative error code from the error handling case instead of 0, as done elsewhere in this function. Introduced by commit 9dddb4df90d136429b6d6ddefceb49a9b93f6cd1 (pinctrl: single: support generic pinconf) Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: single: correct argument for pinconfHaojian Zhuang2013-03-131-8/+8
| | | | | | | | | pcs_pinconf_set() is always using "arg << shift" to configure two parameters case. But pcs_add_conf2() didn't remove shift for config argument. So correct it. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: single: Fix build errorAxel Lin2013-03-071-3/+3
| | | | | | | | | | | | | | | | | | If pcs->is_pinconf is false, it means does not support pinconf. If pcs->is_pinconf is true, is_generic flag is always true. This patch fixes below build error: CC [M] drivers/pinctrl/pinctrl-single.o drivers/pinctrl/pinctrl-single.c: In function 'pcs_probe': drivers/pinctrl/pinctrl-single.c:1441:3: error: assignment of member 'is_generic' in read-only object make[2]: *** [drivers/pinctrl/pinctrl-single.o] Error 1 make[1]: *** [drivers/pinctrl] Error 2 make: *** [drivers] Error 2 Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: single: support generic pinconfHaojian Zhuang2013-03-071-7/+401
| | | | | | | | | | Support the operation of generic pinconf. The supported config arguments are INPUT_SCHMITT, INPUT_SCHMITT_ENABLE, DRIVE_STRENGHT, BIAS_DISABLE, BIAS_PULLUP, BIAS_PULLDOWN, SLEW_RATE. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: single: set function mask as optionalHaojian Zhuang2013-03-071-4/+22
| | | | | | | | | | | | Since Hisilicon's pin controller is divided into two parts. One is the function mux, and the other is pin configuration. These two parts are in the different memory regions. So make pinctrl-single,function-mask as optional property. Then we can define pingroups without valid function mux that is only used for pin configuration. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: single: create new gpio function rangeHaojian Zhuang2013-03-071-2/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since gpio driver could create gpio range in DTS, it could invoke pinctrl_request_gpio(). In the pinctrl-single driver, it needs to configure pins with gpio function mode. A new gpio function range should be created in DTS file in below. pinctrl-single,gpio-range = <phandle pin_offset nr_pins gpio_func>; range: gpio-range { #pinctrl-single,gpio-range-cells = <3>; }; The gpio-ranges property is used in gpio driver and the pinctrl-single,gpio-range property is used in pinctrl-single driver. 1. gpio-ranges is used for gpio driver in below. gpio-ranges = <phandle gpio_offset_in_chip pin_offset nr_pins> gpio-ranges = < &pmx0 0 89 1 &pmx0 1 89 1 &pmx0 2 90 1 &pmx0 3 90 1 &pmx0 4 91 1 &pmx0 5 92 1>; 2. gpio driver could get pin offset from gpio-ranges property. pinctrl-single driver could get gpio function mode from gpio_func that is stored in @gpiofuncs list in struct pcs_device. This new pinctrl-single,gpio-range is used as complement for gpio-ranges property in gpio driver. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: Declare operation structures as constLaurent Pinchart2013-03-071-3/+3
| | | | | | | | The pinconf, pinctrl and pinmux operation structures hold function pointers that are never modified. Declare them as const. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Revert "pinctrl: single: support gpio request and free"Haojian Zhuang2013-01-221-77/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 2e8b2eab94c35d83bb7da71c63b4695f32ddca88. Conflicts: drivers/pinctrl/pinctrl-single.c ERROR: "__aeabi_uldivmod" [drivers/pinctrl/pinctrl-single.ko] undefined!] On Fri, Jan 11, 2013 at 4:00 PM, Russell King wrote: > The above error happens in builds including pinctrl-single - the > reason > is this, where resource_size_t may be 64-bit. > > gpio->range.pin_base = (r.start - pcs->res->start) / > mux_bytes; > gpio->range.npins = (r.end - r.start) / mux_bytes + 1; The reason of not fixing this issue and reverting the patch instead is this patch can't handle another case. It's not easy to handle multiple gpios sharing one pin register. So this gpio range feature will be implemented by other patches. Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Drivers: pinctrl: remove __dev* attributes.Greg Kroah-Hartman2013-01-031-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | CONFIG_HOTPLUG is going away as an option. As a result, the __dev* markings need to be removed. This change removes the use of __devinit, __devexit_p, __devinitdata, and __devexit from these drivers. Based on patches originally written by Bill Pemberton, but redone by me in order to handle some of the coding style issues better, by hand. Cc: Bill Pemberton <wfp5p@virginia.edu> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Barry Song <baohua.song@csr.com> Cc: Viresh Kumar <viresh.linux@gmail.com> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* Merge tag 'driver-core-3.8-rc1' of ↵Linus Torvalds2012-12-111-3/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core Pull driver core updates from Greg Kroah-Hartman: "Here's the large driver core updates for 3.8-rc1. The biggest thing here is the various __dev* marking removals. This is going to be a pain for the merge with different subsystem trees, I know, but all of the patches included here have been ACKed by their various subsystem maintainers, as they wanted them to go through here. If this is too much of a pain, I can pull all of them out of this tree and just send you one with the other fixes/updates and then, after 3.8-rc1 is out, do the rest of the removals to ensure we catch them all, it's up to you. The merges should all be trivial, and Stephen has been doing them all in linux-next for a few weeks now quite easily. Other than the __dev* marking removals, there's nothing major here, some firmware loading updates and other minor things in the driver core. All of these have (much to Stephen's annoyance), been in linux-next for a while. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>" Fixed up trivial conflicts in drivers/gpio/gpio-{em,stmpe}.c due to gpio update. * tag 'driver-core-3.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (93 commits) modpost.c: Stop checking __dev* section mismatches init.h: Remove __dev* sections from the kernel acpi: remove use of __devinit PCI: Remove __dev* markings PCI: Always build setup-bus when PCI is enabled PCI: Move pci_uevent into pci-driver.c PCI: Remove CONFIG_HOTPLUG ifdefs unicore32/PCI: Remove CONFIG_HOTPLUG ifdefs sh/PCI: Remove CONFIG_HOTPLUG ifdefs powerpc/PCI: Remove CONFIG_HOTPLUG ifdefs mips/PCI: Remove CONFIG_HOTPLUG ifdefs microblaze/PCI: Remove CONFIG_HOTPLUG ifdefs dma: remove use of __devinit dma: remove use of __devexit_p firewire: remove use of __devinitdata firewire: remove use of __devinit leds: remove use of __devexit leds: remove use of __devinit leds: remove use of __devexit_p mmc: remove use of __devexit ...
| * pinctrl: remove use of __devexitBill Pemberton2012-11-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | CONFIG_HOTPLUG is going away as an option so __devexit is no longer needed. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Viresh Kumar <viresh.linux@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * pinctrl: remove use of __devinitdataBill Pemberton2012-11-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | CONFIG_HOTPLUG is going away as an option so __devinitdata is no longer needed. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Viresh Kumar <viresh.linux@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * pinctrl: remove use of __devexit_pBill Pemberton2012-11-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | CONFIG_HOTPLUG is going away as an option so __devexit_p is no longer needed. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | pinctrl: pinctrl-single: Fix error check conditionSachin Kamat2012-11-231-1/+1
| | | | | | | | | | | | | | *map should be tested for NULL instead of map. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: single: support gpio request and freeHaojian Zhuang2012-11-211-2/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Marvell's PXA/MMP silicon also match the behavior of pinctrl-single. Each pin binds to one register. A lot of pins could be configured as gpio. GPIO range is defined as a child node of pinmux in .dtsi file. If those pins are with the same gpio function configuration in the pinmux register, they could be defined in the same GPIO range. For this new child node, two properties are used. reg = <the start of pinmux register in range, size of range> pinctrl-single,gpio: <gpio base in range, the gpio function of the range in the pinmux register> Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: single: dump pinmux register valueHaojian Zhuang2012-11-151-4/+4
|/ | | | | | | | | | | | Dump pinmux register value, not only function part in the pinmux register. Also fix the issue on caluclating pin offset. The last parameter should be pin number, not register offset. Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: pinctrl-single: add debugfs pin h/w state infoMatt Porter2012-09-281-1/+9
| | | | | | | | Adds support for displaying the individual pin h/w config state. Signed-off-by: Matt Porter <mporter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: pinctrl-single: Add pinctrl-single,bits type of muxPeter Ujfalusi2012-09-131-10/+36
| | | | | | | | | | | | | | With pinctrl-single,bits it is possible to update just part of the register within the pinctrl-single,function-mask area. This is useful when one register configures mmore than one pin's mux. pinctrl-single,bits takes three parameters: <reg offset, value, sub-mask> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> [Removed a misplaced comment] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: pinctrl-single: Make sure we do not change bits outside of maskPeter Ujfalusi2012-09-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the pcs->fmask to make sure that the value is not changing (setting) bits in areas where it should not. To avoid situations like this: pmx_dummy: pinmux@4a100040 { compatible = "pinctrl-single"; reg = <0x4a100040 0x0196>; #address-cells = <1>; #size-cells = <0>; pinctrl-single,register-width = <16>; pinctrl-single,function-mask = <0x00ff>; }; &pmx_dummy { pinctrl-names = "default"; pinctrl-0 = <&board_pins>; board_pins: pinmux_board_pins { pinctrl-single,pins = < 0x6c 0xf0f 0x6e 0x10f 0x70 0x23f 0x72 0xa5f >; }; }; Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: Add one-register-per-pin type device tree based pinctrl driverTony Lindgren2012-07-141-0/+987
Add one-register-per-pin type device tree based pinctrl driver. This driver has been tested on omap2+ series of processors, where there is either an 8 or 16-bit padconf register for each pin. Support for other similar pinmux controllers can be added. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
OpenPOWER on IntegriCloud