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path: root/drivers/net/wireless/ath/ath9k/ar9003_phy.h
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* ath9k: fix few register offsets for AR9330Gabor Juhos2011-06-221-2/+2
| | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k: set NF limits for AR9330Gabor Juhos2011-06-221-0/+2
| | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k: Drag the driver to the year 2011Sujith Manoharan2011-05-191-1/+1
| | | | | | | The Times They Are a-Changin'. Signed-off-by: Sujith Manoharan <Sujith.Manoharan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: define registers/macros to support Antenna diversityMohammed Shafi Shajakhan2011-05-161-0/+22
| | | | | | | | | | define few registers and macros to configure/enable Antenna diversity parameters in AR9485 Cc: Gabriel Tseng <Gabriel.Tseng@Atheros.com> Cc: Senthilkumar Balasubramanian <Senthilkumar.Balasubramanian@Atheros.com> Signed-off-by: Mohammed Shafi Shajakhan <mshajakhan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Fix Tx IQ Calibration hang issue in AR9003 chipsRajkumar Manoharan2011-04-261-13/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On AR9003 chips, doing three IQ calibrations will possibly cause chip in stuck state. In noisy environment, chip could receive a packet during the middle of three calibrations and it causes the conflict of HW access and the eventual failure. It also causes IQ calibration outliers which results in poor Tx EVM. The IQ Cal procedure is after resetting the chip, run IQ cal 3 times per each cal cycle and find the two closest readings and average of two. The advantage of running Tx IQ cal more than once is that we can compare calibration results for the same gain setting over multiple iterations. Most of the cases the IQ failures were observed after first pass. For the AR9485 and later chips, Tx IQ Calibration is performed along with AGC cal. But for pre-AR9485 chips, Tx IQ cal HW has to be separated from the rest of calibration HW to avoid chip hang. After all calibrations are done in HW, we can start SW post-processing. By doing this way, we minimize the SW difference among all chips. The order of calibration (run IQ cal before other calibration) is also needed to avoid chip hang for chips before AR9485. This issue was originally observed with AR9382. During the issue kernel log was filled with following message ath: timeout (100000 us) on reg 0xa640: 0x00000001 & 0x00000001 != 0x00000000 ath: timeout (100000 us) on reg 0xa2c4: 0x00158dd9 & 0x00000001 != 0x00000000 ath: Unable to reset channel (2412 MHz), reset status -5 ath: Unable to set channel Signed-off-by: Rajkumar Manoharan <rmanoharan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Fix register offset AR_PHY_65NM_CH0_THERM for AR9340Vasanthakumar Thiagarajan2011-04-251-1/+1
| | | | | Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: replace magic values in register writes with proper definesFelix Fietkau2011-01-211-0/+2
| | | | | Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: fix PA predistortion training power selectionFelix Fietkau2010-12-131-0/+8
| | | | | | | | | | | The EEPROM contains scale factors for the tx power, which define the range of allowable difference between target power and training power. If the difference is too big, PA predistortion cannot be used. For 2.4 GHz there is only one scale factor, for 5 GHz there are three, depending on the specific frequency range. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Setup paprd only for supported chainsVasanthakumar Thiagarajan2010-12-071-4/+12
| | | | | Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Program appropriate register for temperature compensation cal for ↵Vasanthakumar Thiagarajan2010-12-071-1/+1
| | | | | | | AR9485 Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Add IQ cal changes for AR9485Vasanthakumar Thiagarajan2010-12-071-2/+14
| | | | | Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Define IQcal correction coefficient registers using indexVasanthakumar Thiagarajan2010-12-071-3/+5
| | | | | Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Read and configure turnning caps to regulate freq accuracyVasanthakumar Thiagarajan2010-12-071-0/+6
| | | | | | | | Right now it is done for only AR9485, will be done for ar9003 also after proper testing. Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Configure internal regulator for AR9485Vasanthakumar Thiagarajan2010-12-071-0/+8
| | | | | Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Read and configure antenna diversity control for AR9485Vasanthakumar Thiagarajan2010-12-071-0/+10
| | | | | Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Configure xpa bias level for AR9485Vasanthakumar Thiagarajan2010-12-071-0/+4
| | | | | Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: add register definitions related to PA predistortionFelix Fietkau2010-06-141-17/+207
| | | | | Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: add register definitions for the new ANILuis R. Rodriguez2010-06-141-0/+8
| | | | | Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: add support for the AR9003 baseband watchdogLuis R. Rodriguez2010-06-021-33/+33
| | | | | | | | | | | | | | The baseband watchdog will monitor blocks of the baseband through timers and will issue an interrupt when things are detected to be stalled. It is only available on the AR9003 family. Cc: Sam Ng <sam.ng@atheros.com> Cc: Paul Shaw <paul.shaw@atheros.com> Cc: Don Breslin <don.breslin@atheros.com> Cc: Cliff Holden <cliff.holden@atheros.com Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: add OFDM spur mitigation for AR9003Luis R. Rodriguez2010-04-161-0/+54
| | | | | | | | We add this now as OFDM spur mitigation required accessing the EEPROM for the AR9003 devices. Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: abstract the AR_PHY_AGC_CONTROL register accessLuis R. Rodriguez2010-04-161-13/+0
| | | | | | | | This is so we can share routines which access this register on calib.c Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: add helpers for processing the AR9003 INILuis R. Rodriguez2010-04-161-0/+2
| | | | | | Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Add AR9003 PHY register definitionsFelix Fietkau2010-04-161-0/+804
Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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