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* net: phy: micrel: add generic clock-mode-select supportJohan Hovold2014-11-211-43/+50
| | | | | | | | | | | | | | | | | | | | | | Add generic RMII-Reference-Clock-Select support. Several Micrel PHY have an RMII-Reference-Clock-Select bit to select 25 MHz or 50 MHz clock mode. Recently, support for configuring this through device tree for KSZ8021 and KSZ8031 was added. Generalise this support so that it can be configured for other PHY types as well. Note that some PHY revisions (of the same type) has this bit inverted. This should be either configurable through a new device-tree property, or preferably, determined based on PHY ID if possible. Also note that this removes support for setting 25 MHz mode from board files which was also added by the above mentioned commit 45f56cb82e45 ("net/phy: micrel: Add clock support for KSZ8021/KSZ8031"). Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: phy: micrel: add has-broadcast-disable flag to type dataJohan Hovold2014-11-211-8/+6
| | | | | | | | | | | | Add has_broadcast_disable flag to type-data and generic config_init. This allows us to remove the ksz8081 config_init callback. Note that ksz8021_config_init is kept for now due to a95a18afe4c8 ("phy/micrel: KSZ8031RNL RMII clock reconfiguration bug"). Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: phy: micrel: parse of nodes at probeJohan Hovold2014-11-211-18/+21
| | | | | | | | | | Parse the "micrel,led-mode" property at probe, rather than at config_init time in the led-setup helper itself. Note that the bogus parent->of_node bit is removed. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: phy: micrel: add device-type abstractionJohan Hovold2014-11-211-13/+70
| | | | | | | | | | | Add structured device-type information and support for generic led-mode setup to the generic config_init callback. This is a first step in ultimately getting rid of device-type specific callbacks. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: phy: micrel: enable led-mode for KSZ8081/KSZ8091Johan Hovold2014-11-121-0/+1
| | | | | | | Enable led-mode configuration for KSZ8081 and KSZ8091. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: phy: micrel: clean up led-mode setupJohan Hovold2014-11-121-9/+22
| | | | | | | | Clean up led-mode setup by introducing proper defines for PHY Control registers 1 and 2 and only passing the register to the setup function. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: phy: micrel: refactor led-mode error handlingJohan Hovold2014-11-121-9/+10
| | | | | | | Refactor led-mode error handling. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: phy: micrel: add led-mode sanity checkJohan Hovold2014-11-121-0/+5
| | | | | | | | Make sure never to update more than two bits when setting the led mode, something which could for example change the reference-clock setting. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: phy: micrel: disable broadcast for KSZ8081/KSZ8091Johan Hovold2014-11-121-1/+8
| | | | | | | | | | | | | | Disable PHY address 0 as the broadcast address, so that it can be used as a unique (non-broadcast) address on a shared bus. Note that this can also be configured using the B-CAST_OFF pin on KSZ9091, but that KSZ8081 lacks this pin and is also limited to addresses 0 and 3. Specifically, this allows for dual KSZ8081 setups. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: phy: micrel: refactor broadcast disableJohan Hovold2014-11-121-2/+22
| | | | | | | | | | | | | | | Refactor and clean up broadcast disable. Some Micrel PHYs have a broadcast-off bit in the Operation Mode Strap Override register which can be used to disable PHY address 0 as the broadcast address, so that it can be used as a unique (non-broadcast) address on a shared bus. Note that the KSZPHY_OMSO_RMII_OVERRIDE bit is set by default on KSZ8021/8031. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: phy: micrel: use BIT macroJohan Hovold2014-11-121-17/+17
| | | | | | | Use BIT macro for bitmask definitions. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: phy: micrel: fix config_intr error handlingJohan Hovold2014-11-121-0/+6
| | | | | | | | Make sure never to update the control register with random data (an error code) by checking the return value after reading it. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: phy: replace phy_drivers_register callsJohan Hovold2014-11-121-14/+1
| | | | | | | | | | Replace module init/exit which only calls phy_drivers_register with module_phy_driver macro. Tested using Micrel driver, and otherwise compile-tested only. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* phy/micrel: KSZ8031RNL RMII clock reconfiguration bugBruno Thomsen2014-10-141-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Bug: Unable to send and receive Ethernet packets with Micrel PHY. Affected devices: KSZ8031RNL (commercial temp) KSZ8031RNLI (industrial temp) Description: PHY device is correctly detected during probe. PHY power-up default is 25MHz crystal clock input and output 50MHz RMII clock to MAC. Reconfiguration of PHY to input 50MHz RMII clock from MAC causes PHY to become unresponsive if clock source is changed after Operation Mode Strap Override (OMSO) register setup. Cause: Long lead times on parts where clock setup match circuit design forces the usage of similar parts with wrong default setup. Solution: Swapped KSZ8031 register setup and added phy_write return code validation. Tested with Freescale i.MX28 Fast Ethernet Controler (fec). Signed-off-by: Bruno Thomsen <bth@kamstrup.dk> Signed-off-by: David S. Miller <davem@davemloft.net>
* net/phy: micrel: Add clock support for KSZ8021/KSZ8031Sascha Hauer2014-10-101-2/+29
| | | | | | | | | | | The KSZ8021 and KSZ8031 support RMII reference input clocks of 25MHz and 50MHz. Both PHYs differ in the default frequency they expect after reset. If this differs from the actual input clock, then register 0x1f bit 7 must be changed. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net/phy: micrel: Disable asymmetric pause for KSZ9031Mike Looijmans2014-09-151-2/+1
| | | | | | | | | | | | The KSZ9031 appears to suffer from the same hardware bug as described for the KSZ9021 in commit 32fcafbcd1c9f6c7013016a22a5369b4acb93577 ("net/phy: micrel: Disable asymmetric pause for KSZ9021") you have to unplug the cable and plug it back to get it to work. Remove the SUPPORTED_Asym_Pause flag for the KSZ9031 to fix this. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: libphy: Add stubs to hook IEEE MMD Register reads and writesVince Bridgers2014-07-301-0/+22
| | | | | | | | | | | | | | | | | The Micrel ksz9021 PHY does not support standard IEEE standard MMD extended register access, therefore requires stubs to fail the read register method and do nothing for the write register method when libphy attempts to read and/or configure Energy Efficient Ethernet features in PHYS that do support those features. This problem was observed on an Altera Cyclone V SOC development kit that uses the Synopsys EMAC and the Micrel ksz9021 PHY. This patch was tested on the same board, and Energy Efficient Ethernet is now disabled as expected since the Micrel PHY does not support that feature. Signed-off-by: Vince Bridgers <vbridgers2013@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* ARM: i.MX6: Add OF configuration support for ksz9031Hubert Chaumette2014-05-071-1/+105
| | | | | | | | Adds support for ksz9031 PAD skew configuration over devicetree. Signed-off-by: Hubert Chaumette <hchaumette@adeneo-embedded.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net/phy: micrel: fix bugged test on device tree loading for ksz9021Hubert Chaumette2014-04-231-3/+3
| | | | | | | | | | | | | | In ksz9021_load_values_from_of() val2 to val4 aren't tested against their initialization value. This causes the test to always succeed, and this value to be used as if it was loaded from the devicetree instead of being ignored, in case of a missing/invalid property in the ethernet OF device node. As a result, the value "0" is written to the relevant registers. Change the conditions to test against the right initialization value. Signed-off-by: Hubert Chaumette <hchaumette@adeneo-embedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* micrel: fix masking off LED bitsSergei Shtylyov2014-03-191-1/+1
| | | | | | | | | | | | | Commit 20d8435a1cff (phy: micrel: add of configuration for LED mode) made the obvious mistake when masking off the LED mode bits: forgot to do a logical NOT to the mask with which it ANDs the register value, so that unrelated bits are cleared instead. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Ben Dooks <ben.dooks@codethink.co.uk> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* phy: micrel: add of configuration for LED modeBen Dooks2014-02-261-4/+45
| | | | | | | | | | | | Add support for the led-mode property for the following PHYs which have a single LED mode configuration value. KSZ8001 and KSZ8041 which both use register 0x1e bits 15,14 and KSZ8021, KSZ8031 and KSZ8051 which use register 0x1f bits 5,4 to control the LED configuration. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller2013-12-181-0/+15
|\ | | | | | | | | | | | | | | | | | | Conflicts: drivers/net/ethernet/intel/i40e/i40e_main.c drivers/net/macvtap.c Both minor merge hassles, simple overlapping changes. Signed-off-by: David S. Miller <davem@davemloft.net>
| * micrel: add support for KSZ8041RNLISergei Shtylyov2013-12-111-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | Renesas R-Car development boards use KSZ8041RNLI PHY which for some reason has ID of 0x00221537 that is not documented for KSZ8041-family PHYs and does not match the documented ID of 0x0022151x (where 'x' is the revision). We have to add the new #define PHY_ID_* and new ksphy_driver[] entry, almost the same as KSZ8041 one, differing only in the 'phy_id' and 'name' fields. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Tested-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: phy: micrel: fix checkpath errorsFlorian Fainelli2013-12-181-2/+2
|/ | | | | | | checkpatch spotted a few spaces vs tabs errors, fix them. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* phy/micrel: Add suspend/resume support to Micrel PHYsPatrice Vilchez2013-09-201-0/+24
| | | | | | | | | | | | | All supported Micrel PHYs implement the standard "power down" bit 11 of BMCR, so this patch adds support using the generic genphy_{suspend,resume} functions. Signed-off-by: Patrice Vilchez <patrice.vilchez@atmel.com> [b.brezillon@overkiz.com: adapt to newer kernel and generalize to other phys] Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> [nicolas.ferre@atmel.com: commit message modification] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: David J. Choi <david.choi@micrel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net/phy: micrel: Add OF configuration support for ksz9021Sean Cross2013-08-211-1/+102
| | | | | | | | | | | | | Some boards require custom PHY configuration, for example due to trace length differences. Add the ability to configure these registers in order to get the PHY to function on boards that need it. Because PHYs are auto-detected based on MDIO device IDs, allow PHY configuration to be specified in the parent Ethernet device node if no PHY device node is present. Signed-off-by: Sean Cross <xobs@kosagi.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: phy: micrel: Staticize ksz8873mll_read_status()Jingoo Han2013-08-071-1/+1
| | | | | | | | | | ksz8873mll_read_status() is used only in this file. Fix the following sparse warning: drivers/net/phy/micrel.c:147:5: warning: symbol 'ksz8873mll_read_status' was not declared. Should it be static? Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* phy/micrel: move flag handling to function for common useHector Palacios2013-03-121-9/+18
| | | | | | | | | | | The flag MICREL_PHY_50MHZ_CLK is not of exclusive use of KSZ8051 model. At least KSZ8021 and KSZ8031 models also use it. This patch moves the handling of this and future flags to a separate function so that the different PHY models can call it on their init function, if needed. Signed-off-by: Hector Palacios <hector.palacios@digi.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* phy/micrel: Add support for KSZ8031Hector Palacios2013-03-121-0/+14
| | | | | | | | | | Micrel PHY KSZ8031 is similar to KSZ8021 and also requires the special initialization of "Operation Mode Strap Override" in reg 0x16 introduced in 212ea99 (phy/micrel: Implement support for KSZ8021). Signed-off-by: Hector Palacios <hector.palacios@digi.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: David S. Miller <davem@davemloft.net>
* net/phy: micrel: Disable asymmetric pause for KSZ9021Vlastimil Kosar2013-02-281-2/+1
| | | | | | | | | | Phyter KSZ9021 has hardware bug. If asymmetric pause is enabled, then it is necessary to disconnect and then reconnect the ethernet cable to get the phyter working. The solution is to disable the asymmetric pause. Signed-off-by: Vlastimil Kosar <ikosar@fit.vutbr.cz> Signed-off-by: David S. Miller <davem@davemloft.net>
* drivers/net/phy/micrel_phy: Add support for new PHYsDavid J. Choi2013-01-281-4/+60
| | | | | | | | | | | | | Summary of changes: .Newly added phys -KSZ8081/KSZ8091, which has some phy ids. -KSZ8061 -KSZ9031, which is Gigabit phy. -KSZ886X, which has a switch function. -KSZ8031, which has a same phy ids with KSZ8021. Signed-off-by: David J. Choi <david.choi@micrel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: add micrel KSZ8873MLL switch supportJean-Christophe PLAGNIOL-VILLARD2012-11-231-0/+44
| | | | | | | | this will allow to detect the link between the switch and the soc Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: netdev@vger.kernel.org Signed-off-by: David S. Miller <davem@davemloft.net>
* phy/micrel: Rename KS80xx to KSZ80xxMarek Vasut2012-09-241-9/+9
| | | | | | | | | | | | | | | There is no such part as KS8001, KS8041 or KS8051. There are only KSZ8001, KSZ8041 and KSZ8051. Rename these parts as such to match the Micrel naming. Signed-off-by: Marek Vasut <marex@denx.de> Cc: David J. Choi <david.choi@micrel.com> Cc: David S. Miller <davem@davemloft.net> Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Cc: Linux ARM kernel <linux-arm-kernel@lists.infradead.org> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* phy/micrel: Implement support for KSZ8021Marek Vasut2012-09-241-0/+27
| | | | | | | | | | | | | | | | The KSZ8021 PHY was previously caught by KS8051, which is not correct. This PHY needs additional setup if it is strapped for address 0. In such case an reserved bit must be written in the 0x16, "Operation Mode Strap Override" register. According to the KS8051 datasheet, that bit means "PHY Address 0 in non-broadcast" and it indeed behaves as such on KSZ8021. The issue where the ethernet controller (Freescale FEC) did not communicate with network is fixed by writing this bit as 1. Signed-off-by: Marek Vasut <marex@denx.de> Cc: David J. Choi <david.choi@micrel.com> Cc: David S. Miller <davem@davemloft.net> Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* phylib: Support registering a bunch of driversChristian Hohnstaedt2012-07-091-51/+11
| | | | | | | | | | | | | | | | If registering of one of them fails, all already registered drivers of this module will be unregistered. Use the new register/unregister functions in all drivers registering more than one driver. amd.c, realtek.c: Simplify: directly return registration result. Tested with broadcom.c All others compile-tested. Signed-off-by: Christian Hohnstaedt <chohnstaedt@innominate.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* phy/micrel: change phy_id_mask for KSZ9021 and KS8001Jason Wang2012-06-191-4/+4
| | | | | | | | | | | | | | | | | | | | | On a freescale imx6q platform, a hardware phy chip KSZ9021 is recognized as a KS8001 chip by the current driver like this: eth0: Freescale FEC PHY driver [Micrel KS8001 or KS8721] KSZ9021 has phy_id 0x00221610, while KSZ8001 has phy_id 0x0022161a, the current phy_id_mask (0x00fffff0/0x00ffff10) can't distinguish them. So change phy_id_mask to resolve this problem. Although the micrel datasheet says that the 4 LSB of phyid2 register contains the chip revision number and the current driver is designed to follow this rule, in reality the chip implementation doesn't follow it. Cc: David J. Choi <david.choi@micrel.com> Cc: David S. Miller <davem@davemloft.net> Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Hui Wang <jason77.wang@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* phy/micrel: add ability to support 50MHz RMII clock on KZS8051RNLBaruch Siach2011-02-141-8/+16
| | | | | | | | | | Platform code can now set the MICREL_PHY_50MHZ_CLK bit of dev_flags in a fixup routine (registered with phy_register_fixup_for_uid()), to make the KZS8051RNL PHY work with 50MHz RMII reference clock. Cc: David J. Choi <david.choi@micrel.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: David S. Miller <davem@davemloft.net>
* net/phy: fix many "defined but unused" warningsUwe Kleine-König2010-10-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | MODULE_DEVICE_TABLE only expands to something if it's compiled for a module. So when building-in support for the phys, the mdio_device_id tables are unused. Marking them with __maybe_unused fixes the following warnings: drivers/net/phy/bcm63xx.c:134: warning: 'bcm63xx_tbl' defined but not used drivers/net/phy/broadcom.c:933: warning: 'broadcom_tbl' defined but not used drivers/net/phy/cicada.c:162: warning: 'cicada_tbl' defined but not used drivers/net/phy/davicom.c:222: warning: 'davicom_tbl' defined but not used drivers/net/phy/et1011c.c:114: warning: 'et1011c_tbl' defined but not used drivers/net/phy/icplus.c:137: warning: 'icplus_tbl' defined but not used drivers/net/phy/lxt.c:226: warning: 'lxt_tbl' defined but not used drivers/net/phy/marvell.c:724: warning: 'marvell_tbl' defined but not used drivers/net/phy/micrel.c:234: warning: 'micrel_tbl' defined but not used drivers/net/phy/national.c:154: warning: 'ns_tbl' defined but not used drivers/net/phy/qsemi.c:141: warning: 'qs6612_tbl' defined but not used drivers/net/phy/realtek.c:82: warning: 'realtek_tbl' defined but not used drivers/net/phy/smsc.c:257: warning: 'smsc_tbl' defined but not used drivers/net/phy/ste10Xp.c:135: warning: 'ste10Xp_tbl' defined but not used drivers/net/phy/vitesse.c:195: warning: 'vitesse_tbl' defined but not used Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: David S. Miller <davem@davemloft.net>
* micrel phy driver - updated(1)Choi, David2010-06-291-19/+148
| | | | | | | | | | | | | | | | Hello all: This patch fixes what Ben mentioned, namely duplicated ids. From: David J. Choi <david.choi@micrel.com> Body of the explanation: This patch has changes as followings; -support the interrupt from phy devices from Micrel Inc. -support more phy devices, ks8737, ks8721, ks8041, ks8051 from Micrel. -remove vsc8201 because this device was used only internal test at Micrel. Signed-off-by: David J. Choi <david.choi@micrel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* Merge branch 'master' of ↵David S. Miller2010-05-121-0/+1
|\ | | | | | | | | | | | | | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6 Conflicts: Documentation/feature-removal-schedule.txt drivers/net/wireless/ath/ar9170/usb.c drivers/scsi/iscsi_tcp.c net/ipv4/ipmr.c
| * phy: Fix initialization in micrel driver.David S. Miller2010-05-061-0/+1
| | | | | | | | | | | | | | | | Missing name string in ks8001_driver, so we crash on register. Reported-by: Ingo Molnar <mingo@elte.hu> Tested-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: David S. Miller <davem@davemloft.net>
* | phy/micrel: Add module device ID table for autoloading.David S. Miller2010-05-031-0/+9
|/ | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* drivers/net/phy: micrel phy driverDavid J. Choi2010-05-031-0/+104
This is the first version of phy driver from Micrel Inc. Signed-off-by: David J. Choi <david.choi@micrel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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