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| * i2c: designware-pci: Add Haswell PCI IDsMika Westerberg2014-06-021-0/+22
| | | | | | | | | | | | | | | | Intel Haswell has the same I2C host controller than Baytrail and it can also be enumerated as a PCI device. Add the PCI IDs to the driver list. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: designware: Add runtime PM hooksMika Westerberg2014-06-021-7/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | It is possible that after entering runtime PM suspend the controller context is lost due the fact that its power is removed. This happens for example on Asus T100, an Intel Baytrail based tablet/laptop. In order to get the controller back to functional state, we need to implement runtime PM hooks which will re-initialize the hardware during runtime PM resume. We can re-use the existing system suspend hooks as the steps to resume/suspend the controller are the same. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: designware: Disable device on system suspendMika Westerberg2014-06-021-0/+1
| | | | | | | | | | | | | | | | | | | | Userspace can initiate system suspend on arbitrary times which means that device drivers must make sure that their device gets quiesced before system suspend is entered. Therefore disable the I2C host controller in the driver system suspend hook. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: nuc900: remove driverWolfram Sang2014-06-023-717/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Arnd said in another patch: "As far as I can tell, this driver must have produced this error for as long as it has been merged into the mainline kernel, but it was never part of the normal build tests: drivers/i2c/busses/i2c-nuc900.c: In function 'nuc900_i2c_probe': drivers/i2c/busses/i2c-nuc900.c:601:17: error: request for member 'apbfreq' in something not a structure or union ret = (i2c->clk.apbfreq)/(pdata->bus_freq * 5) - 1; ^ This is an attempt to get the driver to build and possibly work correctly, although I do wonder whether we should just remove it, as it has clearly never worked." I agree with removing it since nobody showed interest in Arnd's fixup patch. Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: Wan ZongShun <mcuos.com@gmail.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
| * i2c: imx: update i2c clock divider for each transactionFugang Duan2014-06-021-44/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since IMX serial SOCs support low bus freq mode, some clocks freq may change to save power. I2C needs to check the clock source and update the divider. For example: i.MX6SL I2C clk is from IPG_PERCLK which is sourced from IPG_CLK. Under normal operation, IPG_CLK is 66MHz, ipg_perclk is at 22MHz. In low bus freq mode, IPG_CLK is at 12MHz and IPG_PERCLK is down to 4MHz. So the I2C driver must update the divider register for each transaction when the current IPG_PERCLK is not equal to the clock of previous transaction. Signed-off-by: Fugang Duan <B38611@freescale.com> [wsa: removed an outdated comment and simplified debug output] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: imx: fix the i2c bus hang issue when do repeat restartFugang Duan2014-06-021-11/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Test i2c device Maxim max44009, datasheet is located at: http://www.maximintegrated.com/datasheet/index.mvp/id/7175 The max44009 support repeat operation like: read -> repeat restart -> read/write The current i2c imx host controller driver don't support this operation that causes i2c bus hang due to "MTX" is cleared in .i2c_imx_read(). If "read" is the last message there have no problem, so the current driver supports all SMbus operation like: write -> repeat restart -> read/write IMX i2c controller for master receiver has some limitation: - If it is the last byte for one operation, it must generate STOP signal before read I2DR to prevent controller from generating another clock cycle. - If it is the last byte in the read, and then do repeat restart, it must set "MTX" before read I2DR to prevent controller from generating another extra clock cycle. The patch is to fix the issue. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: rcar: update copyright and license informationWolfram Sang2014-06-011-8/+6
| | | | | | | | | | | | | | | | | | | | Make clear that the driver is GPL v2 only. Remove FSF address. Remove filename in comment. Update copyright information. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: rcar: janitorial cleanup after refactoringWolfram Sang2014-06-011-45/+5
| | | | | | | | | | | | | | | | | | | | Remove some obvious comments, remove some superfluous debug output (the error code carries the same information), some white space fixing... Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: rcar: reuse status bits as enable bitsWolfram Sang2014-06-011-13/+4
| | | | | | | | | | | | | | | | | | | | Status register and enable register are identical regarding their layout. Use the bit definitions for both. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: rcar: remove spinlockWolfram Sang2014-06-011-22/+0
| | | | | | | | | | | | | | | | | | The i2c core has per-adapter locks, so no need to protect again. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: rcar: refactor status bit handlingWolfram Sang2014-06-011-13/+7
| | | | | | | | | | | | | | | | | | | | The old macros made it harder to see what was actually happening. Replace them with something more readable. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: rcar: refactor setting up msgWolfram Sang2014-06-011-25/+5
| | | | | | | | | | | | | | | | | | | | | | Setting up a read or write message is similar enough to be done in one function. Also, move a helper function into the new function since it is only used here. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: rcar: check bus free before first messageWolfram Sang2014-06-011-11/+5
| | | | | | | | | | | | | | | | | | | | | | | | We should always check if the bus is free, independently if it is a read or write. It should be done before the first message, though. After that, we ourselves keep the bus busy. Remove a 'ret' assignment which only silenced a build warning. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: rcar: refactor irq state machineWolfram Sang2014-06-011-32/+7
| | | | | | | | | | | | | | | | | | | | | | Remove the seperate functions and use designated constants. As readable but less overhead. Actually, this is even more readable since the old function used a mix of "=" and "|=". Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: rcar: refactor bus state machineWolfram Sang2014-06-011-27/+10
| | | | | | | | | | | | | | | | | | | | Remove the seperate functions and use designated constants. As readable but less overhead. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: rcar: no need to store irq numberWolfram Sang2014-06-011-5/+4
| | | | | | | | | | | | | | | | | | We use devm, so irq number is only needed during probe. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: rcar: not everything needs to be a functionWolfram Sang2014-06-011-11/+3
| | | | | | | | | | | | | | | | | | Very basic operations, just called once, can also go to the caller. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: sh_mobile: add compatibles for additional SoCWolfram Sang2014-06-011-0/+3
| | | | | | | | | | Signed-off-by: Wolfram Sang <wsa@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: rcar: add compatibles for additional SoCWolfram Sang2014-06-011-0/+3
| | | | | | | | | | Signed-off-by: Wolfram Sang <wsa@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: gpio: Use devm_gpio_request()Jingoo Han2014-05-221-18/+7
| | | | | | | | | | | | | | | | | | | | Use devm_gpio_request() to make cleanup paths simpler. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Reviewed-by: Violeta Menendez <violeta.menendez@codethink.co.uk> Reviewed-by: Ian Molton <ian.molton@codethink.co.uk> Tested-by: Violeta Menendez <violeta.menendez@codethink.co.uk> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: eg20t: Fix Kconfig dependenciesJean Delvare2014-05-221-1/+1
| | | | | | | | | | | | | | | | | | | | The i2c-eg20t driver is for a companion chip to the Intel Atom E600 series processors. These are 32-bit x86 processors so the driver is only needed on X86_32. Add COMPILE_TEST as an alternative, so that the driver can still be build-tested elsewhere. Signed-off-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: sh_mobile: fix clock calculation for newer SoCsWolfram Sang2014-05-221-10/+38
| | | | | | | | | | | | | | | | | | | | Newer SoCs have so fast input clocks that the ICCL/H registers only count every second clock to have a meaningful 9-bit range. The driver was already prepared for that happening, but didn't use it so far. Add the proper DT configuration for SoCs that need it. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: sh_mobile: check timing parameters for valid rangeWolfram Sang2014-05-221-4/+13
| | | | | | | | | | | | | | | | | | | | Due to misconfiguration, it can happen that the calculated timing parameters are out of range. Bail out if that happens. We can also simplify some logic later because of the verified value. Also, make the printouts of the values more precise by adding the hex-prefixes. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: sh_mobile: bail out on errors when initializingWolfram Sang2014-05-221-5/+7
| | | | | | | | | | | | | | | | sh_mobile_i2c_init() could detect wrong settings, but didn't bail out, so it would continue unconfigured. Fix this. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: sh_mobile: remove superfluous offset parameterWolfram Sang2014-05-221-9/+6
| | | | | | | | | | | | | | Following the KISS principle, remove unneeded stuff. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: sh_mobile: devm conversion, irq setupWolfram Sang2014-05-221-41/+15
| | | | | | | | | | | | | | | | | | | | This is what devm was made for. No rollback mechanism needed, remove the hook parameter from the irq setup function and simplify it. While we are here change some variables to proper types. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: sh_mobile: devm conversion, low hanging fruitsWolfram Sang2014-05-221-31/+10
| | | | | | | | | | | | | | | | | | Convert the easy parts to devm. irqs will be converted in a seperate patch to keep diffs readable. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: sh_mobile: honor DT bus speed settingsWolfram Sang2014-05-221-1/+4
| | | | | | | | | | Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: sh_mobile: improve error handlingWolfram Sang2014-05-221-16/+9
| | | | | | | | | | | | | | | | | | Use standard i2c error codes for i2c failures. Also, don't print something on timeout since it happens regularly with i2c. Simplify some, logic, too. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: sh_mobile: replace magic hex values with constantsWolfram Sang2014-05-221-5/+6
| | | | | | | | | | | | | | No functional change, binaries are identical. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: exynos5: add support for HSI2C on Exynos5260 SoCNaveen Krishna Ch2014-05-221-12/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | HSI2C module on Exynos5260 differs from current modules in following ways: 1. HSI2C on Exynos5260 has fifo_depth of 16bytes 2. Module needs to be reset as a part of init sequence. Hence, Following changes are involved. 1. Add a new compatible string and Updates the Documentation dt bindings. 2. Introduce a variant struct to support the changes in H/W 3. Reset the module during init. Thus, bringing the module back to default state irrespective of what firmware did with it. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: ali1563: fix checkpatch.pl issuesRichard Leitner2014-05-221-37/+45
| | | | | | | | | | | | | | | | Fixed most checkpatch.pl issues Signed-off-by: Richard Leitner <me@g0hl1n.net> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: nomadik: Fixup system suspendUlf Hansson2014-05-221-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For !CONFIG_PM_RUNTIME, the device were never put back into active state while resuming. For CONFIG_PM_RUNTIME, we blindly trusted the device to be inactive while we were about to handle it at suspend late, which is just too optimistic. Even if the driver uses pm_runtime_put_sync() after each tranfer to return it's runtime PM resources, there are no guarantees this will actually mean the device will inactivated. The reason is that the PM core will prevent runtime suspend during system suspend, and thus when a transfer occurs during the early phases of system suspend the device will be kept active after the transfer. To handle both issues above, use pm_runtime_force_suspend|resume() from the system suspend|resume callbacks. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: imx: add SMBus block read supportKaushal Butala2014-05-221-3/+28
| | | | | | | | | | | | | | | | | | | | | | The smbus block read is not currently supported for imx i2c devices. This patchset adds the support to imx i2c bus so that blocks of data can be read using SMbus block reads.(using i2c_smbus_read_block_data() function from the i2c_core.c.). Tested with 3.10.9 kernel. Reviewed-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Kaushal Butala <kaushalkernelmailinglist@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: mv64xxx: Change i2c compatibles for sunxiMaxime Ripard2014-05-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | The Allwinner A10 compatibles were following a slightly different compatible patterns than the rest of the SoCs for historical reasons. Move to the other pattern for consistency across all Allwinner Socs. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> [wsa: dropped binding OK as per http://lists.infradead.org/pipermail/linux-arm-kernel/2014-February/229438.html] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* | i2c: ChromeOS EC tunnel driverDoug Anderson2014-06-033-0/+328
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On ARM Chromebooks we have a few devices that are accessed by both the AP (the main "Application Processor") and the EC (the Embedded Controller). These are: * The battery (sbs-battery). * The power management unit tps65090. On the original Samsung ARM Chromebook these devices were on an I2C bus that was shared between the AP and the EC and arbitrated using some extranal GPIOs (see i2c-arb-gpio-challenge). The original arbitration scheme worked well enough but had some downsides: * It was nonstandard (not using standard I2C multimaster) * It only worked if the EC-AP communication was I2C * It was relatively hard to debug problems (hard to tell if i2c issues were caused by the EC, the AP, or some device on the bus). On the HP Chromebook 11 the design was changed to: * The AP/EC comms were still i2c, but the battery/tps65090 were no longer on the bus used for AP/EC communication. The battery was exposed to the AP through a limited i2c tunnel and tps65090 was exposed to the AP through a custom Linux driver. On the Samsung ARM Chromebook 2 the scheme is changed yet again, now: * The AP/EC comms are now using SPI for faster speeds. * The EC's i2c bus is exposed to the AP through a full i2c tunnel. The upstream "tegra124-venice2" uses the same scheme as the Samsung ARM Chromebook 2, though it has a different set of components on the other side of the bus. This driver supports the scheme used by the Samsung ARM Chromebook 2. Future patches to this driver could add support for the battery tunnel on the HP Chromebook 11 (and perhaps could even be used to access tps65090 on the HP Chromebook 11 instead of using a special driver, but I haven't researched that enough). Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Lee Jones <lee.jones@linaro.org>
* i2c: rcar: bail out on zero length transfersWolfram Sang2014-05-141-1/+8
| | | | | | | | | | This hardware does not support zero length transfers. Instead, the driver does one (random) byte transfers currently with undefined results for the slaves. We now bail out. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
* i2c: qup: Fix pm_runtime_get_sync usageAndy Gross2014-05-141-1/+1
| | | | | | | | | This patch corrects the error check on the call to pm_runtime_get_sync. Signed-off-by: Andy Gross <agross@codeaurora.org> Reviewed-by: Ivan T. Ivanov <iivanov@mm-sol.com> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: s3c2410: resume race fixOlof Johansson2014-05-141-1/+1
| | | | | | | | | | | | | | | Don't unmark the device as suspended until after it's been re-setup. The main race would be w.r.t. an i2c driver that gets resumed at the same time (asyncronously), that is allowed to do a transfer since suspended is set to 0 before reinit, but really should have seen the -EIO return instead. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
* i2c: nomadik: Don't use IS_ERR for devm_ioremapUlf Hansson2014-05-141-1/+1
| | | | | | | | | devm_ioremap() returns NULL on error, not an error. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
* i2c: designware: Mask all interrupts during i2c controller enableDu, Wenkai2014-05-141-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There have been "i2c_designware 80860F41:00: controller timed out" errors on a number of Baytrail platforms. The issue is caused by incorrect value in Interrupt Mask Register (DW_IC_INTR_MASK) when i2c core is being enabled. This causes call to __i2c_dw_enable() to immediately start the transfer which leads to timeout. There are 3 failure modes observed: 1. Failure in S0 to S3 resume path The default value after reset for DW_IC_INTR_MASK is 0x8ff. When we start the first transaction after resuming from system sleep, TX_EMPTY interrupt is already unmasked because of the hardware default. 2. Failure in normal operational path This failure happens rarely and is hard to reproduce. Debug trace showed that DW_IC_INTR_MASK had value of 0x254 when failure occurred, which meant TX_EMPTY was unmasked. 3. Failure in S3 to S0 suspend path This failure also happens rarely and is hard to reproduce. Adding debug trace that read DW_IC_INTR_MASK made this failure not reproducible. But from ISR call trace we could conclude TX_EMPTY was unmasked when problem occurred. The patch masks all interrupts before the controller is enabled to resolve the faulty DW_IC_INTR_MASK conditions. Signed-off-by: Wenkai Du <wenkai.du@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> [wsa: improved the comment and removed typo in commit msg] Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
* Merge branch 'i2c/for-next' of ↵Linus Torvalds2014-04-0946-342/+2529
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux Pull i2c updates from Wolfram Sang: "Here is the pull request from the i2c subsystem. It got a little delayed because I needed to wait for a dependency to be included (commit b424080a9e08: "reset: Add optional resets and stubs"). Plus, I had some email problems. All done now, the highlights are: - drivers can now deprecate their use of i2c classes. That shouldn't be used on embedded platforms anyhow and was often blindly copy&pasted. This mechanism gives users time to switch away and ultimately boot faster once the use of classes for those drivers is gone for good. - new drivers for QUP, Cadence, efm32 - tracepoint support for I2C and SMBus - bigger cleanups for the mv64xxx, nomadik, and designware drivers And the usual bugfixes, cleanups, feature additions. Most stuff has been in linux-next for a while. Just some hot fixes and new drivers were added a bit more recently." * 'i2c/for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (63 commits) i2c: cadence: fix Kconfig dependency i2c: Add driver for Cadence I2C controller i2c: cadence: Document device tree bindings Documentation: i2c: improve section about flags mangling the protocol i2c: qup: use proper type fro clk_freq i2c: qup: off by ones in qup_i2c_probe() i2c: efm32: fix binding doc MAINTAINERS: update I2C web resources i2c: qup: New bus driver for the Qualcomm QUP I2C controller i2c: qup: Add device tree bindings information i2c: i2c-xiic: deprecate class based instantiation i2c: i2c-sirf: deprecate class based instantiation i2c: i2c-mv64xxx: deprecate class based instantiation i2c: i2c-designware-platdrv: deprecate class based instantiation i2c: i2c-davinci: deprecate class based instantiation i2c: i2c-bcm2835: deprecate class based instantiation i2c: mv64xxx: Fix reset controller handling i2c: omap: fix usage of IS_ERR_VALUE with pm_runtime_get_sync i2c: efm32: new bus driver i2c: exynos5: remove unnecessary cast of void pointer ...
| * i2c: cadence: fix Kconfig dependencyWolfram Sang2014-04-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During development, the driver first really needed to depend on COMMON_CLK only. Later, it was switched to writel_relaxed, but it was forgotten to update the dependencies, so build errors occured: config: make ARCH=i386 allyesconfig All error/warnings: drivers/i2c/busses/i2c-cadence.c: In function 'cdns_i2c_clear_bus_hold': >> drivers/i2c/busses/i2c-cadence.c:168:3: error: implicit declaration >> of function 'writel_relaxed' [-Werror=implicit-function-declaration] Use a very safe dependency for now. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: Add driver for Cadence I2C controllerSoren Brinkmann2014-04-063-0/+913
| | | | | | | | | | | | | | | | | | | | Add a driver for the Cadence I2C controller. This controller is for example found in Xilinx Zynq. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Tested-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Harini Katakam <harinik@xilinx.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: qup: use proper type fro clk_freqWolfram Sang2014-04-061-1/+1
| | | | | | | | | | | | | | | | It is used with of_property_read_u32(), so it should be u32. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Fixes: 10c5a8425968 ('i2c: qup: New bus driver for the Qualcomm QUP I2C controller')
| * i2c: qup: off by ones in qup_i2c_probe()Dan Carpenter2014-04-031-2/+2
| | | | | | | | | | | | | | | | These should ">= ARRAY_SIZE()" instead of "> ARRAY_SIZE()". Fixes: 10c5a8425968 ('i2c: qup: New bus driver for the Qualcomm QUP I2C controller') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: qup: New bus driver for the Qualcomm QUP I2C controllerBjorn Andersson2014-03-283-0/+779
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This bus driver supports the QUP i2c hardware controller in the Qualcomm SOCs. The Qualcomm Universal Peripheral Engine (QUP) is a general purpose data path engine with input/output FIFOs and an embedded i2c mini-core. The driver supports FIFO mode (for low bandwidth applications) and block mode (interrupt generated for each block-size data transfer). Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Reviewed-by: Andy Gross <agross@codeaurora.org> Tested-by: Philip Elcan <pelcan@codeaurora.org> [wsa: removed needless IS_ERR_VALUE] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: i2c-xiic: deprecate class based instantiationWolfram Sang2014-03-281-1/+1
| | | | | | | | | | | | | | Warn users that class based instantiation is going away soon in favour of more robust probing and faster bootup times. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: i2c-sirf: deprecate class based instantiationWolfram Sang2014-03-281-1/+1
| | | | | | | | | | | | | | | | Warn users that class based instantiation is going away soon in favour of more robust probing and faster bootup times. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: Barry Song <baohua@kernel.org>
| * i2c: i2c-mv64xxx: deprecate class based instantiationWolfram Sang2014-03-281-1/+1
| | | | | | | | | | | | | | Warn users that class based instantiation is going away soon in favour of more robust probing and faster bootup times. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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