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* | i915: Fix obj size vs. alignment for drm_pci_alloc()Ville Syrjälä2017-09-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | drm_pci_alloc() refuses to cooperate if the passed alignment exceeds the object size. So round up the obj size to the next power of two as well to make this actually work. Obviously things work just fine as long as the size was a power of two to begin with. However kms_cursor_crc doesn't always use power of two sizes so we hit a failure when we try to allocate the phys memory. Testcase: igt/kms_cursor_crc Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170907143203.13055-1-ville.syrjala@linux.intel.com Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: Disable mmio debugging during user accessChris Wilson2017-09-073-8/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the user bypasses i915 and accesses mmio directly, that easily confuses our automatic mmio debugging (any error we then detect is likely to be as a result of the user). Since we expect userspace to open debugfs/i915_forcewake_user if i915.ko is loaded and they want mmio access, that makes the opportune time to disable our debugging for duration of the bypass. v2: Move the fiddling of uncore internals to uncore.c References: https://bugs.freedesktop.org/show_bug.cgi?id=102543 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170907134441.12881-1-chris@chris-wilson.co.uk
* | drm/i915/skl+: debugfs entry to control IPCKumar, Mahesh2017-09-071-1/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch creates an entry in debugfs to check the status of IPC. This can also be used to enable/disable IPC in supported platforms. Changes since V1: - fix use of HAS_IPC - use kstrtobool_from_user (Maarten) - drm_info log, while enabling IPC (Maarten) Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170817134529.2839-9-mahesh1.kumar@intel.com [mlankhorst: enableddisabled -> yesno to match ipc write]
* | drm/i915/bxt+: Enable IPC supportKumar, Mahesh2017-09-075-1/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds IPC support. This patch also enables IPC in all supported platforms based on has_ipc flag. IPC (Isochronous Priority Control) is the hardware feature, which dynamically controls the memory read priority of Display. When IPC is enabled, plane read requests are sent at high priority until filling above the transition watermark, then the requests are sent at lower priority until dropping below the level 0 watermark. The lower priority requests allow other memory clients to have better memory access. When IPC is disabled, all plane read requests are sent at high priority. Changes since V1: - Remove commandline parameter to disable ipc - Address Paulo's comments Changes since V2: - Address review comments - Set ipc_enabled flag Changes since V3: - move ipc_enabled flag assignment inside intel_ipc_enable function Changes since V4: - Re-enable IPC after suspend/resume Changes since V5: - Enable IPC for all gen >=9 except SKL Changes since V6: - fix commit msg - after resume program IPC based on SW state. Changes since V7: - Modify IPC support check based on HAS_IPC macro (suggested by Chris) Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170817134529.2839-8-mahesh1.kumar@intel.com
* | drm/i915/gen9+: Add has_ipc flag in device info structureMahesh Kumar2017-09-072-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | New Isochronous Priority Control (IPC) capability is introduced in newer GEN platforms. This patch adds a device info flag to indicate if platform supports IPC. Patch also sets this flag in supported platforms. Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170817134529.2839-7-mahesh1.kumar@intel.com
* | drm/i915/cnl: Extend WM workaround with IPC for CNLKumar, Mahesh2017-09-071-1/+2
| | | | | | | | | | | | | | | | | | | | CNL:A & CNL:B have same workaround as KBL to increase wm level latency by 4us if IPC is enabled. Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170817134529.2839-6-mahesh1.kumar@intel.com
* | drm/i915/glk: IPC linetime watermark workaround for GLKKumar, Mahesh2017-09-071-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | IF IPC is enabled LINETIME_WM value should be half of calculated value line time = ROUNDDOWN(1/2 * Calculated Line Time) Earlier code was rounding-up the value, But updated Bspec says we should take the ROUNDDOWN. This patch corrects that as well. Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170817134529.2839-5-mahesh1.kumar@intel.com
* | drm/i915/gen10: Calculate and enable transition WMKumar, Mahesh2017-09-071-2/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GEN > 9 require transition WM to be programmed if IPC is enabled. This patch calculates & enable transition WM for supported platforms. If transition WM is enabled, Plane read requests are sent at high priority until filling above the transition watermark, then the requests are sent at lower priority until dropping below the level-0 WM. The lower priority requests allow other memory clients to have better memory access. transition minimum is the minimum amount needed for trans_wm to work to ensure the demote does not happen before enough data has been read to meet the level 0 watermark requirements. transition amount is configurable value. Higher values will tend to cause longer periods of high priority reads followed by longer periods of lower priority reads. Tuning to lower values will tend to cause shorter periods of high and lower priority reads. Keeping transition amount to 10 in this patch, as suggested by HW team. Changes since V1: - Address review comments from Maarten Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com> Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170817134529.2839-4-mahesh1.kumar@intel.com
* | drm/i915/skl+: Optimize WM calculationKumar, Mahesh2017-09-072-85/+119
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Plane configuration parameters doesn't change for each WM-level calculation. Currently we compute same parameters 8 times for each wm-level. This patch optimizes it by calculating these parameters in beginning & reuse during each level-wm calculation. Changes since V1: - rebase on top of Rodrigo's series for CNL Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com> Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170817134529.2839-3-mahesh1.kumar@intel.com
* | drm/i915: Fixed point fixed16 wrapper cleanupKumar, Mahesh2017-09-071-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | As per suggestion from Jani, cleanup the code. Cleanup includes - Instead of left shifting & check, compare with U32/16_MAX - Use typecast instead of clamp_t Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170817134529.2839-2-mahesh1.kumar@intel.com
* | drm/i915: Use __sg_alloc_table_from_pages for userptr allocationsTvrtko Ursulin2017-09-073-55/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the addition of __sg_alloc_table_from_pages we can control the maximum coalescing size and eliminate a separate path for allocating backing store here. Similar to 871dfbd67d4e ("drm/i915: Allow compaction upto SWIOTLB max segment size") this enables more compact sg lists to be created and so has a beneficial effect on workloads with many and/or large objects of this class. v2: * Rename helper to i915_sg_segment_size and fix swiotlb override. * Commit message update. v3: * Actually include the swiotlb override fix. v4: * Regroup parameters a bit. (Chris Wilson) v5: * Rebase for swiotlb_max_segment. * Add DMA map failure handling as in abb0deacb5a6 ("drm/i915: Fallback to single PAGE_SIZE segments for DMA remapping"). v6: Handle swiotlb_max_segment() returning 1. (Joonas Lahtinen) v7: Rebase. v8: Commit spelling fix. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: linux-kernel@vger.kernel.org Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170803091417.23677-1-tvrtko.ursulin@linux.intel.com
* | drm/i915: Disable snooping (userptr, set-cache-level) on gen4Chris Wilson2017-09-072-2/+2
|/ | | | | | | | | | | | | | | The original gen4 has an issue where writes (both render and blt) into snoopable pages are lost. We've previously worked around this in userspace (ddx, igt) by simply not requesting snoopable buffers, but upon rediscovering this problem for a third time, make the kernel reject such requests with -ENODEV. This disables snooping on userspace buffers for i965g and i965gm (original gen4) machines. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170906192424.26970-1-chris@chris-wilson.co.uk
* drm/i915: Update DRIVER_DATE to 20170907Jani Nikula2017-09-071-2/+2
| | | | | Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
* drm/i915/cnl: WaThrottleEUPerfToAvoidTDBackPressure:cnl(pre-prod)Rodrigo Vivi2017-09-062-0/+5
| | | | | | | | | | | | | Wa for B-stepping only. A for a hang issue that requires throttling EU performace to 12.5% to avoid back pressure to thread dispatch v2: Rebased. No change from v1. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Oscar Mateo <oscar.mateo@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170906220325.24524-1-rodrigo.vivi@intel.com
* drm/i915: Lift has-pinned-pages assert to caller of ↵Chris Wilson2017-09-061-2/+4
| | | | | | | | | | | | | ____i915_gem_object_get_pages i915_gem_object_attach_phys() is trying to swap out its shmemfs pages for a new set of physically contiguous pages, but unfortunately triggers an assert inside get-pages. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102561 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20170906135220.13508-1-chris@chris-wilson.co.uk Reviewed-by: Matthew Auld <matthew.auld@intel.com>
* drm/i915: Display WA #1133 WaFbcSkipSegments:cnl, glkRodrigo Vivi2017-09-062-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | Skip compressing 1 segment at the end of the frame, avoid a pixel count mismatch nuke event when last active pixel and dummy pixel has same color for Odd Plane Width / Height. For both platforms Gemini Lake and Cannon Lake. v2: Use function-like macro and also use mask to clean to make sure bit 11 is 0. (Suggested by Paulo). v3: Add Display WA notation and also apply for GLK. Both Forgotten on v2. Using "GLK_" prefix since GLK came before CNL. v4: Forgot to "|=" when moving directly macro to masked val. (Noticed by Paulo.) v5: Rebased on top of 0a46ddd57c9e ("drm/i915/cnp: Wa 1181: Fix Backlight issue") Cc: Imre Deak <imre.deak@intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170905193013.31710-1-rodrigo.vivi@intel.com
* drm/i915/cnl: Allow the reg_read ioctl to read the RCS TIMESTAMP registerNanley Chery2017-09-061-1/+1
| | | | | | | | | | | | This enables the Mesa driver to advertise support for ARB_timer_query, and thus an OpenGL version higher than 3.2. Suggested-by: Ben Widawsky <ben@bwidawsk.net> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Nanley Chery <nanley.g.chery@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170905184507.30046-1-nanley.g.chery@intel.com
* drm/i915: Move device_info.has_snoop into the static tablesChris Wilson2017-09-062-1/+8
| | | | | | | | | | | | | | Currently we define any !llc machine as using snoop instead. However, some platforms run into trouble using snoop that we would like to disable, and to do so easily we want to be able to use the static device_info tables. v2: Leave the old snoop = !llc as a warning for the time being to check that all stanzas are filled as either llc or snoop. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170906105653.3665-1-chris@chris-wilson.co.uk
* drm/i915: Disable MI_STORE_DATA_IMM for i915g/i915gmChris Wilson2017-09-064-21/+20
| | | | | | | | | | | | | | The early gen3 machines (i915g/Grantsdale and i915gm/Alviso) share a lot of characteristics in their MI/GTT blocks with gen2, and in particular can only use physical addresses in MI_STORE_DATA_IMM. This makes it incompatible with our usage, so include those two machines in the blacklist to prevent usage. v2: Make it easy for gcc and rewrite it as a switch to save some space. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> #v1 Link: https://patchwork.freedesktop.org/patch/msgid/20170906152859.5304-1-chris@chris-wilson.co.uk
* drm/i915: Re-enable GTT following a device resetChris Wilson2017-09-061-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ville Syrjälä spotted that PGETBL_CTL was losing its enable bit upon a reset. That was causing the display to show garbage on his 945gm. On my i915gm the effect was far more severe; re-enabling the display following the reset without PGETBL_CTL being enabled lead to an immediate hard hang. We do have a routine to re-enable PGETBL_CTL which is applicable to gen2-4, although on gen4 it is documented that a graphics reset doesn't alter the register (no such wording is given for gen3) and should be safe to call to punch back in the enable bit. However, that leaves the question of whether we need to completely re-initialise the register and the rest of the GSM. For g33/pnv/gen4+, where we do have a configurable page table, its contents do seem to be kept, and so we should be able to recover without having to reinitialise the GTT from scratch (as prior to g33, that register is configured by the BIOS and we leave alone except for the enable bit). This appears to have been broken by commit 5fbd0418eef2 ("drm/i915: Re-enable GGTT earlier during resume on pre-gen6 platforms"), which moved the intel_enable_gtt() from i915_gem_init_hw() (also used by reset) to add it earlier during hw init and resume, missing the reset path. v2: Find the culprit, rearrange ggtt_enable to be before gem_init_hw to match init/resume Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Fixes: 5fbd0418eef2 ("drm/i915: Re-enable GGTT earlier during resume on pre-gen6 platforms") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101852 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Daniel Vetter <daniel@ffwll.ch> Reviewed-by: Daniel Vetter <daniel@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20170906111405.27110-1-chris@chris-wilson.co.uk Tested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
* drm/i915/cnp: Wa 1181: Fix Backlight issueRodrigo Vivi2017-09-052-2/+26
| | | | | | | | | | | | | | | | | | | | | | | | | This workaround fixes a CNL PCH bug when changing backlight from a lower frequency to a higher frequency. During random reboot cycles, display backlight seems to be off/ dim for 2-3 mins. The only functional change on this patch is to set bit 13 of 0xC2020 for CNL PCH. The rest of patch is organizing identation around those bits definitions and re-organizing CFL workarounds. v2: Only add the bit that matters without touching others around (Jani). Rebase on top of clock gating functions rename. Cc: Jani Nikula <jani.nikula@intel.com> Cc: Arthur J Runyan <arthur.j.runyan@intel.com> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170831045223.3960-1-rodrigo.vivi@intel.com
* drm/i915: Annotate user relocs with __userVille Syrjälä2017-09-051-1/+1
| | | | | | | | | | | | | | | Add the missing __user to the urelocs cast to fix the following sparse warning: i915_gem_execbuffer.c:1541:47: warning: cast removes address space of expression i915_gem_execbuffer.c:1541:62: warning: incorrect type in argument 2 (different address spaces) i915_gem_execbuffer.c:1541:62: expected void const [noderef] <asn:1>*from i915_gem_execbuffer.c:1541:62: got char * Cc: Chris Wilson <chris@chris-wilson.co.uk> Fixes: 2889caa92321 ("drm/i915: Eliminate lots of iterations over the execobjects array") Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170901165434.24636-1-ville.syrjala@linux.intel.com Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> #irc
* drm/i915: Constify load detect modeVille Syrjälä2017-09-052-7/+7
| | | | | | | | | Make the mode used for load detection const, and adjust all relevant functions to accept a const mode. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170518193837.393-2-ville.syrjala@linux.intel.com Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Silence sparse by using gfp_tChris Wilson2017-09-051-1/+1
| | | | | | | | | | | | Sparse enforces that GFP flags are only manipulated inside gfp_t locals. Fixes: 4d470f7359c4 ("drm/i915: Avoid undefined behaviour of "u32 >> 32"") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170901145729.21363-1-chris@chris-wilson.co.uk Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
* Merge drm-upstream/drm-next into drm-intel-next-queuedJani Nikula2017-09-04393-6528/+8672
|\ | | | | | | | | | | Catch up with upstream while it's easy. Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| * Merge branch 'drm-vmwgfx-next' of ↵Dave Airlie2017-08-298-158/+503
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://people.freedesktop.org/~syeh/repos_linux into drm-next vmwgfx add fence fd support. * 'drm-vmwgfx-next' of git://people.freedesktop.org/~syeh/repos_linux: drm/vmwgfx: Bump the version for fence FD support drm/vmwgfx: Add export fence to file descriptor support drm/vmwgfx: Add support for imported Fence File Descriptor drm/vmwgfx: Prepare to support fence fd drm/vmwgfx: Fix incorrect command header offset at restart drm/vmwgfx: Support the NOP_ERROR command drm/vmwgfx: Restart command buffers after errors drm/vmwgfx: Move irq bottom half processing to threads drm/vmwgfx: Don't use drm_irq_[un]install
| | * drm/vmwgfx: Bump the version for fence FD supportSinclair Yeh2017-08-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Minor version bump to indicate support for fence FD Signed-off-by: Sinclair Yeh <syeh@vmware.com> Reviewed-by: Deepak Singh Rawat <drawat@vmware.com> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
| | * drm/vmwgfx: Add export fence to file descriptor supportSinclair Yeh2017-08-284-11/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added code to link a fence to a out_fence_fd file descriptor and thread out_fence_fd down to vmw_execbuf_copy_fence_user() so it can be copied into the IOCTL reply and be passed back up the the user. v2: Make sure to sync and clean up in case of failure Signed-off-by: Sinclair Yeh <syeh@vmware.com> Reviewed-by: Deepak Singh Rawat <drawat@vmware.com> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
| | * drm/vmwgfx: Add support for imported Fence File DescriptorSinclair Yeh2017-08-283-2/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows vmwgfx to wait on a fence created by another device. v2: * Remove special handling for vmwgfx fence and just use dma_fence_wait() * Use interruptible waits * Added function documentation Signed-off-by: Sinclair Yeh <syeh@vmware.com> Reviewed-by: Deepak Singh Rawat <drawat@vmware.com> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
| | * drm/vmwgfx: Prepare to support fence fdSinclair Yeh2017-08-281-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | Make the fields and flags available. Signed-off-by: Sinclair Yeh <syeh@vmware.com> Reviewed-by: Deepak Singh Rawat <drawat@vmware.com> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
| | * drm/vmwgfx: Fix incorrect command header offset at restartThomas Hellstrom2017-08-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Sometimes it appears like the device modifies the command header offset member. So explicitly clear it when restarting after an error. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Sinclair Yeh <syeh@vmware.com>
| | * drm/vmwgfx: Support the NOP_ERROR commandThomas Hellstrom2017-08-281-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Can be used by user-space applications to test and verify the kernel command buffer error recovery functionality. Malicious user-space apps could potentially use this command to slow down graphics processing somewhat, but they could also accomplish the same thing using a random malformed command so this should be considered safe. At least as safe as it gets. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Sinclair Yeh <syeh@vmware.com>
| | * drm/vmwgfx: Restart command buffers after errorsThomas Hellstrom2017-08-283-27/+206
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously we skipped the command buffer and added an extra fence to avoid hangs due to skipped fence commands. Now we instead restart the command buffer after the failing command, if there are any commands left. In addition we print out some information about the failing command and its location in the command buffer. Testing Done: ran glxgears using mesa modified to send the NOP_ERROR command before each 10th clear and verified that we detected the device error properly and that there were no other device errors caused by incorrectly ordered command buffers. Also ran the piglit "quick" test suite which generates a couple of device errors and verified that they were handled as intended. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Sinclair Yeh <syeh@vmware.com>
| | * drm/vmwgfx: Move irq bottom half processing to threadsThomas Hellstrom2017-08-284-91/+112
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This gets rid of the irq bottom half tasklets and instead performs the work needed in process context. We also convert irq-disabling spinlocks to ordinary spinlocks. This should decrease system latency for other system components, like sound for example but has the potential to increase latency for processes that wait on the GPU. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Sinclair Yeh <syeh@vmware.com>
| | * drm/vmwgfx: Don't use drm_irq_[un]installThomas Hellstrom2017-08-283-21/+40
| | | | | | | | | | | | | | | | | | | | | | | | We're not allowed to change the upstream version of the drm_irq_install function to be able to incorporate threaded irqs. So roll our own irq install- and uninstall functions instead of relying on the drm core ones. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
| * | Merge tag 'exynos-drm-next-for-v4.14' of ↵Dave Airlie2017-08-2916-309/+299
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next Summary: - Provide NV12MT pixel format support of Mixer driver in generic way. - Refactor Exynos KMS drivers . Refactoring to panel detection way . Refactoring to setting up possible_crtcs . Refactoring to video and command mode support - Some cleanups * tag 'exynos-drm-next-for-v4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos: drm/exynos: simplify set_pixfmt() in DECON and FIMD drivers drm/exynos: consistent use of cpp drm/exynos: mixer: remove src offset from mixer_graph_buffer() drm/exynos: mixer: simplify mixer_graph_buffer() drm/exynos: mixer: simplify vp_video_buffer() drm/exynos: mixer: enable NV12MT support for the video plane drm/exynos: mixer: fix chroma comment in vp_video_buffer() arm64: dts: exynos: remove i80-if-timings nodes dt-bindings: exynos5433-decon: remove i80-if-timings property drm/exynos/decon5433: use mode info stored in CRTC to detect i80 mode drm/exynos: add mode_valid callback to exynos_drm drm/exynos/decon5433: refactor irq requesting code drm/exynos/mic: use mode info stored in CRTC to detect i80 mode drm/exynos/dsi: propagate info about command mode from panel drm/exynos/dsi: refactor panel detection logic drm/exynos: use helper to set possible crtcs drm/exynos/decon5433: use readl_poll_timeout helpers
| | * | drm/exynos: simplify set_pixfmt() in DECON and FIMD driversTobias Jakobi2017-08-253-16/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | DRM core already checks the validity of the pixelformat. Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Signed-off-by: Inki Dae <inki.dae@samsung.com>
| | * | drm/exynos: consistent use of cppTobias Jakobi2017-08-253-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A recent commit (272725c7db4da1fd3229d944fc76d2e98e3a144e) has removed the use of 'bits_per_pixel' in DRM. However the corresponding Exynos driver code still uses the ambiguous 'bpp', even though it is now initialized from fb->cpp[0]. Consistenly use 'cpp' in FIMD, DECON7 and DECON5433 drivers. Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
| | * | drm/exynos: mixer: remove src offset from mixer_graph_buffer()Tobias Jakobi2017-08-251-9/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We always translate the dma address such that the offsets of the source image are zero. Hence we can remove manipulation of the MXR_GRAPHIC_SXY(win) register and just zero them once in mixer_win_reset(). Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Signed-off-by: Inki Dae <inki.dae@samsung.com>
| | * | drm/exynos: mixer: simplify mixer_graph_buffer()Tobias Jakobi2017-08-251-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DRM core already checks in drm_atomic_plane_check() if the pixelformat is valid. Hence we can collapse the default case of the switch statement with the XRGB8888 case. No functional change. Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Signed-off-by: Inki Dae <inki.dae@samsung.com>
| | * | drm/exynos: mixer: simplify vp_video_buffer()Tobias Jakobi2017-08-251-20/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DRM core already checks in drm_atomic_plane_check() if the pixelformat is valid. Hence we can drop the default case of the switch statement and collapse most of the code. Also rename the two booleans to reflect what true/false actually means, and to avoid mixing CrCb/NV21 descriptions. No functional change. Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Signed-off-by: Inki Dae <inki.dae@samsung.com>
| | * | drm/exynos: mixer: enable NV12MT support for the video planeTobias Jakobi2017-08-254-1/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The video processor supports a tiled version of the NV12 format, known as NV12MT in V4L2 terms. The support was removed in commit 083500baefd5f4c215a5a93aef2492c1aa775828 due to not being a real pixel format, but rather NV12 with a special memory layout. With the introduction of FB modifiers, we can now properly support this format again. Tested with a hacked up modetest from libdrm's test suite on an ODROID-X2 (Exynos4412). Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Signed-off-by: Inki Dae <inki.dae@samsung.com>
| | * | drm/exynos: mixer: fix chroma comment in vp_video_buffer()Tobias Jakobi2017-08-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current comment sounds like the division op is done to compensate for some hardware erratum. But the chroma plane having half the height of the luma plane is just the way NV12/NV21 is defined, so clarify this behaviour. Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Signed-off-by: Inki Dae <inki.dae@samsung.com>
| | * | drm/exynos/decon5433: use mode info stored in CRTC to detect i80 modeAndrzej Hajda2017-08-251-15/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since panel's mode of work is propagated properly from panel to DECON, there is no need to use redundant private device tree property. The only issue with such approach is that check for required interrupts should be postponed until panel communicate its requirements, ie to mode validation phase - mode_valid callback. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
| | * | drm/exynos: add mode_valid callback to exynos_drmAndrzej Hajda2017-08-252-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | crtc::mode_valid callback is required to implement proper pipeline validation for command/video modes. Since Exynos uses private framework such callback should be added to it. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
| | * | drm/exynos/decon5433: refactor irq requesting codeAndrzej Hajda2017-08-251-24/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To allow runtime validation of mode of work irq request code should be split into two separate phases: - irq reqesting, - irq checking. Following patches will move 2nd phase to mode validation phase. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
| | * | drm/exynos/mic: use mode info stored in CRTC to detect i80 modeAndrzej Hajda2017-08-251-40/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MIC driver should use info from CRTC to check mode of work instead of illegally peeking into nodes of other devices. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
| | * | drm/exynos/dsi: propagate info about command mode from panelAndrzej Hajda2017-08-252-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mipi_dsi framework provides information about panel's mode of work. This info should be propagated upstream to configure all elements of the pipeline. As CRTC is the common denominator of the pipeline we can put such info into its structures. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
| | * | drm/exynos/dsi: refactor panel detection logicAndrzej Hajda2017-08-251-101/+102
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Description of drm_helper_hpd_irq_event clearly states that drivers supporting hotplug events per connector should use different helper - drm_kms_helper_hotplug_event. To achieve it following changes have been performed: - moved down all DSI ops - they require exynos_dsi_disable function to be defined earlier, - simplified exynos_dsi_detect - there is no real detection, it just returns if panel is attached, - DSI attach/detach callbacks attaches/detaches DRM panel and sets connector status and other context fields accordingly, all this is performed under mutex, as these callbacks are asynchronous. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
| | * | drm/exynos: use helper to set possible crtcsAndrzej Hajda2017-08-258-59/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All encoders share the same code to set encoders possible_crtcs field. The patch creates helper to abstract out this code. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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