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* drm/amd/display: Remove unsupported RGB formatsLeo (Sunpeng) Li2017-09-261-5/+0
| | | | | | | | Do not broadcast (to DRM) unsupported RGB formats. Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Remove redundant member from amdgpu_plane.Andrey Grodzovsky2017-09-262-5/+5
| | | | | | | Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Universal cursor plane hook-up.Andrey Grodzovsky2017-09-261-151/+91
| | | | | | | | | | | | | Switch from legacy cursor to DRM cursor plane. Cursor is not an actual plane but more of a subplane of each pipe. Bind a DRM cursor plane instance to each CRTC. Eliminate seperate FB object allocation for cursor and clean dm_crtc_cursor_set. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Don't commit surfaces if no streamHarry Wentland2017-09-261-2/+9
| | | | | | | Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: update NV12/NV21 as the YUV formatShirish S2017-09-261-10/+12
| | | | | | | | | | | | | | | | This patch updates the YUV format supported to NV12 and NV21 and hence updates the offsets. BUG: SWDEV-119421 TEST: (On Chromium OS for Stoney Only) * Executed below tests to see YUV(underlay) & RGB planes on eDP plane_test --format XR24 --size 500x100 -p --format NV12 --size 500x500 Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Get rid of get_dm_commit_actionAndrey Grodzovsky2017-09-261-83/+44
| | | | | | | | Use drm_atomic_crtc_needs_modeset instead. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: fix NULL pointer in dm_commit_surfacesJerry Zuo2017-09-261-0/+4
| | | | | | | | Check if adding surface is failed to prevent NULL pointer deref. Signed-off-by: Jerry Zuo <Jerry.Zuo@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fix handling of scaling and underscan.Andrey Grodzovsky2017-09-261-106/+99
| | | | | | | | | | | | | | | | | | | | | | Summury of changes: 1: Both in check and commit Connector properties were handled as part of for_each(crtc) loop while they shoud have been handled in a dedicated for_each(connector) loop since they are connector properties. Moved. 2: Removed hacky plane add in amdgpu_dm_connector_atomic_set_property to force iteration on plane forconnector property. This was causing double call to commit_surface_for_stream both in crtc loop and plane loop. 3: Remove middleman DC interface and call dc_commit_surfaces_to_stream directly to increase code clarity. Remove it from atomic_commit. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: call amdgpu_dm_fini when hw_fini.Rex Zhu2017-09-261-3/+2
| | | | | | | | | | | | | | to free up drm mode_config info. fix issue: unload amdgpu, can't load amdgpu again. [drm:drm_debugfs_init [drm]] *ERROR* Cannot create /sys/kernel/debug/dri/0 [drm:drm_minor_register [drm]] *ERROR* DRM: Failed to initialize /sys/kernel/debug/dri. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Andrey Grodzovsky<andrey.grodzovsky@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: No need to assert on stream_statusHarry Wentland2017-09-261-3/+0
| | | | | | | This will be NULL on a new stream. DC handles it gracefully. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Remove redundant condition.Andrey Grodzovsky2017-09-261-7/+1
| | | | | | | | | | | You cannot have modeset and flip in the same call for same CRTC, in such case it will be set mode and set plane, not a flip. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Query for update plane type.Andrey Grodzovsky2017-09-261-1/+68
| | | | | | | | | | Use DC interface to query for plane update type so in case of FULL update you flush any outstanding commits. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add missed wait_for_prev_commits.Andrey Grodzovsky2017-09-261-0/+1
| | | | | | Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Unify loop for surface update and page flip.Andrey Grodzovsky2017-09-261-46/+42
| | | | | | | | | | | Remove extra loop we have for page flips and do flips in same loop we do for surface create/update. Add documentation for synchronization between commits on different crtcs. Rename function to have DM prefix. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Use dc_update_surfaces_for_stream for flip.Andrey Grodzovsky2017-09-262-4/+28
| | | | | | | | | | | | | | | | Today we use special interface for flip because of fear of cuncurency issues over dc->current_ctx. This should be no longer an issue when flipping on multiple CRTCs concurently since for fast update (as flip is) no new context is created and the exsisitng is not destroyed. For full updates case when removing or adding streams on once CRTC while flipping on another Adding all current active CRTC's states to the atomic commit in amdgpu_dm_atomic_check will garntee that any such full update commit will wait for completion of any outstanding flip. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fix slow FPS.Andrey Grodzovsky2017-09-261-2/+2
| | | | | | | | | Typo in expresion. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fix race.Andrey Grodzovsky2017-09-261-3/+1
| | | | | | | | | | | | | | | | | Problem : A race between two adjecent page flips makes the earlier one to release an alocated frame buffer for the subsequent one - since there are 2 frambuffer swapped back and forth between flips, the 'new' fb of the later flip is actually the 'previous' fb for the earlier flip. Fix: Don't set fb->address = 0 in cleanup hook, this is unnecessery and erases the newly cached adress that was set in prepare_fb of the second flip. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: i2c/aux Remove link index.Andrey Grodzovsky2017-09-262-26/+34
| | | | | | | | Link index is an unnecessery level of inderection when calling from kernel i2c/aux transfer into DAL. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/display: Enable DCN in DCAlex Deucher2017-09-262-2/+116
| | | | | | | Enable DCN in DC. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: fix resume hang because of DP short pulseArindam Nath2017-09-261-0/+2
| | | | | | | | | | | | | | | | | | | | | There is a hard hang observed during resume from S3 when the system receives a DP short pulse interrupt. This is because there are two code paths contending for GPIO access for AUX channel transactions. One such path is through amdgpu_dm_display_resume() function which is invoked from the regular system resume code path. The other path is through handle_hpd_rx_irq(), which is invoked in response to system receiving DP short pulse interrupt. handle_hpd_rx_irq() guards against conflicting GPIO access using hpd_lock, but the GPIO access from amdgpu_dm_display_resume() remains unguarded. This patch makes sure we use hpd_lock inside amdgpu_dm_display_resume() to avoid race conditions for GPIO access. Signed-off-by: Arindam Nath <arindam.nath@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: make dc_commit_surfaces_to_stream() re-entrantShirish S2017-09-261-27/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dc_commit_surfaces_to_stream() function currently is handle's only one plane at a time. This will not work if multiple planes have to be set to a crtc. The functionality of dc_commit_surfaces_to_stream() with this patch is slit into 1. Accumulate and initialise all the surfaces that needs to be set to a crtc. 2. Update the intialised set of surfaces to the steam in one go. Hence dc_commit_surfaces_to_stream() is renamed to init_surfaces(). Once all the planes requested by user space are initialised, dc_commit_surfaces_to_stream() shall sequentially populates *updates, *flip_addr, *plane_info and *scaling_info for all surfaces. BUG: SWDEV-119421 TEST: (On Chromium OS for Stoney Only) * Chromium UI comes up, on both eDP & DP. * 'new_surface_count' now changes as per user input for e.g for all below run tests its 2, without this patch for the below tests it used to be 1 * Executed below tests to see YUV(underlay) & RGB planes on eDP plane_test --format XR24 --size 500x100 -p --format YV12 --size 500x500 plane_test --format AR24 --size 500x50 -p --format YV12 --size 150x150 plane_test --format AR24 --size 500x50 -p --format YV12 --size 1366x768 Signed-off-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Shirish S <shirish.s@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: update the YUV plane offsetsShirish S2017-09-261-7/+7
| | | | | | | | | | | | | | | This patch updates the planes default offsets to the appropriate ones, and aligns the pitch to 64 bits. BUG=SWDEV-119421 TEST=Boots to UI on jadeite TEST= plane_test --format AR24 --size 500x50 -p --format YV12 --size 500x500 plane_test --format AR24 --size 500x50 -p --format YV12 --size 1280x720 plane_test --format AR24 --size 500x50 -p --format YV12 --size 1366x768 Signed-off-by: Shirish S <shirish.s@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: initialize YUV plane capabilitiesShirish S2017-09-261-17/+45
| | | | | | | | | | | | This patch populates the YUV surface configurations. Tests: (On Chromium OS for Stoney Only) builds without any errors. Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Return context from validate_contextHarry Wentland2017-09-261-7/+19
| | | | | | | | | This will allow us to carry it from check to commit Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: pull commit_surfaces out of atomic_commit into helper functionHarry Wentland2017-09-261-51/+62
| | | | | | | | | | This should make things simpler when we try to rework this later when we pass validate_context from atomic_check to atomic_commit. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Parse scanline registersSylvia Tsai2017-09-261-1/+14
| | | | | | | | | | They could differ between ASIC generations Signed-off-by: Sylvia Tsai <sylvia.tsai@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fix missing irq refactor causing potential i2c raceJordan Lazare2017-09-261-5/+10
| | | | | | Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fix hotspot programming during set cursor position.Zeyu Fan2017-09-261-5/+0
| | | | | | | | | | - Remove x,y hotspot from dc_cursor_attributes. Only program it through setPosition. Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Zeyu Fan <Zeyu.Fan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Prevent premature pageflip when comitting in vblank. (v3)Mario Kleiner2017-09-261-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make sure we do not program a hw pageflip inside vblank 'n' iff the atomic flip is comitted while inside the same vblank 'n'. We must defer such a flip by one refresh cycle to vblank 'n+1', unless this is a DRM_MODE_PAGE_FLIP_ASYNC async pageflip, which must always execute as soon as possible. Without this, pageflips programmed via X11 GLX_OML_sync_control extensions glXSwapBuffersMscOML(..., target_msc, ...); call and/or via DRI3/Present PresentPixmap(..., target_msc, ...); request will complete one vblank too early whenever target_msc > current_msc + 1, ie. more than 1 vblank in the future. In such a case, the call of the pageflip ioctl() would be triggered by a queued drmWaitVblank() vblank event, which itself gets dispatched inside the vblank one frame before the target_msc vblank. Testing with this patch does no longer show any problems with OML_sync_control swap scheduling or flip completion timestamps. Tested on R9 380 Tonga. v2: Add acked/r-b by Harry and Michel. v3: Feedback from Andrey: Must not wait an extra frame for DRM_MODE_PAGE_FLIP_ASYNC flips. Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Acked-by: Harry Wentland <harry.wentland@amd.com> (v1) Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Cc: Harry Wentland <Harry.Wentland@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fix race between vblank irq and pageflip irq. (v2)Mario Kleiner2017-09-261-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since DC now uses CRTC_VERTICAL_INTERRUPT0 as VBLANK irq trigger and vblank interrupts actually happen earliest at start of vblank, instead of a bit before vblank, we no longer need some of the fudging logic to deal with too early vblank irq handling (grep for lb_vblank_lead_lines). This itself fixes a pageflip scheduling bug in DC, caused by uninitialized use of lb_vblank_lead_lines, with a wrong startup value of 0. Thanks to the new vblank irq trigger this value of zero is now actually correct for DC :). A new problem is that vblank irq's race against pflip irq's, and as both can fire at first line of vblank, it is no longer guaranteed that vblank irq handling (therefore -> drm_handle_vblank() -> drm_update_vblank_count()) executes before pflip irq handling for a given vblank interval when a pageflip completes. Therefore the vblank count and timestamps emitted to user-space as part of the pageflip completion event will be often stale and cause new timestamping and swap scheduling errors in user-space. This was observed with large frequency on R9 380 Tonga Pro. Fix this by enforcing a vblank count+timestamp update right before emitting the pageflip completion event from the pflip irq handler. The logic in core drm_update_vblank_count() makes sure that no redundant or conflicting updates happen, iow. the call turns into a no-op if it wasn't needed for that vblank, burning a few microseconds of cpu time though. Successfully tested on AMD R9 380 "Tonga Pro" (VI/DCE 10) with DC enabled on the current DC staging branch. Independent measurement of pageflip completion timing with special hardware measurement equipment now confirms correct pageflip timestamps and counts in the pageflip completion events. v2: Review comments by Michel, drop outdated paragraph about problem already fixed in 2nd patch of the series. Add acked/r-b by Harry and Michel. Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Acked-by: Harry Wentland <harry.wentland@amd.com> (v1) Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Cc: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: get_atomic_property missing for drm_connector_funcsPratik Vishwakarma2017-09-262-38/+49
| | | | | | | | | | | | | | | | | DRM_IOCTL_MODE_GETCONNECTOR fails with EINVAL on enabling DRIVER_ATOMIC With this DRM_IOCTL_MODE_GETCONNECTOR returns all the connector properties. freesync_property and freesync_capable_property return 0 currently. TESTS(On Chromium OS on Stoney Only) * Builds without compilation errors. * 'atomictest' proceeds after applying patch and fails with vblank event timed out. * Chromium OS ui comes up. Signed-off-by: Pratik Vishwakarma <Pratik.Vishwakarma@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fallback on legacy properties in atomic_get_propertiesHarry Wentland2017-09-261-1/+39
| | | | | | | | We still rely on legacy properties. Fallback on legacy properties until we get to pull these into some atomic state. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Allow planes on all crtcsHarry Wentland2017-09-261-1/+1
| | | | | | | | | | 4.9 kernel will always add the assigned crtc to possible_crtcs on a plane. This is no longer the case on newer kernels. Make sure we allow any plane on any crtc. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: fix nullptr on vega initializationAlex Deucher2017-09-261-0/+1
| | | | | | | Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fix s3 hang on resume.Andrey Grodzovsky2017-09-263-7/+13
| | | | | | | | | | | | Avoid enabling CRTC_VERTICAL_INTERRUPT0 twice on resume. It's enabled once from within manage_dm_interrupts in mode set and another explicitly from amdgpu_dm_irq_resume_late. Seems it lead to CRTC hang. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Refactor edid read.Andrey Grodzovsky2017-09-264-19/+87
| | | | | | | | | | | | | | Allow Linux to use DRM provided EDID read functioality by moving DAL edid implementation to module hence removing this code from DC by this cleaning up DC code for upstream. v2: Removing ddc_service. No more need for it. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fix i2c write flag.Andrey Grodzovsky2017-09-262-2/+2
| | | | | | | | I2C_M_RD was translated to write instead of read. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Remove get_connector_for_sink.Andrey Grodzovsky2017-09-262-25/+9
| | | | | | | | | Keep 1:1 relation between MST sink and it's MST connector. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Remove get_connector_for_link.Andrey Grodzovsky2017-09-262-31/+6
| | | | | | | | | | We can keep a 1:1 relation between a link and a physical connector and hence skip the iteration. This function is used in context of only physical connetors. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: update plane functionalitiesShirish S2017-09-261-5/+49
| | | | | | | | | | | | | | | | | | | | This patch introduces amdgpu_drm_plane_state structure, which subclasses drm_plane_state and holds data suitable for configuring hardware. It switches reset(), atomic_duplicate_state() & atomic_destroy_state() functions to new internal implementation, earlier they were pointing to drm core functions. TESTS(On Chromium OS on Stoney Only) * Builds without compilation errors. * 'plane_test' passes for XR24 format based Overlay plane. * Chromium OS ui comes up. Signed-off-by: Shirish S <shirish.s@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fix cleanup in amdgpu_dm_initialize_drm_deviceHarry Wentland2017-09-261-6/+5
| | | | | Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: decouple per-crtc-plane modelAlex Deucher2017-09-263-40/+108
| | | | | | | | | | | | | | | | | | | | | | | Current design has per-crtc-plane model. As a result, for asic's that support underlay, are unable to expose it to user space for modesetting. To enable this, the drm driver intialisation now runs for number of surfaces instead of stream/crtc. This patch plumbs surface capabilities to drm framework so that it can be effectively used by user space. Tests: (On Chromium OS for Stoney Only) * 'modetest -p' now shows additional plane with YUV capabilities in case of CZ and ST. * 'plane_test' fails with below error: [drm:amdgpu_dm_connector_atomic_set_property [amdgpu]] *ERROR* Unsupported screen depth 0 as ther is no support for YUYV * Checked multimonitor display works fine Signed-off-by: Shirish S <shirish.s@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: use CRTC_VERTICAL_INTERRUPT0 as a trigger for VBLANK.Andrey Grodzovsky2017-09-261-2/+1
| | | | | | | | | Register ISR hnadler on the new interrupt. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Set cursor pitch to cursor width (in pixels).Andrey Grodzovsky2017-09-261-0/+2
| | | | | | | Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Jordan Lazare <Jordan.Lazare@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Unhardcode cursor size reported back to UMD.Andrey Grodzovsky2017-09-261-2/+2
| | | | | | | | | This will return back MAX cursor size for given ASIC. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Jordan Lazare <Jordan.Lazare@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Unhardcode acrtc->max_cursor_{height,width}Andrey Grodzovsky2017-09-261-2/+2
| | | | | | | Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Jordan Lazare <Jordan.Lazare@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fix gfx9 parameters reading for DC.Andrey Grodzovsky2017-09-261-0/+2
| | | | | | | | Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Jordan Lazare <Jordan.Lazare@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fix the NULL pointer. (v2)Andrey Grodzovsky2017-09-261-1/+3
| | | | | | | | | | | | | | | | ret value in amdgpu_dm_atomic_check was not rest to EINVAL after drm_atomic_add_affected_planes and by this making any subsequent validation failure pass when returning to atomic_check. v2: Add WARN_ON print for dc_commit_streams in amdgpu_dm_atomic_commit_tail since this should never fail. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Remove DCE12 guardsAlex Deucher2017-09-263-8/+0
| | | | | | Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Enable DCE12 supportAlex Deucher2017-09-263-5/+50
| | | | | | | This wires DCE12 support into DC and enables it. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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