summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/amdgpu
Commit message (Collapse)AuthorAgeFilesLines
...
| | * drm/amdgpu: Call doorbell index init on device initializationOak Zeng2018-11-281-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also call functioin amdgpu_device_doorbell_init after amdgpu_device_ip_early_init because the former depends on the later to set up asic-specific init_doorbell_index function Signed-off-by: Oak Zeng <ozeng@amd.com> Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> Suggested-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: Doorbell layout for vega20 and future asicOak Zeng2018-11-284-1/+105
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This introduces new doorbell layout for vega20 and future asics v2: Use enum definition instead of hardcoded value Signed-off-by: Oak Zeng <ozeng@amd.com> Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> Suggested-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: Doorbell index initialization for ASICs before vega10Oak Zeng2018-11-284-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Initialize doorbell index for asics vi and cik v2: Use enum definition instead of hardcoded number Signed-off-by: Oak Zeng <ozeng@amd.com> Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> Suggested-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: Vega10 doorbell index initializationOak Zeng2018-11-284-10/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v2: Use enum definition instead of hardcoded value v3: Remove unused enum definition Signed-off-by: Oak Zeng <ozeng@amd.com> Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> Suggested-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: Add asic func interface to init doorbell indexOak Zeng2018-11-281-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is preparation to move doorbell index initialization to amdgpu_asic_funcs Signed-off-by: Oak Zeng <ozeng@amd.com> Proposed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: Add field in amdgpu_dev to hold reserved doorbell indexOak Zeng2018-11-281-0/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a preparation work to make reserved doorbell index per device, instead of using a global macro definition. By doing this, we can easily change doorbell layout for future ASICs while not affecting ASICs in production. Signed-off-by: Oak Zeng <ozeng@amd.com> Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> Suggested-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: fix spelling mistake "Pramater" -> "Parameter"Colin Ian King2018-11-261-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | There is a spelling mistake in the module description text and a comment too, fix them. Also line break overly long comment. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amd/amdgpu: Remove duplicate headerBrajeswar Ghosh2018-11-261-1/+0
| | | | | | | | | | | | | | | | | | | | | Remove drm/drm_fb_helper.h which is included more than once Signed-off-by: Brajeswar Ghosh <brajeswar.linux@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amd: Query and use ACPI backlight capsDavid Francis2018-11-262-0/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ACPI ATIF has a function called query backlight transfer characteristics. Among the information returned by this function is the minimum and maximum input signals for the backlight Call that function on ACPI init. When DM backlight device is updated, copy over the backlight caps into DM, but only once. Use the backlight caps in the backlight-to-dc calculation Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amd: update ATIF functions in AMD ACPI headerDavid Francis2018-11-261-22/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ACPI interface in AMD was a few years out of date and contained some unused and deprecated functions Remove functions: Select Active Displays, Get Lid State, Get TV Standard, Set TV Standard, Get Panel Expansion Mode, Set Panel Expansion Mode, Get Graphics Device Types Add functions: Query Backlight Transfer Characteristics, Ready To Undock Notification Changed functions: Get System Parameters, Get System BIOS Requests All changes are right from the standard ATI ACPI Control Methods V0.44 Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amd: Add abm level drm propertyDavid Francis2018-11-262-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adaptive Backlight Management (ABM) is a feature that reduces backlight level to save power, while increasing pixel contrast and pixel luminance to maintain readability and image quality. ABM will adjust in response to the pixel luminance of the displayed content. ABM is made available as a drm property on eDP monitors called "abm level", which ranges from 0 to 4. When this property is set to 0, ABM is off. Levels 1 to 4 represent different ranges of backlight reduction. At higher levels both the backlight reduction and pixel adjustment will be greater. ABM requires DMCU firmware, which is currently available for Raven ASICs only. If the feature does not work, please ensure your firmware is up to date. v2: Fix commit message, only attach property if DMCU loaded v3: Store ABM level in crtc state to accommodate dc v4: Fix ABM saving on dpms cycle Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: Fix static checker warningRex Zhu2018-11-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c:49 amdgpu_allocate_static_csa() error: uninitialized symbol 'ptr'. the test if (!bo) doesn't work, as the bo is a pointer to a pointer. if bo create failed, the *bo will be set to NULL. so change to test *bo. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amd:Enable/Disable NBPSTATE on On/OFF of UVDGuttula, Suresh2018-11-263-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We observe black lines (underflow) on display when playing a 4K video with UVD. On Disabling Low memory P state this issue is not seen. In this patch ,disabling low memory P state only when video size >= 4k. Multiple runs of power measurement shows no impact Signed-off-by: suresh guttula <suresh.guttula@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amd/amdgpu: Remove duplicate headerBrajeswar Ghosh2018-11-211-1/+0
| | | | | | | | | | | | | | | | | | | | | Remove gca/gfx_8_0_sh_mask.h which is included more than once Signed-off-by: Brajeswar Ghosh <brajeswar.linux@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amd/amdgpu/vce_v3_0.c: Remove duplicate headerBrajeswar Ghosh2018-11-211-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | Remove gca/gfx_8_0_d.h which is included more than once Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Brajeswar Ghosh <brajeswar.linux@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: enable paging queue based on FW version (v2)Philip Yang2018-11-211-16/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based SDMA fw version to enable has_page_queue support. Have to move sdma_v4_0_init_microcode from sw_init to early_init, to load firmware and init fw_version before set_ring/buffer/vm_pte_funcs use it. v2: don't enable on vega12, 20 until confirmed Signed-off-by: Philip Yang <Philip.Yang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: enable paging queue doorbell support v4Philip Yang2018-11-202-9/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because increase SDMA_DOORBELL_RANGE to add new SDMA doorbell for paging queue will break SRIOV, instead we can reserve and map two doorbell pages for amdgpu, paging queues doorbell index use same index as SDMA gfx queues index but on second page. For Vega20, after we change doorbell layout to increase SDMA doorbell for 8 SDMA RLC queues later, we could use new doorbell index for paging queue. Signed-off-by: Philip Yang <Philip.Yang@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: fix typo in function sdma_v4_0_page_resumePhilip Yang2018-11-201-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | This looks like copy paste typo Signed-off-by: Philip Yang <Philip.Yang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: Remove dead static variableRex Zhu2018-11-201-8/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The static struct drm_driver *driver was not used because drm_pci_init was deprecated v2: Remove static pointer pdriver(Christian) Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdkfd: change system memory overcommit limitEric Huang2018-11-201-41/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is to improve system limit by: 1. replacing userptrlimit with a total memory limit that conunts TTM memory usage and userptr usage. 2. counting acc size for all BOs. Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: Fix KFD doorbell SG BO mappingFelix Kuehling2018-11-201-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change prepares for adding SG BOs that will be used for mapping doorbells into GPUVM address space. This type of BO would be mistaken for an invalid userptr BO. Improve that check to test that it's actually a userptr BO so that SG BOs that are still in the CPU domain can be validated and mapped correctly. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdkfd: Fix and simplify sync object handling for KFDFelix Kuehling2018-11-201-23/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The adev parameter in amdgpu_sync_fence and amdgpu_sync_resv is only needed for updating sync->last_vm_update. This breaks if different adevs are passed to calls for the same sync object. Always pass NULL for calls from KFD because sync objects used for KFD don't belong to any particular device, and KFD doesn't need the sync->last_vm_update fence. This fixes kernel log warnings on multi-GPU systems after recent changes in amdgpu_amdkfd_gpuvm_restore_process_bos. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: KFD Restore process: Optimize waitingHarish Kasiviswanathan2018-11-201-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of waiting for each KFD BO after validation just wait for the last BO moving fence. Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: Remove explicit wait after VM validateHarish Kasiviswanathan2018-11-201-7/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PD or PT might have to be moved during validation and this move has to be completed before updating it. If page table updates are done using SDMA then this serializing is done by SDMA command submission. And if PD/PT updates are done by CPU, then explicit waiting for PD/PT updates are done in amdgpu VM amdgpu_vm_wait_pd function. Sync to PD BO moving fence to handle corner case where none of the PTs are updated but PD is evicted. Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c: Remove duplicate headerBrajeswar Ghosh2018-11-191-1/+0
| | | | | | | | | | | | | | | | | | | | | Remove gca/gfx_8_0_enum.h which is included more than once Signed-off-by: Brajeswar Ghosh <brajeswar.linux@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu/psp: use define rather than magic number for mode1 resetAlex Deucher2018-11-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Use the define rather than hardcoded value. Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu/gfx: use proper offset define for MEC doorbellsAlex Deucher2018-11-191-1/+1
| | | | | | | | | | | | | | | | | | | | | Looks like a copy paste typo. Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdkfd: Added Vega12 and Polaris12 for KFD.Gang Ba2018-11-192-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Vega12 and Polaris12 device info and device IDs to KFD. Signed-off-by: Gang Ba <gaba@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * Revert "drm/amdgpu: use GMC v9 KIQ workaround only for the GFXHUB" (v2)Chengming Gui2018-11-191-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With GFXOFF enabled, this patch will cause PCO amdgpu_test failed, but GFXOFF is necessary for PCO, so revert the patch. This reverts commit b83761bb0b09ec11c924afe9d88e458cb16a0372. v2: add a comment for future reference (Alex) Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Jack Gui <Jack.Gui@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: Add amdgpu "max bpc" connector property (v2)Nicholas Kazlauskas2018-11-192-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] Many panels support more than 8bpc but some modes are unavailable while running at greater than 8bpc due to DP/HDMI bandwidth constraints. Support for more than 8bpc was added recently in the driver but it defaults to the maximum supported bpc - locking out these modes. This should be a user configurable option such that the user can select what bpc configuration they would like. [How] This patch introduces the "max bpc" amdgpu driver specific connector property so the user can limit the maximum bpc. It ranges from 8 to 16. This doesn't directly set the preferred bpc for the panel since it follows Intel's existing driver conventions. This proprety should be removed once common drm support for max bpc lands. v2: rebase on upstream (Alex) Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: remove set but not used variable 'ring'YueHaibing2018-11-192-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/amd/amdgpu/psp_v10_0.c: In function 'psp_v10_0_ring_stop': drivers/gpu/drm/amd/amdgpu/psp_v10_0.c:230:19: warning: variable 'ring' set but not used [-Wunused-but-set-variable] drivers/gpu/drm/amd/amdgpu/psp_v3_1.c: In function 'psp_v3_1_ring_stop': drivers/gpu/drm/amd/amdgpu/psp_v3_1.c:359:19: warning: variable ‘ring’ set but not used [-Wunused-but-set-variable] It not used since commit 4ef72453311a ("drm/amdgpu: added api for stopping psp ring (v2)") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amd/amdgpu/sriov: Aligned the definition with libgvEmily Deng2018-11-192-11/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | Aligned the amd_sriov_msg_pf2vf_info_header and amd_sriov_msg_pf2vf_info_header's definition with libgv. Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-by: Frank.Min <Frank.Min@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | Merge v4.20-rc4 into drm-nextDave Airlie2018-11-295-9/+47
| |\ \ | | |/ | |/| | | | | | | | | | Requested by Boris Brezillon for some vc4 fixes that are needed for future vc4 work. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | Merge branch 'drm-next-4.21' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2018-11-1974-2137/+2575
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next New features for 4.21: amdgpu: - Support for SDMA paging queue on vega - Put compute EOP buffers into vram for better performance - Share more code with amdkfd - Support for scanout with DCC on gfx9 - Initial kerneldoc for DC - Updated SMU firmware support for gfx8 chips - Rework CSA handling for eventual support for preemption - XGMI PSP support - Clean up RLC handling - Enable GPU reset by default on VI, SOC15 dGPUs - Ring and IB test cleanups amdkfd: - Share more code with amdgpu ttm: - Move global init out of the drivers scheduler: - Track if schedulers are ready for work - Timeout/fault handling changes to facilitate GPU recovery Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181114165113.3751-1-alexander.deucher@amd.com
| | * | drm/amdgpu/gfx9: rework lbpw enable codeAlex Deucher2018-11-091-17/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | To avoid changing the global lbpw module parameter directly. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: abstract the function of enter/exit safe mode for RLCLikun Gao2018-11-098-446/+384
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Abstract the function of amdgpu_gfx_rlc_enter/exit_safe_mode and some part of rlc_init to improve the reusability of RLC. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: separate amdgpu_rlc into a single fileLikun Gao2018-11-099-107/+160
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Separate the function and struct of RLC from the file of GFX. Abstract the function of amdgpu_gfx_rlc_fini. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: unify rlc function into structureLikun Gao2018-11-095-44/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Put function rlc_init,rlc_fini,rlc_resume,rlc_stop,rlc_start into structure amdgpu_rlc_funcs and change the method to call rlc function for each verssion of GFX. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: Each PSP need to get latest topology info on XGMI configurationshaoyunl2018-11-091-7/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Driver need to call each psp instance to get topology info before set topology Signed-off-by: shaoyunl <Shaoyun.Liu@amd.com> reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu/sdma4: use paging queue for buffer funcsAlex Deucher2018-11-081-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the paging queue for buffer functions to avoid contention with the other queues. Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Tested-by: Chen Gong <Curry.Gong@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: add DC feature mask module parameterAlex Deucher2018-11-072-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Similar to ppfeaturemask. Allows you to selectively enable/disable DC features. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: disable page queue on Vega10 SR-IOV VFTrigger Huang2018-11-071-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, SDMA page queue is not used under SR-IOV VF, and this queue will cause ring test failure in amdgpu module reload case. So just disable it. Signed-off-by: Trigger Huang <Trigger.Huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: set Vega20 LBPW as disabled at defaultEvan Quan2018-11-071-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For Vega20, LBPW feature is disabled at default. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: fix frame size of amdgpu_xgmi_add_devices excceed 1024 bytesHawking Zhang2018-11-071-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of stack-allocated psp_xgmi_topology_info in function amdgpu_xgmi_add_device, dynamically allocated this structure to avoid the frame size of this function excceed 1024 bytes Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu/psp: add set_topology_info functionHawking Zhang2018-11-061-1/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | set_topology_info is used for driver to set current topology info to xgmi ta Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu/psp: add get_topology_info functionHawking Zhang2018-11-061-0/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | get_topology_info function is used for driver to query topology_info for current device from xgmi ta Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu/psp: update topology info structuresHawking Zhang2018-11-062-23/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | topology info structure needs to match with the one defined in xgmi ta Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu/psp: add get_hive_id functionHawking Zhang2018-11-061-5/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | get_hive_id is used for driver to query hive_id for current device from xgmi ta Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu/psp: add get_node_id functionHawking Zhang2018-11-064-9/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | get_node_id function is used for driver to get node_id for current device from xgmi ta Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu/psp: initialize xgmi session (v2)Hawking Zhang2018-11-062-1/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Setup and tear down xgmi as part of psp. v2: - make psp_xgmi_terminate static - squash in: drm/amdgpu: only issue xgmi cmd when it is enabled drm/amdgpu/psp: terminate xgmi ta in suspend and hw_fini phase Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
OpenPOWER on IntegriCloud