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path: root/drivers/gpio/gpio-merrifield.c
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* gpio: merrifield: Implement gpio_get_direction callbackAndy Shevchenko2016-12-071-0/+9
| | | | | | | Implement gpio_get_direction() callback for Intel Merrifield GPIO. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: merrifield: Add support for hardware debouncerAndy Shevchenko2016-12-071-0/+22
| | | | | | | | | | | By default all pins are configured to use a glitch filter. Writing 1 to the certain bit of the specific register might be useful in case someone needs to bypass the glitch filter completely for a given GPIO pin. This patch adds support for that in the Intel Merrifield GPIO driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: merrifield: set default handler to be handle_bad_irq()Andy Shevchenko2016-10-241-1/+1
| | | | | | | | We switch the default handler to be handle_bad_irq() instead of handle_simple_irq() (which was not correct anyway). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: merrifield: Protect irq_ack() and gpio_set() by lockAndy Shevchenko2016-07-221-0/+11
| | | | | | | | | | There is a potential race when two threads do the writes to the same register in parallel. Prevent out of order in such case by protecting I/O access by spin lock. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: merrifield: Introduce GPIO driver to support MerrifieldAndy Shevchenko2016-07-221-0/+433
Intel Merrifield platform has a special GPIO controller to drive pads when they are muxed in corresponding mode. Intel Merrifield GPIO IP is slightly different here and there in comparison to the older Intel MID platforms. These differences include in particular the shaked register offsets, specific support of level triggered interrupts and wake capable sources, as well as a pinctrl which is a separate IP. Instead of uglifying existing driver I decide to provide a new one slightly based on gpio-intel-mid.c. So, anyone can easily compare what changes are happened to be here. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Brian J Wood <brian.j.wood@intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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