summaryrefslogtreecommitdiffstats
path: root/drivers/clk/spear
Commit message (Expand)AuthorAgeFilesLines
* clk: spear: fix ADC clock definition on SPEAr600Thomas Petazzoni2017-04-191-1/+1
* clk: spear: Remove CLK_IS_ROOTStephen Boyd2016-03-024-32/+19
* Merge tag 'clk-for-linus-4.3' of git://git.kernel.org/pub/scm/linux/kernel/gi...Linus Torvalds2015-08-314-4/+1
|\
| * clk: spear: Convert to clk_hw based provider APIsStephen Boyd2015-08-241-1/+1
| * clk: spear: Remove clk.h includeStephen Boyd2015-07-203-3/+0
* | Update Viresh Kumar's email addressViresh Kumar2015-07-1710-10/+10
|/
* Merge branch 'clk-fixes' into clk-nextMike Turquette2014-07-131-5/+11
|\
| * clk: spear3xx: Set proper clock parent of uart1/2Thomas Gleixner2014-07-131-4/+10
| * clk: spear3xx: Use proper control register offsetThomas Gleixner2014-07-131-1/+1
* | ARM: SPEAr13xx: Fix pcie clock namePratyush Anand2014-07-112-4/+4
|/
* clk: SPEAr: Staticize clk_frac_opsSachin Kamat2013-12-191-1/+1
* clk: add CLK_SET_RATE_NO_REPARENT flagJames Hogan2013-08-194-167/+201
* clk: spear: fix build error for spear3xxArnd Bergmann2013-06-111-1/+1
* Merge tag 'multiplatform-for-linus' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds2013-05-024-106/+112
|\
| * ARM: spear: make clock driver independent of headersArnd Bergmann2013-03-124-106/+112
* | clk:SPEAr1340: Correct parent clock configurationVipul Kumar Samar2013-03-211-9/+9
|/
* Merge tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2012-12-141-0/+1
|\
| * ARM: SPEAr1310: Move 1310 specific misc register into machine specific filesVipul Kumar Samar2012-11-261-0/+1
* | CLK: SPEAr: Remove unused dummy apb_pclkVipul Kumar Samar2012-11-214-12/+0
* | CLK: SPEAr: Correct index scanning done for clock synthsDeepak Sikri2012-11-211-0/+3
* | CLK: SPEAr: Update clock rate tableDeepak Sikri2012-11-214-21/+89
* | CLK: SPEAr: Add missing clocksVipul Kumar Samar2012-11-213-0/+16
* | CLK: SPEAr: Set CLK_SET_RATE_PARENT for few clocksVipul Kumar Samar2012-11-215-114/+133
* | CLK: SPEAr13xx: fix parent names of multiple clocksShiraz Hashim2012-11-212-4/+4
* | CLK: SPEAr13xx: Fix mux clock namesShiraz Hashim2012-11-212-12/+12
* | CLK: SPEAr: Fix dev_id & con_id for multiple clocksRajeev Kumar2012-11-214-41/+49
* | clk: spear: Add stub functions for spear3[0|1|2]0_clk_init()Axel Lin2012-11-151-0/+6
* | clk: SPEAr: Vco-pll: Fix compilation warningViresh Kumar2012-10-291-1/+1
|/
* Clk: SPEAr1340: Update sys clock parent arrayVipul Kumar Samar2012-07-181-2/+2
* clk: SPEAr1340: Fix clk enable register for uart1 and i2c1.Vipul Kumar Samar2012-07-181-2/+2
* Clk:spear6xx:Fix: Rename clk ids within predefined limitVipul Kumar Samar2012-07-181-62/+60
* Clk:spear3xx:Fix: Rename clk ids within predefined limitVipul Kumar Samar2012-07-181-94/+86
* clk:spear1310:Fix: Rename clk ids within predefined limitVipul Kumar Samar2012-07-181-157/+155
* clk:spear1340:Fix: Rename clk ids within predefined limitVipul Kumar Samar2012-07-181-138/+135
* clk: SPEAr600: Fix ethernet clock name for DT based probingStefan Roese2012-06-251-1/+1
* Viresh has movedViresh Kumar2012-06-2010-10/+10
* SPEAr13xx: Add common clock framework supportViresh Kumar2012-05-143-0/+2072
* SPEAr: Switch to common clock frameworkViresh Kumar2012-05-123-0/+957
* SPEAr: clk: Add General Purpose Timer Synthesizer clockViresh Kumar2012-05-123-1/+172
* SPEAr: clk: Add Fractional Synthesizer clockViresh Kumar2012-05-123-1/+182
* SPEAr: clk: Add Auxiliary Synthesizer clockViresh Kumar2012-05-123-1/+242
* SPEAr: clk: Add VCO-PLL Synthesizer clockViresh Kumar2012-05-124-0/+462
OpenPOWER on IntegriCloud