summaryrefslogtreecommitdiffstats
path: root/drivers/clk/bcm
Commit message (Expand)AuthorAgeFilesLines
* Merge branch 'clk-iproc' into clk-nextStephen Boyd2015-10-217-157/+637
|\
| * clk: ns2: add clock support for Broadcom Northstar 2 SoCJon Mason2015-10-212-0/+289
| * clk: iproc: Separate status and control variablesJon Mason2015-10-212-40/+62
| * clk: iproc: Split off dig_filterJon Mason2015-10-214-17/+38
| * clk: iproc: Add PLL base write functionJon Mason2015-10-211-47/+33
| * clk: nsp: add clock support for Broadcom Northstar Plus SoCJon Mason2015-10-212-0/+137
| * clk: iproc: Add PWRCTRL supportJon Mason2015-10-212-17/+44
| * clk: cygnus: Convert all macros to all capsJon Mason2015-10-211-73/+73
| * ARM: cygnus: fix link failures when CONFIG_COMMON_CLK_IPROC is disabledArnd Bergmann2015-10-211-3/+1
* | clk: iproc: Fix PLL output frequency calculationSimran Rai2015-10-211-8/+5
* | clk: Allow drivers to build if COMPILE_TEST is enabledJavier Martinez Canillas2015-10-161-2/+2
* | clk: bcm2835: Add support for programming the audio domain clocksEric Anholt2015-10-121-1/+1521
* | clk: bcm2835: Move under bcm/ with other Broadcom SoC clk drivers.Eric Anholt2015-10-012-0/+56
|/
* clk: bcm: Convert to clk_hw based provider APIsStephen Boyd2015-08-241-10/+10
* Merge branch 'cleanup-clk-h-includes' into clk-nextStephen Boyd2015-07-281-0/+1
|\
| * clk: bcm: Include clk.hStephen Boyd2015-07-201-0/+1
* | Merge branch 'clk-determine-rate-struct' into clk-nextStephen Boyd2015-07-281-13/+21
|\ \
| * | clk: change clk_ops' ->determine_rate() prototypeBoris Brezillon2015-07-271-13/+21
| |/
* | clk: iproc: fix bit manipulation arithmeticRay Jui2015-07-021-2/+3
* | clk: iproc: fix memory leak from clock nameRay Jui2015-07-022-12/+2
|/
* clk: cygnus: add clock support for Broadcom CygnusRay Jui2015-06-182-0/+266
* clk: iproc: add initial common clock supportRay Jui2015-06-186-0/+1462
* clk: bcm/kona: Remove ccu_listStephen Boyd2015-05-142-6/+0
* clk: bcm/kona: Silence sparse warningsStephen Boyd2015-05-141-1/+1
* clk: bcm/kona: use DIV_ROUND_CLOSEST_ULL()Javi Merino2015-04-172-22/+7
* clk: Add rate constraints to clocksTomeu Vizoso2015-02-021-0/+2
* clk: Change clk_ops->determine_rate to return a clk_hw as the best parentTomeu Vizoso2014-12-031-2/+2
* clk: bcm/kona: implement determine_rate()Alex Elder2014-05-271-1/+53
* clk: bcm21664: use common clock frameworkAlex Elder2014-04-303-1/+292
* clk: bcm281xx: move compatible string definitionsAlex Elder2014-04-301-12/+0
* clk: bcm281xx: add clock hysteresis supportAlex Elder2014-04-303-0/+82
* clk: bcm281xx: add clock policy supportAlex Elder2014-04-303-0/+318
* clk: bcm281xx: define CCU clock data staticallyAlex Elder2014-04-303-143/+133
* clk: bcm281xx: initialize CCU structures staticallyAlex Elder2014-04-304-119/+97
* clk: bcm281xx: change some symbol namesAlex Elder2014-04-301-11/+16
* clk: bcm281xx: use init_data.name for clock nameAlex Elder2014-04-303-12/+14
* clk: bcm281xx: warn if ccu_wait_bit() failsAlex Elder2014-04-301-0/+3
* clk: bcm281xx: don't use unnamed structs or unionsAlex Elder2014-04-303-61/+64
* clk: bcm281xx: don't disable unused peripheral clocksAlex Elder2014-02-241-1/+1
* clk: bcm281xx: add initial clock framework supportAlex Elder2014-02-246-0/+2640
OpenPOWER on IntegriCloud