| Commit message (Collapse) | Author | Age | Files | Lines |
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* usb-next: (132 commits)
USB: uas: Use GFP_NOIO instead of GFP_KERNEL in I/O submission path
USB: uas: Ensure we only bind to a UAS interface
USB: uas: Rename sense pipe and sense urb to status pipe and status urb
USB: uas: Use kzalloc instead of kmalloc
USB: uas: Fix up the Sense IU
usb: musb: core: kill unneeded #include's
DA8xx: assign name to MUSB IRQ resource
usb: gadget: g_ncm added
usb: gadget: f_ncm.c added
usb: gadget: u_ether: prepare for NCM
usb: pch_udc: Fix setup transfers with data out
usb: pch_udc: Fix compile error, warnings and checkpatch warnings
usb: add ab8500 usb transceiver driver
USB: gadget: Implement runtime PM for MSM bus glue driver
USB: gadget: Implement runtime PM for ci13xxx gadget
USB: gadget: Add USB controller driver for MSM SoC
USB: gadget: Introduce ci13xxx_udc_driver struct
USB: gadget: Initialize ci13xxx gadget device's coherent DMA mask
USB: gadget: Fix "scheduling while atomic" bugs in ci13xxx_udc
USB: gadget: Separate out PCI bus code from ci13xxx_udc
...
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Commit fcf173e4511193b1efeccb0f22a8c641b464353b (usb: musb: add names for IRQs
in structure resource) forgot to assign name to the DA8xx MUSB IRQ resource.
Because of that MUSB driver fails to load on DA8xx machines.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
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Enabling the musb OTG mode for SDP and PANDA boards.
Signed-off-by: Hema HK <hemahk@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
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Registering the twl6030-usb transceiver device as a child to twl6030 core.
Removed the NOP transceiver init call from board file.
Populated twl4030_usb_data platform data structure with the function
pointers for OMAP4430 internal PHY operation to be used by twl630-usb driver.
Signed-off-by: Hema HK <hemahk@ti.com>
Cc: Samuel Ortiz <sameo@linux.intel.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
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Selecting the twl6030-usb for OMAP4430SDP and OMAP4PANDA boards and
adding OMAP4 internal phy code for compilation
Signed-off-by: Hema HK <hemahk@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
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Adding the twl6030-usb transceiver support for OMAP4 musb driver.
OMAP4 supports 2 types of transceiver interface.
1. UTMI: The PHY is embedded within OMAP4. The transceiver functionality
is split between the twl6030 PMIC chip and OMAP4430. The VBUS, ID pin
sensing and OTG SRP generation part is integrated in TWL6030 and UTMI PHY
functionality is embedded within the OMAP4430.
There is no direct interactions between the MUSB controller and TWL6030
chip to communicate the session-valid, session-end and ID-GND events.
It has to be done through a software by setting/resetting bits in
one of the control module register of OMAP4430 which in turn toggles
the appropriate signals to MUSB controller.
The internal transceiver has functional clocks and
powerdown bits to powerdown the PHY for power saving.
Since there is no option available for having 2 transceiver drivers
for one USB controller, internal PHY specific APIs are passed through
plaform_data function pointers to use in the twl6030-usb transceiver
driver.
2. ULPI interface is provided for off-chip transceivers.
Signed-off-by: Hema HK <hemahk@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Felipe Balbi <balbi@ti.com>
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commit 4814ced5116e3b73dc4f63eec84999739fc8ed11 (OMAP:
control: move plat-omap/control.h to mach-omap2/control.h)
moved <plat/control.h> to another location, preventing
drivers from accessing it, so we need to pass function
pointers from arch code to be able to talk to internal
PHY on AM35x.
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
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Let musb work on 4430sdp as well. We can now
test any problems with multi-omap builds.
Signed-off-by: Felipe Balbi <balbi@ti.com>
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musb core doesn't need to know about platform
specific details. So start moving clock
handling to platform glue layer and make
musb core agnostic about that.
Signed-off-by: Felipe Balbi <balbi@ti.com>
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Just adding its own platform_driver, not really
using it yet.
Later patches will come to split power management
code from musb_core and move it completely to HW
glue layer.
Signed-off-by: Felipe Balbi <balbi@ti.com>
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Just adding its own platform_driver, not really
using it yet.
When all HW glue layers are converted, more patches
will come to split power management code from musb_core
and move it completely to HW glue layer.
Signed-off-by: Felipe Balbi <balbi@ti.com>
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Just adding its own platform_driver, not really
using it yet.
When all HW glue layers are converted, more patches
will come to split power management code from musb_core
and move it completely to HW glue layer.
Signed-off-by: Felipe Balbi <balbi@ti.com>
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Just adding its own platform_driver, not really
using it yet.
When all HW glue layers are converted, more patches
will come to split power management code from musb_core
and move it completely to HW glue layer.
Signed-off-by: Felipe Balbi <balbi@ti.com>
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Just adding its own platform_driver, not really
using it yet.
When all HW glue layers are converted, more patches
will come to split power management code from musb_core
and move it completely to HW glue layer.
Signed-off-by: Felipe Balbi <balbi@ti.com>
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Just adding its own platform_driver, not really
using it yet.
When all HW glue layers are converted, more patches
will come to split power management code from musb_core
and move it completely to HW glue layer.
Signed-off-by: Felipe Balbi <balbi@ti.com>
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change all ocurrences of musb_hdrc to musb-hdrc.
We will call glue layer drivers musb-<glue layer>,
so in order to keep things somewhat standard, let's
change the underscore into a dash.
Signed-off-by: Felipe Balbi <balbi@ti.com>
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This will make things simpler when choosing which
glue layer to compile. It avoids a lot of magic
around the "default" Kconfig option and lets the
user choose what exactly s/he wants to compile.
Signed-off-by: Felipe Balbi <balbi@ti.com>
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initialize the musb port on pandaboard.
Signed-off-by: Ming Lei <tom.leiming@gmail.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
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master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6 into work
* 'sh/ehci' of master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6:
sh: Convert to USB_ARCH_HAS_OHCI/EHCI selects.
usb: ehci-sh: Add missing ehci helpers.
usb: ehci-sh: Fix up fault in shutdown path.
sh: Add EHCI support for SH7786.
usb: ehci-hcd: Add support for SuperH EHCI.
usb: ohci-sh: Set IRQ as shared.
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This switches over to selects for the subtypes to enable OHCI/EHCI
support explicitly rather than littering the usb Kconfig with subtype
dependencies.
Suggested-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This adds in the platform device for SH7786 USB EHCI.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Soon resource data will get automatically
populated from a set of autogenerated data
from TI's hardware database for the OMAP
platform.
Such database, might not have resources at
the expected order by the current drivers.
While we could hack in some exceptions to
that tool to generate resources in a specific
order, it seems less fragile to use the
resource name instead. That way, no matter
what order the resources are generated, the
driver still work.
Modified the OMAP, Blackfin and Davinci
architecture files to add the name of the IRQs
in the resource structures and musb driver to
use the platform_get_irq_byname() api to get
the device and dma irq numbers instead of using
the index.
Cc: Tony Lindgren <tony@atomide.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Hema HK <hemahk@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
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The OMAP4 SDP has an SMSC3320 PHY hooked up to EHCI on Port1.
The PHY power is controlled by GPIO 157.
Turn on the PHY power, and register the controller at init.
Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com>
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
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The OMAP4 has an on-chip EHCI controller. Select USB_ARCH_HAS_EHCI
to allow the EHCI driver to be built on OMAP4.
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
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- Add platform init code for EHCI on OMAP4
- Add pad configuration for PHY and TLL modes
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
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Add base addresses for USBHOST, USBTLL, EHCI and OHCI to
the header file.
This will disappear when the drivers are converted to use
the hwmod database, however this patch is needed until then.
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
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The EHCI controller in OMAP4 supports a new interface mode - HSIC.
Add this to the list of modes supported on OMAP3.
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
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Add clkdev aliases for the USBHOST and USBTLL clocks on OMAP3 and
OMAP4, so that the driver can refer to the clocks using a common alias.
This will disappear when the driver is converted to use the hwmod
database, but until then this patch is needed.
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Acked-by: Tony Lindgren <tony@atomide.com>
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Add missing header file:
arch/x86/crypto/ghash-clmulni-intel_glue.c:256: error: implicit declaration of function 'IS_ERR'
arch/x86/crypto/ghash-clmulni-intel_glue.c:257: error: implicit declaration of function 'PTR_ERR'
Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* 'sh-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6:
sh: wire up accept4 syscall (non-multiplexed path)
sh: Enable deprecated IRQ chip APIs for MFD and GPIOLIB drivers.
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Signed-off-by: Carmelo Amoroso <carmelo.amoroso@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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There are still quite a number of MFD and GPIO expander drivers that are
using the old irq_chip APIs that haven't had a chance to update during
the .37 cycle, resulting in allyes/modconfig errors on some
configurations.
Mark Brown has done most of the legwork to get these fixed up in .38,
so this should just be a .37 stop-gap that we can drop at the end of the
.38 merge window.
Reported-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
* 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6:
OMAP2: PRCM: fix some SHIFT macros that were actually bitmasks
OMAP2+: PM/serial: fix console semaphore acquire during suspend
OMAP1: SRAM: fix size for OMAP1611 SoCs
arm: omap2: io: fix clk_get() error check
arm: plat-omap: counter_32k: use IS_ERR() instead of NULL check
omap: nand: remove hardware ECC as default
omap: zoom: wl1271 slot is MMC_CAP_POWER_OFF_CARD
omap: PM debug: fix wake-on-timer debugfs dependency
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After Charu's GPIO hwmod patches, GPIO initialization on N800 emits
the following messages for all GPIO banks:
omap_hwmod: gpio1: cannot be enabled (3)
This is due to OMAP24XX_ST_GPIOS_SHIFT being defined as a bitmask.
Fix this and also fix two other macros that had the same problem.
Thanks to Tony Lindgren <tony@atomide.com> for originally reporting
this bug.
Signed-off-by: Paul Walmsley <paul@pwsan.com
Cc: Charulatha Varadarajan <charu@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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commit 0d8e2d0dad98a693bad88aea6876ac8b94ad95c6 (OMAP2+: PM/serial:
hold console semaphore while OMAP UARTs are disabled) added use of the
console semaphore to protect UARTs from being accessed after disabled
during idle, but this causes problems in suspend.
During suspend, the console semaphore is acquired by the console
suspend method (console_suspend()) so the try_acquire_console_sem()
will always fail and suspend will be aborted.
To fix, introduce a check so the console semaphore is only attempted
during idle, and not during suspend. Also use the same check so that
the console semaphore is not prematurely released during resume.
Thanks to Paul Walmsley for suggesting adding the same check during
resume.
Cc: Paul Walmsley <paul@pwsan.com>
Tested-by: Jean Pihet <j-pihet@ti.com>
Tested-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Kernel was failing to boot on omap1611 based OSK boards due to
mis-configured SRAM size. Existing code was using a hard-coded value
for 250k, which was then rounded down by PAGE_SIZE. Increasing this to
256k allows kernel to boot on omap1611 SoCs.
Problem reported by and initial fix suggested by Tim Bird.
Thanks to Tony Lindgren for helping diagnose the problem to being
specific to OMAP1611 and not affecting OMAP1610/OMAP1623.
Reported-by: Tim Bird <tim.bird@am.sony.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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clk_get() return value should be checked with IS_ERR().
Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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clk_get() returns ERR_PTR() on error, not NULL.
Signed-off-by: Vasiliy Kulikov <segoon@openwall.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
[tony@atomide.com: updated to include err.h to compile on omap1]
Signed-off-by: Tony Lindgren <tony@atomide.com>
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This patch complements ed919b0 "mmc: sdio: fix runtime PM anomalies by
introducing MMC_CAP_POWER_OFF_CARD" by declaring MMC_CAP_POWER_OFF_CARD
on the ZOOM's wl1271 mmc slot.
This is required in order not to break runtime PM support for the wl1271
sdio driver.
Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Wakeup-on-timer code does not have/need debugfs dependency. Move
the function out of debugfs ifdef.
Fixes compile error when CONFIG_DEBUG_FS is disabled but PM debug is
enabled.
Reported-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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* master.kernel.org:/home/rmk/linux-2.6-arm:
ARM: 6535/1: V6 MPCore v6_dma_inv_range and v6_dma_flush_range RWFO fix
ARM: 6534/1: Make CONFIG_FPE_NWFPE depend on !CONFIG_THUMB2_KERNEL
ARM: 6533/1: Thumb-2: Make CONFIG_THUMB2_KERNEL depend on !CPU_V6
Change bcmring Maintainer list.
ARM: Update mach-types
ARM: 6528/1: Use CTR for the I-cache line size on ARMv7
ARM: 6527/1: Use CTR instead of CCSIDR for the D-cache line size on ARMv7
ARM: pxa/palm: fix ifdef around gen_nand driver registration
ARM: pxa: fix pxa2xx-flash section mismatch
ARM: mmp2: remove not used clk_rtc
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Cache ownership must be acquired by reading/writing data from the
cache line to make cache operation have the desired effect on the
SMP MPCore CPU. However, the ownership is never acquired in the
v6_dma_inv_range function when cleaning the first line and
flushing the last one, in case the address is not aligned
to D_CACHE_LINE_SIZE boundary.
Fix this by reading/writing data if needed, before performing
cache operations.
While at it, fix v6_dma_flush_range to prevent RWFO outside
the buffer.
Cc: stable@kernel.org
Signed-off-by: Valentine Barshak <vbarshak@mvista.com>
Signed-off-by: George G. Davis <gdavis@mvista.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Because the nwfpe support is unlikely to be used on new platforms
and requires CONFIG_OABI_COMPAT, which is not generally used with
ARMv7+, we shouldn't expect to build nwfpe support into a Thumb-2
kernel.
At present, nwfpe contains assembly code which isn't Thumb-2
compatible, and for now it doesn't appear useful to port this
code.
All ARMv7-A/R platforms necessarily have VFPv3 hardware floating-
point natively, making emulation unnecessary.
Signed-off-by: Dave Martin <dave.martin@linaro.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This makes sense, because Thumb-2 code can't execute on plain
ARMv6 processors.
This will avoid accidentally configuring a broken kernel where the
config otherwise would allow multiple architecture versions to
coexist in the same kernel.
Not adding !CPU_V5 etc., because the chance of anyone trying to
put v5 and v7 in the same kernel is low, and I'm not aware of
any mach which can do this. These could be added later if it
matters.
Note that the rules may need to be refined if support for the
ARM1156J(F)-S processor is later added to the kernel, since this
processor supports the rare ARMv6T2 extensions, which add support
for Thumb-2 and a few other ARMv7 features.
Signed-off-by: Dave Martin <dave.martin@linaro.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6
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Reported-by: Rafael Gandolfi <kaillasse91@hotmail.fr>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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RTC clock will remain at 32KHz and powered on, there is no need for it
at this moment.
Signed-off-by: Jason Chagas <jason.chagas@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The current implementation of the v7_coherent_*_range function assumes
that the D and I cache lines have the same size, which is incorrect
architecturally. This patch adds the icache_line_size macro which reads
the CTR register. The main loop in v7_coherent_*_range is split in two
independent loops or the D and I caches. This also has the performance
advantage that the DSB is moved outside the main loop.
Reported-by: Kevin Sapp <ksapp@quicinc.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The current implementation of the dcache_line_size macro reads the L1
cache size from the CCSIDR register. This, however, is not guaranteed to
be the smallest cache line in the cache hierarchy. The patch changes to
the macro to use the more architecturally correct CTR register.
Reported-by: Kevin Sapp <ksapp@quicinc.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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