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* Revert "Move Talos II power LED to software generated PWM"dev-4.10Raptor Engineering Development Team2018-05-151-16/+4
| | | | | | | This reverts commit 0387c354d342b76ad2fac1d240a4ea2a60863cb3. The software-based PWM driver introduced other issues. Revert pending investigation / fix.
* Move Talos II power LED to software generated PWMRaptor Engineering Development Team2018-05-141-4/+16
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* Lower clock frequency of FPGA I2C bus to mitigate read / write errorsRaptor Engineering Development Team2018-03-071-0/+1
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* Update MAX31785 setings on Talos systemsRaptor Engineering Development Team2018-01-251-6/+12
| | | | | Enable faster fan ramp up/down to avoid overshoot / fan speed oscillations Disable unnecessary temperature sensor watchdog
* Remove explicit chassis reset binding on Talos systemsRaptor Engineering Development Team2018-01-221-6/+0
| | | | This allows the reset button service to bind to the GPIO
* Remove DD1 VCS workaround GPIO hogRaptor Engineering Development Team2018-01-221-6/+0
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* Move the system speaker from PWM7 to GPION7 for software-mode beep developmentRaptor Engineering Development Team2018-01-201-7/+5
| | | | The ASpeed device doesn't really support variable PWM frequencies, at least not enough for proper beep support
* Port commit e3fac12aa8172222281420bf2eb1b25b756e82c8 to TalosRaptor Engineering Development Team2018-01-201-1/+4
| | | | ARM: dts: aspeed: talos: Add w83773g temp sensor
* Port commit 052add4e0fd8d827b85382f584e53582ce621951 to TalosRaptor Engineering Development Team2018-01-201-0/+6
| | | | ARM: dts: aspeed: talos: hog GPIOS7
* Add chassis reset request input to BMC DTS for TalosRaptor Engineering Development Team2018-01-201-0/+6
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* Add BMC ready LED output to Talos BMC device treeRaptor Engineering Development Team2018-01-201-0/+4
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* Put Talos system fans into PWM mode by defaultRaptor Engineering Development Team2018-01-201-6/+6
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* Update Talos device tree to match production hardwareRaptor Engineering Development Team2018-01-201-28/+5
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* Put fans in RPM mode at startup on Talos systemsRaptor Engineering Development Team2018-01-201-0/+6
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* Enable PWM7 for use with on-board piezo speakerRaptor Engineering Development Team2018-01-201-1/+1
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* Enable MAX31785 fan controllerRaptor Engineering Development Team2018-01-201-2/+87
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* Add Raptor Computing Systems Talos BMC setup and device tree filesRaptor Engineering Development Team2018-01-203-0/+313
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* ARM: configs: aspeed: Add W83773G driverJoel Stanley2018-01-172-0/+2
| | | | | OpenBMC-Staging-Count: 1 Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: romulus: Add w83773g temp sensorLei YU2018-01-171-1/+4
| | | | | | | OpenBMC-Staging-Count: 1 Signed-off-by: Lei YU <mine260309@gmail.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: zaius: Add pcie-e2b-present gpio keyLei YU2018-01-161-0/+6
| | | | | | | | | Add GPIO key to check presence of PCIE E2B OpenBMC-Staging-Count: 1 Signed-off-by: Lei YU <mine260309@gmail.com> Acked-by: Xo Wang <xow@google.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: romulus: hog GPIOS7Lei YU2018-01-161-0/+6
| | | | | | | | | | GPIOS7 shall be pulled low for CPLD to continue the power up sequence. With this hogged as pull-low, the CPLD workaround can be removed in OpenBMC. OpenBMC-Staging-Count: 1 Signed-off-by: Lei YU <mine260309@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: Add S2600WF BMC MachineJames Feist2017-12-122-0/+129
| | | | | | | | S2600WF is a Intel platform family with an Aspeed ast2500 BMC. OpenBMC-Staging-Count: 1 Signed-off-by: James Feist <james.feist@linux.intel.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: quanta: add i2cmux for frusPatrick Venture2017-12-081-24/+69
| | | | | | | | | The memory riser frus on the board are controlled by a gpio mux. OpenBMC-Staging-Count: 1 Signed-off-by: Patrick Venture <venture@google.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed-g4: add serial gpio driver entryPatrick Venture2017-12-081-0/+9
| | | | | | | | | Adds the serial gpio driver entry for the aspeed ast2400. OpenBMC-Staging-Count: 1 Signed-off-by: Patrick Venture <venture@google.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: zaius: move coin battery sensorPatrick Venture2017-12-081-1/+6
| | | | | | | | | Moved the coin battery sensor into a separate iio-hwmon instance to facilitate reading it as a separate hwmon instance. OpenBMC-Staging-Count: 1 Signed-off-by: Patrick Venture <venture@google.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: quanta-q71l: move coin battery sensorPatrick Venture2017-12-081-1/+6
| | | | | | | | | Moved the coin battery sensor into a separate iio-hwmon instance to facilitate reading it as a separate hwmon instance. OpenBMC-Staging-Count: 1 Signed-off-by: Patrick Venture <venture@google.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: quanta: add aliases for i2c pciePatrick Venture2017-12-051-0/+115
| | | | | | | | Provide aliases to each i2c bus per labels added for each PCIe slot, etc, that are downstream beyond a mux. Signed-off-by: Patrick Venture <venture@google.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: quanta: i2c-2 idle disconnectsPeter Hanson2017-12-051-0/+2
| | | | | | | | | | | | | | | Two top-level pca954x muxes branch off Quanta q71l i2c-2 bus; they have different addresses, so there is no confusion in that sense. However, by default, the pca954x driver skips disconnecting the selected channel. This supports expected topologies, but will leave two channels selected at the same time when connected in parallel. This commit adds the i2c-mux-idle-disconnect property to both muxes to inform the driver that disconnecting is not optional on bus 2. Signed-off-by: Peter Hanson <peterh@google.com> Signed-off-by: Patrick Venture <venture@google.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: witherspoon: Add power-button LEDVishwanatha Subbanna2017-11-301-0/+4
| | | | | | | | | This LED wired to GPIO R5 is integrated with power button OpenBMC-Staging-Count: 1 Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com> Reviewed-by: Brandon Wyman <bjwyman@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: P8: Add checkstop gpio keyLei YU2017-11-304-0/+41
| | | | | | | | | | The checkstop gpio key is missing in P8 systems. Define the checkstop gpio key for Barreleye, Firestone, Garrison, Palmetto so they can use it for checkstop monitor. OpenBMC-Staging-Count: 1 Signed-off-by: Lei YU <mine260309@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: Rename aspeed-bmc-opp-flash-layout.dtsiJames Feist2017-11-3012-11/+11
| | | | | | | | | Rename aspeed-bmc-opp-flash-layout.dtsi to openbmc-flash-layout.dtsi as this file is not open power specific. OpenBMC-Staging-Count: 1 Signed-off-by: James Feist <james.feist@linux.intel.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: gpio controller register rangePatrick Venture2017-11-301-1/+1
| | | | | | | | | | Instead of 4k, it should be 512 because the latter part of the memory region are registers for the serial gpio driver. OpenBMC-Staging-Count: 1 Signed-off-by: Patrick Venture <venture@google.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: Ensure platform mux RMII1 for MAC0Andrew Jeffery2017-11-303-0/+9
| | | | | | | | | | | | | | | | | I noticed that Witherspoon was missing its pinctrl properties for the mac0 node. On auditing the rest of the DTS files, the MSN and Q71L platforms appeared to have the same issue. Add the pinctrl nodes to ensure MAC0 has RMII1 muxed. This provides mutual exclusion with the GPIO subsystem ensuring broken userspace can't interfere with networking. OpenBMC-Staging-Count: 1 Cc: Mykola Kostenok <c_mykolak@mellanox.com> Cc: Patrick Venture <venture@google.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Acked-by: Mykola Kostenok <c_mykolak@mellanox.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: romulus: Fix identify LEDLei YU2017-11-081-1/+1
| | | | | | | | | The identify LED is different from other LEDs and shall be ACTIVE_HIGH. OpenBMC-Staging-Count: 1 Signed-off-by: Lei YU <mine260309@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: romulus: Add aspeed fan tachLei YU2017-10-311-91/+47
| | | | | | | | | | | | | | | Romulus uses aspeed fan tach instead of max31785: * Pass1's max31785 is always reset by CPLD; * Pass2's max31785 is not connected. The board has 7 fan taches connected to BMC_FANTACH8~14, and controlled by two PWMs. This commit also change "enabled" to "okay" for the i2c devices. OpenBMC-Staging-Count: 1 Signed-off-by: Lei YU <mine260309@gmail.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
* ARM: aspeed: romulus: Add reset tolerance for power GPIOsLei YU2017-10-311-0/+10
| | | | | | | | | This is a similar change as Witherspoon, that enables the host to stay up across BMC reboots. OpenBMC-Staging-Count: 1 Signed-off-by: Lei YU <mine260309@gmail.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
* ARM: dts: aspeed: Use new occ-hwmon driver for P8 systemsLei YU2017-10-302-9/+9
| | | | | | | | | Use the new occ-hwmon driver and compatible name for Barreleye and Garrison. OpenBMC-Staging-Count: 1 Signed-off-by: Lei YU <mine260309@gmail.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
* ARM: dts: aspeed: Add aspeed-lpc-snoop g4 and bmc-quanta-q71lPatrick Venture2017-10-172-0/+12
| | | | | | OpenBMC-Staging-Count: 1 Signed-off-by: Patrick Venture <venture@google.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
* aspeed: firestone: Set SIO to bypass UART in hostbootLei YU2017-10-131-0/+4
| | | | | | | | | | | | | | OpenBMC fails to boot host on Firestone. The cause is that Firestone's hostboot hangs after disables SUART/VUART. The workaround is to make hostboot run into default SUART init without disabling VUART, by setting 0x170 SIO register to 0. With this workaround, Firestone boots OK. Signed-off-by: Lei YU <mine260309@gmail.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
* ARM: dts: aspeed: firestone: Fix occ and i2cLei YU2017-10-131-5/+10
| | | | | | | | | | 1. Use updated p8 occ driver; 2. Enable i2c buses that are used. Signed-off-by: Lei YU <mine260309@gmail.com> Acked-by: Joel Stanley <joel@jms.id.au> [arj: Fixed commit message typo] Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
* ARM: dts: aspeed-garrison: Add max31785 fan controllerYi Li2017-10-041-0/+89
| | | | | | | | | Add max31785 device tree node to enable Fan Control on Garrison. OpenBMC-Staging-Count: 1 Signed-off-by: Yi Li <adamliyi@msn.com> Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: Add ranges to SCU nodeJoel Stanley2017-09-222-25/+27
| | | | | | | | | | | | | | | | | The SCU contains a number of devices. To date we have the pinctrl node, which doesn't have a reg property, the out of tree clock drivers which do have a single address in their reg properties, and the timeriomem node which has an address and length. From now on we will use a ranges property, allowing all of the devices under the SCU to specify an address and size starting from the SCU base. This allows the timeriomem node to live under the SCU syscon node. This change is required to get the timeriomem driver to probe on the ast2400. Reviewed-by: Rick Altherr <raltherr@google.com> Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed-palmetto: Request mux as per strapping configurationAndrew Jeffery2017-09-211-1/+1
| | | | | | | | | | | | | | | Prevents the error: aspeed-smc 1e630000.spi: Error applying setting, reverse things back The pinmux driver is only capable of modifying selected strapping bits that make sense to change at runtime. The SPI strapping is not currently defined modifiable, so "request" the mux as per how the board is physically strapped. OpenBMC-Staging-Count: 1 Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: zaius: Add PWM/tach peripheralXo Wang2017-09-121-0/+27
| | | | | | OpenBMC-Staging-Count: 1 Signed-off-by: Xo Wang <xow@google.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: zaius: enable port 80h snoopRobert Lippert2017-09-121-0/+5
| | | | | | | OpenBMC-Staging-Count: 1 Signed-off-by: Robert Lippert <rlippert@google.com> Signed-off-by: Xo Wang <xow@google.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: add LPC snoop device bindings for ASPEED G5Robert Lippert2017-09-121-0/+7
| | | | | | | OpenBMC-Staging-Count: 1 Signed-off-by: Robert Lippert <rlippert@google.com> Signed-off-by: Xo Wang <xow@google.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: zaius: Update hotswap controller address for EVT3Xo Wang2017-09-121-2/+2
| | | | | | | | | The LM5066I hotswap controller is at PMBus device address 0x54 starting with the EVT3 motherboard. OpenBMC-Staging-Count: 1 Signed-off-by: Xo Wang <xow@google.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: zaius: Use LM5066I driver for hotswapXo Wang2017-09-121-1/+4
| | | | | | | | | Not removing the "ti,lm5066" line because the LM5066I support is not present in pre 4.13-rc4 kernels. OpenBMC-Staging-Count: 1 Signed-off-by: Xo Wang <xow@google.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: dts: aspeed: quanta: Add iio-hwmonPatrick Venture2017-09-071-0/+7
| | | | | Signed-off-by: Patrick Venture <venture@google.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* mellanox: msn: change flash layout.Mykola Kostenok2017-09-072-33/+1
| | | | | | | | | | Remove mellanox-msn-flash-layout. And set opp-flash-layout for mellanox msn. We decided that it would better for compatibility. Signed-off-by: Mykola Kostenok <c_mykolak@mellanox.com> Acked-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
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