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* powerpc/e500/qemu-e500: enable coreintScott Wood2013-02-151-3/+4
| | | | | | | | The MPIC code will disable coreint if it detects an insufficient MPIC version. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Board support for ppa8548Stef van Os2013-02-153-0/+106
| | | | | | | | | | | | | | | | | | Initial board support for the Prodrive PPA8548 AMC module. Board is an MPC8548 AMC platform used in RapidIO systems. This module is also used to test/work on mainline linux RapidIO software. PPA8548 overview: - 1.3 GHz Freescale PowerQUICC III MPC8548 processor - 1 GB DDR2 @ 266 MHz - 8 MB NOR flash - Serial RapidIO 1.2 - 1 x 10/100/1000 BASE-T front ethernet - 1 x 1000 BASE-BX ethernet on AMC connector Signed-off-by: Stef van Os <stef.van.os@prodrive.nl> Acked-by: Timur Tabi <timur@tabi.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl: remove extraneous DIU platform functionsTimur Tabi2013-02-152-50/+0
| | | | | | | | | The Freescale DIU driver was recently updated to not require every DIU platform function, so now we can remove the unneeded functions from some boards. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* arch/powerpc/platforms/85xx/p1022_ds.c: adjust duplicate testJulia Lawall2013-02-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Delete successive tests to the same location. The code tested the result of a previous call, that itself was already tested. It is changed to test the result of the most recent call. A simplified version of the semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @s exists@ local idexpression y; expression x,e; @@ *if ( \(x == NULL\|IS_ERR(x)\|y != 0\) ) { ... when forall return ...; } ... when != \(y = e\|y += e\|y -= e\|y |= e\|y &= e\|y++\|y--\|&y\) when != \(XT_GETPAGE(...,y)\|WMI_CMD_BUF(...)\) *if ( \(x == NULL\|IS_ERR(x)\|y != 0\) ) { ... when forall return ...; } // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: use for_each_compatible_node() macroWei Yongjun2013-02-131-3/+1
| | | | | | | | Use for_each_compatible_node() macro instead of open coding it. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc: Add support for CTS-1000 GPIO controlled system poweroffBenjamin Collins2013-01-293-0/+185
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CTS-1000 is based on P4080. GPIO 27 is used to signal the FPGA to switch off power, and also associates IRQ 8 with front-panel button press (which we use to call orderly_poweroff()). The relevant device-tree looks like this: gpio0: gpio@130000 { compatible = "fsl,qoriq-gpio"; reg = <0x130000 0x1000>; interrupts = <55 2 0 0>; #gpio-cells = <2>; gpio-controller; /* Allows powering off the system via GPIO signal. */ gpio-halt@27 { compatible = "sgy,gpio-halt"; gpios = <&gpio0 27 0>; interrupts = <8 1 0 0>; }; }; Because the driver cannot match on sgy,gpio-halt (because the node is never processed through of_platform), it matches on fsl,qoriq-gpio and then checks child nodes for the matching sgy,gpio-halt. This also ensures that the GPIO controller is detected prior to sgy_cts1000's probe callback, since that node wont match via of_platform until the controller is registered. Also, because the GPIO handler for triggering system poweroff might sleep, the IRQ uses a workqueue to call orderly_poweroff(). As a final note, this driver may be expanded for other features specific to the CTS-1000. Signed-off-by: Ben Collins <ben.c@servergy.com> Cc: Jack Smith <jack.s@servergy.com> Cc: Vihar Rai <vihar.r@servergy.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* POWERPC: drivers: remove __dev* attributes.Greg Kroah-Hartman2013-01-033-3/+3
| | | | | | | | | | | | | | | | CONFIG_HOTPLUG is going away as an option. As a result, the __dev* markings need to be removed. This change removes the use of __devinit, __devexit_p, __devinitdata, __devinitconst, and __devexit from these drivers. Based on patches originally written by Bill Pemberton, but redone by me in order to handle some of the coding style issues better, by hand. Cc: Bill Pemberton <wfp5p@virginia.edu> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* powerpc/mpc85xx: Change spin table to cached memoryYork Sun2012-11-251-13/+36
| | | | | | | | | | | | ePAPR v1.1 requires the spin table to be in cached memory. So we need to change the call argument of ioremap to enable cache and coherence. We also flush the cache after writing to spin table to keep it compatible with previous cache-inhibit spin table. Flushing before and after accessing spin table is recommended by ePAPR. Signed-off-by: York Sun <yorksun@freescale.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: p1022ds: Use NULL instead of 0 for pointersTushar Behera2012-11-251-1/+1
| | | | | | | | The third argument for of_get_property() is a pointer, hence pass NULL instead of 0. Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'dt' into nextBenjamin Herrenschmidt2012-11-151-3/+3
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| * powerpc+of: Rename the drivers/of prom_* functions to of_*Nathan Fontenot2012-11-151-3/+3
| | | | | | | | | | | | | | | | | | | | | | Rename the prom_*_property routines of the generic OF code to of_*_property. This brings them in line with the naming used by the rest of the OF code. Signed-off-by: Nathan Fontenot <nfont@linux.vnet.ibm.com> Acked-by: Geoff Levand <geoff@infradead.org> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc: Fix typos in Freescale copyright claimsYang Li2012-11-151-1/+1
|/ | | | | | | | | There are many cases that Semiconductor is misspelled. The patch fix these typos. Signed-off-by: Li Yang <leoli@freescale.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* Merge branch 'next' of ↵Linus Torvalds2012-10-0627-380/+599
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc Pull powerpc updates from Benjamin Herrenschmidt: "Some highlights in addition to the usual batch of fixes: - 64TB address space support for 64-bit processes by Aneesh Kumar - Gavin Shan did a major cleanup & re-organization of our EEH support code (IBM fancy PCI error handling & recovery infrastructure) which paves the way for supporting different platform backends, along with some rework of the PCIe code for the PowerNV platform in order to remove home made resource allocations and instead use the generic code (which is possible after some small improvements to it done by Gavin). - Uprobes support by Ananth N Mavinakayanahalli - A pile of embedded updates from Freescale folks, including new SoC and board supports, more KVM stuff including preparing for 64-bit BookE KVM support, ePAPR 1.1 updates, etc..." Fixup trivial conflicts in drivers/scsi/ipr.c * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (146 commits) powerpc/iommu: Fix multiple issues with IOMMU pools code powerpc: Fix VMX fix for memcpy case driver/mtd:IFC NAND:Initialise internal SRAM before any write powerpc/fsl-pci: use 'Header Type' to identify PCIE mode powerpc/eeh: Don't release eeh_mutex in eeh_phb_pe_get powerpc: Remove tlb batching hack for nighthawk powerpc: Set paca->data_offset = 0 for boot cpu powerpc/perf: Sample only if SIAR-Valid bit is set in P7+ powerpc/fsl-pci: fix warning when CONFIG_SWIOTLB is disabled powerpc/mpc85xx: Update interrupt handling for IFC controller powerpc/85xx: Enable USB support in p1023rds_defconfig powerpc/smp: Do not disable IPI interrupts during suspend powerpc/eeh: Fix crash on converting OF node to edev powerpc/eeh: Lock module while handling EEH event powerpc/kprobe: Don't emulate store when kprobe stwu r1 powerpc/kprobe: Complete kprobe and migrate exception frame powerpc/kprobe: Introduce a new thread flag powerpc: Remove unused __get_user64() and __put_user64() powerpc/eeh: Global mutex to protect PE tree powerpc/eeh: Remove EEH PE for normal PCI hotplug ...
| * powerpc/fsl-pci: Unify pci/pcie initialization codeJia Hongtao2012-09-1224-378/+134
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We unified the Freescale pci/pcie initialization by changing the fsl_pci to a platform driver. In previous PCI code architecture the initialization routine is called at board_setup_arch stage. Now the initialization is done in probe function which is architectural better. Also It's convenient for adding PM support for PCI controller in later patch. Now we registered pci controllers as platform devices. So we combine two initialization code as one platform driver. Signed-off-by: Jia Hongtao <B38951@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/swiotlb: Enable at early stage and disable if not necessaryJia Hongtao2012-09-122-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the dependency on PCI initialization for SWIOTLB initialization. So that PCI can be initialized at proper time. SWIOTLB is partly determined by PCI inbound/outbound map which is assigned in PCI initialization. But swiotlb_init() should be done at the stage of mem_init() which is much earlier than PCI initialization. So we reserve the memory for SWIOTLB first and free it if not necessary. All boards are converted to fit this change. Signed-off-by: Jia Hongtao <B38951@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Acked-by: Tony Breeds <tony@bakeyournoodle.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: add HOTPLUG_CPU supportZhao Chenhui2012-09-121-13/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support to disable and re-enable individual cores at runtime on MPC85xx/QorIQ SMP machines. Currently support e500v1/e500v2 core. MPC85xx machines use ePAPR spin-table in boot page for CPU kick-off. This patch uses the boot page from bootloader to boot core at runtime. It supports 32-bit and 36-bit physical address. Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Jin Qing <b24347@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: implement hardware timebase syncZhao Chenhui2012-09-121-0/+82
| | | | | | | | | | | | | | | | | | | | | | | | Do hardware timebase sync. Firstly, stop all timebases, and transfer the timebase value of the boot core to the other core. Finally, start all timebases. Only apply to dual-core chips, such as MPC8572, P2020, etc. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Replace epapr spin table macros/defines with a structZhao Chenhui2012-09-121-23/+23
| | | | | | | | | | Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: introduce support for the Freescale / iVeia P1022RDKTimur Tabi2012-09-123-0/+203
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Freescale / iVeia P1022RDK reference board is a small-factor board with a Freescale P1022 SOC. It includes: 1) 512 MB 64-bit DDR3-800 (max) memory 2) 8MB SPI serial flash memory for boot loader 3) Bootable 4-bit SD/MMC port 4) Two 10/100/1000 Ethernet connectors 5) One SATA port 6) Two USB ports 7) One PCIe x4 slot 8) DVI video connector 9) Audio input and output jacks, powered by a Wolfson WM8960 codec. Unlike the P1022DS, the P1022RDK does not have any localbus devices, presumably because of the localbus / DIU multiplexing restriction of the P1022 SOC. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Add support for P5040DS boardTimur Tabi2012-09-124-1/+113
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the Freescale P5040DS Reference Board ("Superhydra"), which is similar to the P5020DS. Features of the P5040 are listed below, but not all of these features (e.g. DPAA networking) are currently supported. Four P5040 single-threaded e5500 cores built Up to 2.4 GHz with 64-bit ISA support Three levels of instruction: user, supervisor, hypervisor CoreNet platform cache (CPC) 2.0 MB configures as dual 1 MB blocks hierarchical interconnect fabric Two 64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving support Up to 1600MT/s Memory pre-fetch engine DPAA incorporating acceleration for the following functions Packet parsing, classification, and distribution (FMAN) Queue management for scheduling, packet sequencing and congestion management (QMAN) Hardware buffer management for buffer allocation and de-allocation (BMAN) Cryptography acceleration (SEC 5.0) at up to 40 Gbps SerDes 20 lanes at up to 5 Gbps Supports SGMII, XAUI, PCIe rev1.1/2.0, SATA Ethernet interfaces Two 10 Gbps Ethernet MACs Ten 1 Gbps Ethernet MACs High-speed peripheral interfaces Two PCI Express 2.0/3.0 controllers Additional peripheral interfaces Two serial ATA (SATA 2.0) controllers Two high-speed USB 2.0 controllers with integrated PHY Enhanced secure digital host controller (SD/MMC/eMMC) Enhanced serial peripheral interface (eSPI) Two I2C controllers Four UARTs Integrated flash controller supporting NAND and NOR flash DMA Dual four channel Support for hardware virtualization and partitioning enforcement Extra privileged level for hypervisor support QorIQ Trust Architecture 1.1 Secure boot, secure debug, tamper detection, volatile key storage Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | sections: fix section conflicts in arch/powerpcAndi Kleen2012-10-061-1/+1
|/ | | | | | | Signed-off-by: Andi Kleen <ak@linux.intel.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge remote-tracking branch 'kumar/merge' into mergeBenjamin Herrenschmidt2012-07-311-22/+100
|\ | | | | | | | | | | | | Kumar says: "A few patches that missed the initial 3.6 window. These are bug fixes at this point."
| * powerpc/85xx: p1022ds: fix DIU/LBC switching with NAND enabledTimur Tabi2012-07-261-2/+62
| | | | | | | | | | | | | | | | | | | | | | In order for indirect mode on the PIXIS to work properly, both chip selects need to be set to GPCM mode, otherwise writes to the chip select base addresses will not actually post to the local bus -- they'll go to the NAND controller instead. Therefore, we need to set BR0 and BR1 to GPCM mode before switching to indirect mode. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: p1022ds: disable the NAND flash node if video is enabledTimur Tabi2012-07-261-20/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Freescale P1022 has a unique pin muxing "feature" where the DIU video controller's video signals are muxed with 24 of the local bus address signals. When the DIU is enabled, the bulk of the local bus is disabled, preventing access to memory-mapped devices like NAND flash and the pixis FPGA. Therefore, if the DIU is going to be enabled, then memory-mapped devices on the localbus, like NAND flash, need to be disabled. This patch is similar to "powerpc/85xx: p1022ds: disable the NOR flash node if video is enabled", except that it disables the NAND flash node instead. This PIXIS node needs to remain enabled because it is used by platform code to switch into indirect mode. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Merge tag 'for-3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pciLinus Torvalds2012-07-241-1/+1
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull PCI changes from Bjorn Helgaas: "Host bridge hotplug: - Add MMCONFIG support for hot-added host bridges (Jiang Liu) Device hotplug: - Move fixups from __init to __devinit (Sebastian Andrzej Siewior) - Call FINAL fixups for hot-added devices, too (Myron Stowe) - Factor out generic code for P2P bridge hot-add (Yinghai Lu) - Remove all functions in a slot, not just those with _EJx (Amos Kong) Dynamic resource management: - Track bus number allocation (struct resource tree per domain) (Yinghai Lu) - Make P2P bridge 1K I/O windows work with resource reassignment (Bjorn Helgaas, Yinghai Lu) - Disable decoding while updating 64-bit BARs (Bjorn Helgaas) Power management: - Add PCIe runtime D3cold support (Huang Ying) Virtualization: - Add VFIO infrastructure (ACS, DMA source ID quirks) (Alex Williamson) - Add quirks for devices with broken INTx masking (Jan Kiszka) Miscellaneous: - Fix some PCI Express capability version issues (Myron Stowe) - Factor out some arch code with a weak, generic, pcibios_setup() (Myron Stowe)" * tag 'for-3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (122 commits) PCI: hotplug: ensure a consistent return value in error case PCI: fix undefined reference to 'pci_fixup_final_inited' PCI: build resource code for M68K architecture PCI: pciehp: remove unused pciehp_get_max_lnk_width(), pciehp_get_cur_lnk_width() PCI: reorder __pci_assign_resource() (no change) PCI: fix truncation of resource size to 32 bits PCI: acpiphp: merge acpiphp_debug and debug PCI: acpiphp: remove unused res_lock sparc/PCI: replace pci_cfg_fake_ranges() with pci_read_bridge_bases() PCI: call final fixups hot-added devices PCI: move final fixups from __init to __devinit x86/PCI: move final fixups from __init to __devinit MIPS/PCI: move final fixups from __init to __devinit PCI: support sizing P2P bridge I/O windows with 1K granularity PCI: reimplement P2P bridge 1K I/O windows (Intel P64H2) PCI: disable MEM decoding while updating 64-bit MEM BARs PCI: leave MEM and IO decoding disabled during 64-bit BAR sizing, too PCI: never discard enable/suspend/resume_early/resume fixups PCI: release temporary reference in __nv_msi_ht_cap_quirk() PCI: restructure 'pci_do_fixups()' ...
| * powerpc/PCI: move fixup hooks from __init to __devinitSebastian Andrzej Siewior2012-06-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The fixups are executed once the pci-device is found which is during boot process so __init seems fine as long as the platform does not support hotplug. However it is possible to remove the PCI bus at run time and have it rediscovered again via "echo 1 > /sys/bus/pci/rescan" and this will call the fixups again. Cc: Kumar Gala <galak@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* | Merge remote-tracking branch 'kumar/next' into nextBenjamin Herrenschmidt2012-07-139-432/+310
|\ \ | | | | | | | | | Freescale updates for 3.6
| * | powerpc/e500: add paravirt QEMU platformScott Wood2012-07-113-0/+89
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This gives the kernel a paravirtualized machine to target, without requiring both sides to pretend to be targeting a specific board that likely has little to do with the host in KVM scenarios. This avoids the need to add new boards to QEMU just to be able to run KVM on new CPUs. As this is the first platform that can run with either e500v2 or e500mc, CONFIG_PPC_E500MC is now a legitimately user configurable option, so add a help text. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/mpc85xx_ds: convert to unified PCI initScott Wood2012-07-111-68/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | Similar to how the primary PCI bridge is identified by looking for an isa subnode, we determine whether to apply uli exclusions by looking for a uli subnode. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: Add BSC9131 RDB SupportPrabhakar Kushwaha2012-07-103-0/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BSC9131RDB is a Freescale reference design board for BSC9131 SoC. The BSC9131 is integrated SoC that targets Femto base station market. It combines Power Architecture e500v2 and DSP StarCore SC3850 core technologies with MAPLE-B2F baseband acceleration processing elements. The BSC9131 SoC includes the following function and features: . Power Architecture subsystem including a e500 processor with 256-Kbyte shared L2 cache . StarCore SC3850 DSP subsystem with a 512-Kbyte private L2 cache . The Multi Accelerator Platform Engine for Femto BaseStation Baseband Processing (MAPLE-B2F) . A multi-standard baseband algorithm accelerator for Channel Decoding/Encoding, Fourier Transforms, UMTS chip rate processing, LTE UP/DL Channel processing, and CRC algorithms . Consists of accelerators for Convolution, Filtering, Turbo Encoding, Turbo Decoding, Viterbi decoding, Chiprate processing, and Matrix Inversion operations . DDR3/3L memory interface with 32-bit data width without ECC and 16-bit with ECC, up to 400-MHz clock/800 MHz data rate . Dedicated security engine featuring trusted boot . DMA controller . OCNDMA with four bidirectional channels . Interfaces . Two triple-speed Gigabit Ethernet controllers featuring network acceleration including IEEE 1588. v2 hardware support and virtualization (eTSEC) . eTSEC 1 supports RGMII/RMII . eTSEC 2 supports RGMII . High-speed USB 2.0 host and device controller with ULPI interface . Enhanced secure digital (SD/MMC) host controller (eSDHC) . Antenna interface controller (AIC), supporting three industry standard JESD207/three custom ADI RF interfaces (two dual port and one single port) and three MAXIM's MaxPHY serial interfaces . ADI lanes support both full duplex FDD support and half duplex TDD support . Universal Subscriber Identity Module (USIM) interface that facilitates communication to SIM cards or Eurochip pre-paid phone cards . TDM with one TDM port . Two DUART, four eSPI, and two I2C controllers . Integrated Flash memory controller (IFC) . TDM with 256 channels . GPIO . Sixteen 32-bit timers The DSP portion of the SoC consists of DSP core (SC3850) and various accelerators pertaining to DSP operations. BSC9131RDB Overview ---------------------- BSC9131 SoC 1Gbyte DDR3 (on board DDR) 128Mbyte 2K page size NAND Flash 256 Kbit M24256 I2C EEPROM 128 Mbit SPI Flash memory USB-ULPI eTSEC1: Connected to RGMII PHY eTSEC2: Connected to RGMII PHY DUART interface: supports one UARTs up to 115200 bps for console display Linux runs on e500v2 core and access some DSP peripherals like AIC Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Akhil Goyal <Akhil.Goyal@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Rajan Srivastava <rajan.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | Revert "powerpc/p3060qds: Add support for P3060QDS board"Timur Tabi2012-07-103-90/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 96cc017c5b7ec095ef047d3c1952b6b6bbf98943. The P3060 was cancelled before it went into production, so there's no point in supporting it. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: use the BRx registers to enable indirect mode on the P1022DSTimur Tabi2012-07-101-13/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to enable the DIU video controller on the P1022DS, the FPGA needs to be switched to "indirect mode", where the localbus is disabled and the FPGA is accessed via writes to localbus chip select signals CS0 and CS1. To obtain the address of CS0 and CS1, the platform driver uses an "indirect pixis mode" device tree node. This node assumes that the localbus 'ranges' property is sorted in chip-select order. That is, reg value 0 maps to CS0, reg value 1 maps to CS1, etc. This is how the 'ranges' property is supposed to be arranged. Unfortunately, the 'ranges' property is often mis-arranged, and not just on the P1022DS. Linux normally does not care, since it does not program the localbus. But the indirect-mode code on the P1022DS does care. The "proper" fix is to have U-Boot fix the 'ranges' property, but this would be too cumbersome. The names and 'reg' properties of all the localbus devices would also need to be updated, and determining which localbus device maps to which chip select is board-specific. Instead, we determine the CS0/CS1 base addresses the same way that U-boot does -- by reading the BRx registers directly and mapping them to physical addresses. This code is simpler and more reliable, and it does not require a U-boot or device tree change. Since the indirect pixis device tree node is no longer needed, the node is deleted from the DTS. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc: remove Wind River SBC8560 supportPaul Gortmaker2012-07-103-261/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reference board dates back to 2004, and is largely a legacy EOL product. The MPC8560 is a pre e500v2 CPU. The SBC8548 is a more modern, better e500v2 target for people to use as a reference board with today's kernels, should they require one. Removing support for it will also allow us to remove some sbc8560 specific quirk handling in 8250 UART code, and some MTD mapping support. Cc: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: Add P1024rdb board supportTang Yuantian2012-07-101-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The p1024rdb has the similar feature as the p1020rdb. Therefore, p1024rdb use the same platform file as the p1/p2 rdb board. Overview of P2020RDB platform - DDR3 1G - NOR flash 16M - 3 Ethernet interfaces - NAND Flash 32M - SPI EEPROM 16M - SD/MMC - 2 USB ports - 4 TDM ports Signed-off-by: Jin Qing <b24347@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | of: Improve prom_update_property() functionDong Aisheng2012-07-111-7/+1
|/ / | | | | | | | | | | | | | | | | | | | | prom_update_property() currently fails if the property doesn't actually exist yet which isn't what we want. Change to add-or-update instead of update-only, then we can remove a lot duplicated lines. Suggested-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org> Acked-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc: Fix assmption of end_of_DRAM() returns end addressBharat Bhushan2012-07-036-6/+6
|/ | | | | | | | memblock_end_of_DRAM() returns end_address + 1, not end address. While some code assumes that it returns end address. Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc/85xx: don't call of_platform_bus_probe() twiceTimur Tabi2012-04-193-22/+8
| | | | | | | | | | | | | | | | | | | | | Commit 46d026ac ("powerpc/85xx: consolidate of_platform_bus_probe calls") replaced platform-specific of_device_id tables with a single function that probes the most of the busses in 85xx device trees. If a specific platform needed additional busses probed, then it could call of_platform_bus_probe() again. Typically, the additional platform-specific busses are children of existing busses that have already been probed. of_platform_bus_probe() does not handle those child busses automatically. Unfortunately, this doesn't actually work. The second (platform-specific) call to of_platform_bus_probe() never finds any of the busses it's asked to find. To remedy this, the platform-specific of_device_id tables are eliminated, and their entries are merged into mpc85xx_common_ids[], so that all busses are probed at once. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge remote-tracking branch 'kumar/next' into mergeBenjamin Herrenschmidt2012-04-023-4/+4
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| * powerpc/8xxx: remove 85xx/86xx restrictions from fsl_guts.hTimur Tabi2012-03-293-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the check for CONFIG_PPC_85xx and CONFIG_PPC_86xx from fsl_guts.h. The check was originally intended to allow the same header file to be used on 85xx and 86xx systems, even though the Global Utilities register could be different. It turns out that they're not actually different, and so the check is not necessary. In addition, neither macro is defined for 64-bit e5500 kernels, so that causes a build break. Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Disintegrate asm/system.h for PowerPCDavid Howells2012-03-2821-21/+0
|/ | | | | | | | Disintegrate asm/system.h for PowerPC. Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> cc: linuxppc-dev@lists.ozlabs.org
* Merge branch 'next' of ↵Linus Torvalds2012-03-2120-105/+770
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc Pull powerpc merge from Benjamin Herrenschmidt: "Here's the powerpc batch for this merge window. It is going to be a bit more nasty than usual as in touching things outside of arch/powerpc mostly due to the big iSeriesectomy :-) We finally got rid of the bugger (legacy iSeries support) which was a PITA to maintain and that nobody really used anymore. Here are some of the highlights: - Legacy iSeries is gone. Thanks Stephen ! There's still some bits and pieces remaining if you do a grep -ir series arch/powerpc but they are harmless and will be removed in the next few weeks hopefully. - The 'fadump' functionality (Firmware Assisted Dump) replaces the previous (equivalent) "pHyp assisted dump"... it's a rewrite of a mechanism to get the hypervisor to do crash dumps on pSeries, the new implementation hopefully being much more reliable. Thanks Mahesh Salgaonkar. - The "EEH" code (pSeries PCI error handling & recovery) got a big spring cleaning, motivated by the need to be able to implement a new backend for it on top of some new different type of firwmare. The work isn't complete yet, but a good chunk of the cleanups is there. Note that this adds a field to struct device_node which is not very nice and which Grant objects to. I will have a patch soon that moves that to a powerpc private data structure (hopefully before rc1) and we'll improve things further later on (hopefully getting rid of the need for that pointer completely). Thanks Gavin Shan. - I dug into our exception & interrupt handling code to improve the way we do lazy interrupt handling (and make it work properly with "edge" triggered interrupt sources), and while at it found & fixed a wagon of issues in those areas, including adding support for page fault retry & fatal signals on page faults. - Your usual random batch of small fixes & updates, including a bunch of new embedded boards, both Freescale and APM based ones, etc..." I fixed up some conflicts with the generalized irq-domain changes from Grant Likely, hopefully correctly. * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (141 commits) powerpc/ps3: Do not adjust the wrapper load address powerpc: Remove the rest of the legacy iSeries include files powerpc: Remove the remaining CONFIG_PPC_ISERIES pieces init: Remove CONFIG_PPC_ISERIES powerpc: Remove FW_FEATURE ISERIES from arch code tty/hvc_vio: FW_FEATURE_ISERIES is no longer selectable powerpc/spufs: Fix double unlocks powerpc/5200: convert mpc5200 to use of_platform_populate() powerpc/mpc5200: add options to mpc5200_defconfig powerpc/mpc52xx: add a4m072 board support powerpc/mpc5200: update mpc5200_defconfig to fit for charon board Documentation/powerpc/mpc52xx.txt: Checkpatch cleanup powerpc/44x: Add additional device support for APM821xx SoC and Bluestone board powerpc/44x: Add support PCI-E for APM821xx SoC and Bluestone board MAINTAINERS: Update PowerPC 4xx tree powerpc/44x: The bug fixed support for APM821xx SoC and Bluestone board powerpc: document the FSL MPIC message register binding powerpc: add support for MPIC message register API powerpc/fsl: Added aliased MSIIR register address to MSI node in dts powerpc/85xx: mpc8548cds - add 36-bit dts ...
| * powerpc/85xx: mpc8548cds - Add FPGA node to dtschenhui zhao2012-03-161-16/+34
| | | | | | | | | | | | | | | | | | Remove FPGA(CADMUS) macros in code. Move it to dts. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: mpc8548cds - Add RapidIO node to dtschenhui zhao2012-03-161-0/+1
| | | | | | | | | | | | | | | | Enable RapidIO and add rapidio and rmu nodes to dts. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: mpc85xxcds - Fix PCI I/O space resource of PCI bridgechenhui zhao2012-03-161-2/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a PCI bridge(Tsi310) between the MPC8548 and a VIA southbridge chip. The bootloader sets the PCI bridge to open a window from 0x0000 to 0x1fff on the PCI I/O space. But the kernel can't set the I/O resource. In the routine pci_read_bridge_io(), if the base which is read from PCI_IO_BASE is equal to zero, the routine don't set the I/O resource of the child bus. To allow the legacy I/O space on the VIA southbridge to be accessed, use the fixup to fix the PCI I/O space of the PCI bridge. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Add Quicc Engine support for p1025rdbZhicheng Fan2012-03-161-1/+76
| | | | | | | | | | | | Signed-off-by: Zhicheng Fan <b32736@freescale.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Abstract common define of signal multiplex control for qeZhicheng Fan2012-03-161-20/+15
| | | | | | | | | | | | | | | | The mpc85xx_rdb and mpc85xx_mds have commom define of signal multiplex for qe, so they need to go in common header, the patch abstract them to fsl_guts.h Signed-off-by: Zhicheng Fan <b32736@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: allow CONFIG_PHYS_64BIT to be selectableTimur Tabi2012-03-161-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the "select PHYS_64BIT" from the Kconfig entry for the P1022DS, so that large physical address support is a selectable option for non-CoreNet reference boards. The option is enabled in mpc85xx_[smp_]defconfig so that the default is unchanged. However, now it can be deselected. The P1022DS had this option defined because the default device tree for this board uses 36-bit addresses. This had the side-effect of forcing this option on for all boards that use mpc85xx_[smp_]defconfig. Some users may want to disable this feature to create an optimized configuration for boards with <= 2GB of RAM. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Add missing config option for CACHE SRAM codeClaudiu Manoil2012-03-161-0/+9
| | | | | | | | | | | | | | | | | | | | | | fsl_85xx_l2ctlr.o and fsl_85xx_cache_sram.o are built only if CONFIG_FSL_85XX_CACHE_SRAM is defined. The driver that qualifies and wants to make use of the CACHE SRAM's exported API (i.e. a freescale net driver) should (be able to) select this config option. Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: p1022ds: enable monitor switching via pixis indirect modeTimur Tabi2012-03-161-22/+110
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When the P1022's DIU video controller is active, the pixis must be accessed in "indirect" mode, which uses localbus chip select addresses. Switching between the DVI and LVDS monitor ports is handled by the pixis, so that switching needs to be done via indirect mode. This has the side-effect of no longer requiring U-Boot to enable the DIU. Now Linux can enable the DIU all by itself. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Board support for GE IMP3AMartyn Welch2012-03-163-0/+262
| | | | | | | | | | | | | | | | Initial board support for the GE IMP3A, a 3U compactPCI card with a p2020 processor. Signed-off-by: Martyn Welch <martyn.welch@ge.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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