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* MIPS: BCM47xx: Migrate to new platform makefile style.Ralf Baechle2010-08-053-7/+8
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lasat: Migrate to new platform makefile style.Ralf Baechle2010-08-054-9/+8
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: PowerTV: Migrate to new platform makefile style.Ralf Baechle2010-08-054-8/+9
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: WRPPMC: Migrate to new platform makefile style.Ralf Baechle2010-08-054-10/+9
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: WRPPMC: Move code one directory level up.Ralf Baechle2010-08-058-1/+1
| | | | | | | It was the last platform under gt64120 and will fit better into the new platform makefile scheme, if moved. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: RB532: Migrate to new platform makefile style.Ralf Baechle2010-08-054-9/+8
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: IP32: Migrate to new platform makefile style.Ralf Baechle2010-08-054-14/+12
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Malta: Migrate to new platform makefile style.Ralf Baechle2010-08-054-10/+8
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: IP22, IP28: Migrate to new platform makefile style.Ralf Baechle2010-08-054-37/+35
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: SNI: Migrate to new platform makefile style.Ralf Baechle2010-08-054-14/+12
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: DECstation: Migrate to new platform makefile style.Ralf Baechle2010-08-054-10/+9
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Jazz: Migrate to new platform makefile style.Ralf Baechle2010-08-054-9/+7
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: PMC-Sierra: Move board Makefile parts to their own Platform fileShane McDonald2010-08-053-15/+15
| | | | | | | Signed-off-by: Shane McDonald <mcdonald.shane@gmail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1354/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Move VR41xx Makefile parts to their own Platform fileYoichi Yuasa2010-08-054-35/+33
| | | | | | | Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/1322/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Move Cobalt Makefile parts to their own Platform fileYoichi Yuasa2010-08-054-9/+7
| | | | | | | Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/1321/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: IP27: Migrate to new Platform fileRalf Baechle2010-08-054-22/+20
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Move Alchemy Makefile parts to their own Platform file.Manuel Lauss2010-08-058-115/+110
| | | | | | | | | | | [Ralf: Remove a forgotten -Werror in Pb1200 Makefile.] Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Manuel Lauss <manuel.lauss@googlemail.com> Patchwork: https://patchwork.linux-mips.org/patch/1319/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: fix deprecated compile warningsFUJITA Tomonori2010-08-051-4/+4
| | | | | | | | | | | | | | | | | Replace deprecated DMA_32BIT_MASK with DMA_BIT_MASK. This is needed because the new style platform makefiles will enable -Werror. cc1: warnings being treated as errors arch/mips/alchemy/devboards/db1200/platform.c:219: error: 'DMA_nnBIT_MASK' is deprecated arch/mips/alchemy/devboards/db1200/platform.c:226: error: 'DMA_nnBIT_MASK' is deprecated arch/mips/alchemy/devboards/db1200/platform.c:388: error: 'DMA_nnBIT_MASK' is deprecated arch/mips/alchemy/devboards/db1200/platform.c:393: error: 'DMA_nnBIT_MASK' is deprecated Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> To: linux-mips@linux-mips.org Acked-by: Manuel Lauss <manuel.lauss@googlemail.com> Patchwork: https://patchwork.linux-mips.org/patch/1427/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: move boards over to obj-yManuel Lauss2010-08-053-5/+4
| | | | | | | | | | Preparatory step for moving Alchemy over to new MIPS Platform build system support. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/1318/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: MIPSsim: Migrate to new Platform fileRalf Baechle2010-08-054-9/+7
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Migrate makefile to new Platform fileWu Zhangjin2010-08-055-33/+33
| | | | | | | | | | | Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> To: linux-mips <linux-mips@linux-mips.org> Cc: Alexander Clouter <alex@digriz.org.uk> Cc: Manuel Lauss <manuel.lauss@gmail.com> Cc: Sam Ravnborg <sam@ravnborg.org>, Patchwork: https://patchwork.linux-mips.org/patch/1313/ Patchwork: https://patchwork.linux-mips.org/patch/1326/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Introduce support for Platform definitionsSam Ravnborg2010-08-055-8/+16
| | | | | | | | | | | | | | | | | | | | | | | | Move platform specific definitions to the platfrom directories. Each platform shall do the following: 1) include an entry in arch/mips/Kbuild.platforms 2) add relevant definitions to arch/mips/<platform>/Platform This commits changes ar7 to the new scheme as an example. Introducing a platform speecific Platfrom file has following advantages: 1) decentralization of platfrom definitions 2) simplification af arch/mips/Makefile 3) force all platfrom to build with -Werror (done in arch/mips/Kbuild) [Ralf: Remove forgotten -Werror from AR7 Makefile] Signed-off-by: Sam Ravnborg <sam@ravnborg.org> To: linux-mips <linux-mips@linux-mips.org> To: Wu Zhangjin <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/1302/ Patchwork: http://patchwork.linux-mips.org/patch/1308/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add -Werror to arch/mips/KbuildSam Ravnborg2010-08-054-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | Adding subdirs-ccflags-y := -Werror to arch/mips/Kbuild let us in one go cover all files with -Werror. In addition this allows us to remove the individual -Werror definition in various Makefile. Adding the definition to Kbuild as a recursive option help us not to forget to do so. With this change we now compile arch/mips/kernel/cpufreq with -Werror One drawback: When specifying a subdirectory covered by the Kbuild file like this: make arch/mips/kernel/ then kbuild fails to pick up the -Werror definition. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> To: linux-mips <linux-mips@linux-mips.org> To: Wu Zhangjin <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/1301/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Introduce arch/mips/KbuildSam Ravnborg2010-08-052-1/+8
| | | | | | | | Signed-off-by: Sam Ravnborg <sam@ravnborg.org> To: linux-mips <linux-mips@linux-mips.org> To: Wu Zhangjin <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/1300/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: IP27: klconfig.c checkpatch cleanupAndrea Gelmini2010-08-051-4/+4
| | | | | | | | | | | | arch/mips/sgi-ip27/ip27-klconfig.c:51: ERROR: "foo * bar" should be "foo *bar" arch/mips/sgi-ip27/ip27-klconfig.c:63: ERROR: "foo * bar" should be "foo *bar" arch/mips/sgi-ip27/ip27-klconfig.c:81: ERROR: "foo * bar" should be "foo *bar" arch/mips/sgi-ip27/ip27-klconfig.c:100: ERROR: "foo * bar" should be "foo *bar" Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1278/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: PCI: RM9000 checkpatch cleanupAndrea Gelmini2010-08-051-2/+2
| | | | | | | | | | | | arch/mips/pci/ops-titan-ht.c:36: ERROR: "foo * bar" should be "foo *bar" arch/mips/pci/ops-titan-ht.c:68: ERROR: "foo * bar" should be "foo *bar" Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: Tejun Heo <tj@kernel.org> Cc: Christoph Lameter <cl@linux-foundation.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1277/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Checkpatch cleanupAndrea Gelmini2010-08-051-2/+1
| | | | | | | | | arch/mips/math-emu/sp_tlong.c:75: ERROR: else should follow close brace '}' Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1276/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Checkpatch cleanupAndrea Gelmini2010-08-051-2/+1
| | | | | | | | | arch/mips/math-emu/sp_tint.c:76: ERROR: else should follow close brace '}' Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1275/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Checkpatch cleanupAndrea Gelmini2010-08-051-1/+1
| | | | | | | | | arch/mips/math-emu/sp_modf.c:32: ERROR: "foo * bar" should be "foo *bar" Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1273/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Checkpatch cleanupAndrea Gelmini2010-08-051-2/+1
| | | | | | | | | arch/mips/math-emu/dp_tlong.c:75: ERROR: else should follow close brace '}' Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1272/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Checkpatch cleanupAndrea Gelmini2010-08-051-2/+1
| | | | | | | | | arch/mips/math-emu/dp_tint.c:73: ERROR: else should follow close brace '}' Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1271/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Checkpatch cleanupAndrea Gelmini2010-08-051-1/+1
| | | | | | | | | arch/mips/math-emu/dp_modf.c:32: ERROR: "foo * bar" should be "foo *bar" Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1269/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: DECstation: Checkpatch cleanupAndrea Gelmini2010-08-051-2/+1
| | | | | | | | | arch/mips/dec/promcon.c:37: ERROR: that open brace { should be on the previous line Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1270/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Yosemite: ht-irq.c: Checkpatch cleanupAndrea Gelmini2010-08-051-7/+6
| | | | | | | | | | | | | | arch/mips/pmc-sierra/yosemite/ht-irq.c:38: ERROR: code indent should use tabs where possible arch/mips/pmc-sierra/yosemite/ht-irq.c:39: ERROR: code indent should use tabs where possible arch/mips/pmc-sierra/yosemite/ht-irq.c:40: ERROR: code indent should use tabs where possible arch/mips/pmc-sierra/yosemite/ht-irq.c:43: ERROR: code indent should use tabs where possible arch/mips/pmc-sierra/yosemite/ht-irq.c:44: ERROR: code indent should use tabs where possible arch/mips/pmc-sierra/yosemite/ht-irq.c:45: ERROR: code indent should use tabs where possible Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1268/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: PowerTV: Correct ASIC device register names and locationsDavid VomLehn2010-08-055-8/+8
| | | | | | | | | Correct ASIC device register names and addresses for USB devices. Signed-off-by: David VomLehn <dvomlehn@cisco.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1258/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: PowerTV: Use O(1) algorthm for phys_to_dma/dma_to_physDavid VomLehn2010-08-056-142/+529
| | | | | | | | | | | | | | | | | | | | | | | | Replace phys_to_dma()/dma_to_phys() looping algorithm with an O(1) algorithm The approach taken is inspired by the sparse memory implementation: take a certain number of high-order bits off the address them, use this as an index into a table containing an offset to the desired address and add it to the original value. There is a table for mapping physical addresses to DMA addresses and another one for the reverse mapping. The table sizes depend on how fine-grained the mappings need to be; Coarser granularity less to smaller tables. On a processor with 32-bit physical and DMA addresses, with 4 MIB granularity, memory usage is two 2048-byte arrays. Each 32-byte cache line thus covers 64 MiB of address space. Also, renames phys_to_bus() to phys_to_dma() and bus_to_phys() to dma_to_phys() to align with kernel usage. [Ralf: Fixed silly build breakage due to stackoverflow warning caused by huge array on stack.] Signed-off-by: David VomLehn <dvomlehn@cisco.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1257/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: MTX1: Fix build.Ralf Baechle2010-08-053-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | CC arch/mips/alchemy/mtx-1/board_setup.o {standard input}: Assembler messages: {standard input}:263: Error: opcode not supported on this processor: mips1 (mips1) `sync' {standard input}:274: Error: opcode not supported on this processor: mips1 (mips1) `sync' {standard input}:296: Error: opcode not supported on this processor: mips1 (mips1) `sync' [...] Any .set mipsX statement other than .set mips0 at the end of inline assembler is a big fat bug. Introduced by 9482eabeca315c0276ffb50026b7482481b7097b (linux-mips.org) rsp. 32fd6901a6d8d19f94e4de6be4e4b552ab078620 (kernel.org). While at it, fix the same issue in arch/mips/alchemy/devboards/pb1000/board_setup.c arch/mips/alchemy/xxs1500/board_setup.c as well. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM47xx: Activate SSB_B43_PCI_BRIDGE by defaultHauke Mehrtens2010-08-051-0/+1
| | | | | | | | | | | B43_pci_bridge is needed to use the b43 driver with brcm47xx. Activate it by default if PCI is available. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1510/ Acked-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM47xx: Really fix 128MB RAM problemHauke Mehrtens2010-08-051-8/+14
| | | | | | | | | | | | | | | | | | | The previous patch 4a86f2d27733f610e642649aca3e82e86fca9e22 (lmo) rsp. 84a6fcb368a080620d12fc4d79e07902dbee7335 (kernel.org) was wrong. The BCM47xx architecture maps the ram into a 128MB address space. It will be spaced there as often as goes into the 128MB. Detection tries to find the position where the same memory is found. When reading beyond 128MB the processor will throw an exception. If 128MB RAM is installed, it will not find a memory alias because it tries to read beyond the 128MB border. Now it just assumes 128MB installed ram if it can not find an alias. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1508/ Acked-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Workaround link failures with gcc-4.4.x 32-bits toolchainsFlorian Fainelli2010-08-051-8/+0
| | | | | | | | | | | | | | When building with a gcc-4.4.x toolchain that is configured to produce 32-bits executables by default, we will produce __lshrti3 in sched_clock() which is never resolved so the kernel fails to link. Unconditionally use the inline assembly version as suggested by David Daney, which works around the issue. Signed-off-by: Florian Fainelli <florian@openwrt.org> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1514/ Acked-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: N32: Fix syscall number comments.David Daney2010-08-051-4/+4
| | | | | | | Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1515/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Don't overflow cevt-r4k.c calculations at high clock rates.David Daney2010-08-051-3/+2
| | | | | | | | | | | | | | | The 'mult' element of struct clock_event_device must never be wider than 32-bits. If it were, it would get truncated when used by clockevent_delta2ns() when this calls do_div(). We can meet this requirement by using clockevent_set_clock() to set the MULT and SHIFT values. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1253/ Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: IP27: Don't include <linux/topology.h> into <asm/sn/agent.h>.Ralf Baechle2010-08-051-1/+0
| | | | | | | The include is unecessary and will when building the IP35 result in recursive header inclusion spaghetti. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: TX49xx: Define ARCH_KMALLOC_MINALIGNAtsushi Nemoto2010-08-051-3/+1
| | | | | | | | | | | With SLAB, it works without ARCH_KMALLOC_MINALIGN, but with SLOB/SLUB, ARCH_KMALLOC_MINALIGN is required to ensure alignment of kmalloced buffer. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1248/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Set io_map_base for several PCI bridges lacking itBen Hutchings2010-07-265-1/+6
| | | | | | | | | | | | | | | Several MIPS platforms don't set pci_controller::io_map_base for their PCI bridges. This results in a panic in pci_iomap(). (The panic is conditional on CONFIG_PCI_DOMAINS, but that is now enabled for all PCI MIPS systems.) Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Cc: linux-mips@linux-mips.org Cc: Martin Michlmayr <tbm@cyrius.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: 584784@bugs.debian.org Patchwork: https://patchwork.linux-mips.org/patch/1377/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: Define eth platform devices in the correct orderWolfgang Grandegger2010-07-261-4/+5
| | | | | | | | | | | | | | | | | | | | | | | Currently, the eth devices are probed in the inverse order, first au1xxx_eth1_device and then au1xxx_eth0_device. On the GPR board, this makes trouble: # ifconfig|grep HWaddr eth0 Link encap:Ethernet HWaddr 00:50:C2:0C:30:01 eth1 Link encap:Ethernet HWaddr 66:22:01:80:38:10 A bogous ethernet hwaddr is assigned to the first device and au1xxx_eth0_device is mapped to eth1, which even does not work properly. With this patch, the problems are gone: # ifconfig|grep HWaddr eth0 Link encap:Ethernet HWaddr 66:22:11:32:38:10 eth1 Link encap:Ethernet HWaddr 66:22:11:32:38:11 Signed-off-by: Wolfgang Grandegger <wg@denx.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1473/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Prevent second enet registration on BCM6338Florian Fainelli2010-07-261-0/+3
| | | | | | | | | This SoC has only one ethernet MAC, so prevent registration of a second one. Signed-off-by: Florian Fainelli <florian@openwrt.org> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1482/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Quit using undefined behavior of ADDU in 64-bit atomic operations.David Daney2010-07-261-12/+12
| | | | | | | | | For 64-bit, we must use DADDU and DSUBU. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1483/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: N32: Define getdents64.Ralf Baechle2010-07-262-2/+4
| | | | | | | | As a relativly new ABI N32 should only have received the getdents64(2) but instead it only had getdents(2). This was noticed as a performance anomaly in glibc. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: MTX-1: Fix PCI on the MeshCube and related boardsBruno Randolf2010-07-261-5/+3
| | | | | | | | | | | | | | | | | | | | | This patch fixes a regression introduced by commit "MIPS: Alchemy: MTX-1: Use linux gpio api." (bb706b28bbd647c2fd7f22d6bf03a18b9552be05) which broke PCI bus operation. The problem is caused by alchemy_gpio2_enable() which resets the GPIO2 block. Two PCI signals (PCI_SERR and PCI_RST) are connected to GPIO2 and they obviously do not to like the reset. Since GPIO2 is correctly initialized by the boot monitor (YAMON) it is not necessary to call this function, so just remove it. Also replace gpio_set_value() with alchemy_gpio_set_value() to avoid problems in case gpiolib gets initialized after PCI. And since alchemy gpio_set_value() calls au_sync() we don't have to au_sync() again later. Signed-off-by: Bruno Randolf <br1@einfach.org> To: linux-mips@linux-mips.org To: manuel.lauss@googlemail.com Patchwork: https://patchwork.linux-mips.org/patch/1448/ Tested-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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