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* [MIPS] time: Helpers to compute clocksource/event shift and mult values.Ralf Baechle2007-10-191-8/+31
* [MIPS] SMTC: Build fix.Ralf Baechle2007-10-191-0/+1
* [MIPS] time: Delete dead code.Ralf Baechle2007-10-191-59/+0
* [MIPS] time: Move R4000 clockevent device code to separate configurable fileRalf Baechle2007-10-184-241/+285
* [MIPS] time: Delete dead cycles_per_jiffy, mips_timer_ack and null_timer_ackRalf Baechle2007-10-181-21/+0
* [MIPS] Always do the ARC64_TWIDDLE_PC thing.Thomas Bogendoerfer2007-10-181-11/+5
* [MIPS] Probe for usability of cp0 compare interrupt.Ralf Baechle2007-10-171-0/+47
* [MIPS] SYNC emulation for MIPS I processorsMaciej W. Rozycki2007-10-171-78/+86
* [MIPS] Fix modpost warning in raw binary builds.Ralf Baechle2007-10-171-1/+3
* remove include/asm-*/ipc.hAdrian Bunk2007-10-172-2/+2
* core_pattern: ignore RLIMIT_CORE if core_pattern is a pipeNeil Horman2007-10-171-3/+2
* Use list_head in binfmt handlingAlexey Dobriyan2007-10-171-2/+5
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/sam/kbuildLinus Torvalds2007-10-161-1/+1
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| * kbuild: enable 'make CFLAGS=...' to add additional options to CCSam Ravnborg2007-10-141-1/+1
* | Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds2007-10-164-24/+41
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| * | [MIPS] Increase cp0 compare clockevent min_delta_ns from 0x30 to 0x300.Ralf Baechle2007-10-161-1/+1
| * | [MIPS] VPE loader: convert from struct class_ device to struct deviceKay Sievers2007-10-161-12/+15
| * | [MIPS] IP22: Fix warning.Ralf Baechle2007-10-161-6/+15
| * | [MIPS] vmlinux.lds.S: Handle KPROBES_TEXT.Ralf Baechle2007-10-161-0/+1
| * | [MIPS] vmlinux.lds.S: Fix handling of .notes in final link.Ralf Baechle2007-10-161-4/+9
| * | [MIPS] vmlinux.lds.S: Remove duplicate comment.Ralf Baechle2007-10-161-1/+0
* | | Consolidate PTRACE_DETACHAlexey Dobriyan2007-10-161-4/+0
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* | [MIPS] SMP: Fix use of cpumasks.Ralf Baechle2007-10-131-3/+3
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* [MIPS] VPE: reimplement ELF loader.Ralf Baechle2007-10-111-34/+11
* [MIPS] Add BUG_ON assertion for attempt to run kernel on the wrong CPU type.Franck Bui-Huu2007-10-111-0/+8
* [MIPS] SMP: Use ISO C struct initializer for local structs.Ralf Baechle2007-10-111-10/+13
* [MIPS] SMP: Kill useless casts.Ralf Baechle2007-10-111-7/+7
* [MIPS] Kill num_online_cpus() loops.Ralf Baechle2007-10-113-16/+25
* [MIPS] SMP: Implement smp_call_function_mask().Ralf Baechle2007-10-112-40/+21
* [MIPS] Make facility to convert CPU types to strings generally available.Ralf Baechle2007-10-113-77/+94
* [MIPS] checkfiles: Fix "need space after that ','" errors.Ralf Baechle2007-10-1113-36/+36
* [MIPS] Fix "no space between function name and open parenthesis" warnings.Ralf Baechle2007-10-1122-173/+173
* [MIPS] Allow hardwiring of the CPU type to a single type for optimization.Ralf Baechle2007-10-111-3/+3
* [MIPS] i8253 PIT clocksource and clockevent driversRalf Baechle2007-10-112-0/+214
* [MIPS] Dyntick support for SMTC:Ralf Baechle2007-10-112-48/+130
* [MIPS] Implement clockevents for R4000-style cp0 count/compare interruptRalf Baechle2007-10-114-139/+124
* [MIPS] Consolidate all variants of MIPS cp0 timer interrupt handlers.Ralf Baechle2007-10-112-25/+70
* [MIPS] Switch from to_tm to rtc_time_to_tmRalf Baechle2007-10-111-49/+0
* [MIPS] Deforest the function pointer jungle in the time code.Ralf Baechle2007-10-111-31/+14
* [MIPS] Use generic NTP code for all MIPS platformsRalf Baechle2007-10-111-20/+4
* [MIPS] ARC: Get rid of mips_machgroupRalf Baechle2007-10-111-2/+0
* [MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code.Ralf Baechle2007-10-112-8/+6
* [MIPS] R3000 setup for kernel_thread()Maciej W. Rozycki2007-10-111-2/+2
* [MIPS] Introduce a consistent style for vmlinux.lds.Sam Ravnborg2007-10-111-150/+189
* [MIPS] Add GT641xx IRQ routines.Yoichi Yuasa2007-10-112-0/+132
* [MIPS] i8295 cleanups.Yoichi Yuasa2007-10-111-6/+8
* [MIPS] Kill useless volatile keywordRalf Baechle2007-10-111-2/+2
* [MIPS] cleanup struct irqaction initializersThomas Gleixner2007-10-111-1/+3
* [MIPS] Add support for BCM47XX CPUs.Aurelien Jarno2007-10-112-0/+22
* [MIPS] SMTC: Microoptimize atomic_postincrement for non-weak consistency.Ralf Baechle2007-10-111-1/+1
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