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* Merge git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2013-05-231-0/+0
|\ | | | | | | | | | | | | | | | | Pull kvm bugfixes from Gleb Natapov. * git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM/MIPS32: Wrap calls to gfn_to_pfn() with srcu_read_lock/unlock() KVM/MIPS32: Move include/asm/kvm.h => include/uapi/asm/kvm.h since it is a user visible API. KVM: take over co-maintainership from Marcelo, fix MAINTAINERS entry
| * KVM/MIPS32: Move include/asm/kvm.h => include/uapi/asm/kvm.h since it is a ↵Sanjay Lal2013-05-221-0/+0
| | | | | | | | | | | | | | user visible API. Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Signed-off-by: Gleb Natapov <gleb@redhat.com>
* | MIPS: N64: Wire getdents64(2)Aron Xu2013-05-221-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As a relatively new ABI, N64 only had getdents syscall while other modern architectures have getdents64. This was noticed when Python 3.3 shifted to the latter one for aarch64. [ralf@linux-mips.org: The history of getdents64 is a little complicated. Commit 1a1d77dd589de5a567fa95e36aa6999c704ceca4 [Merge with 2.4.0-test7.] added N64 getdents(2) to arch/mips64/kernel/scall_64.S as syscall 5213, then dropped again in 578720675c44e54e8aa7c68f6dce59ed37ce3d3b [Overhaul of the 64-bit syscall interface. Now heritage free.] for 2.5.18 in 2002.] Signed-off-by: Aron Xu <aron@debian.org> Acked-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5285/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Idle: Break r4k_wait into two functions and fix it.Ralf Baechle2013-05-221-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | local_irq_enable() may expand into very different code, so it rather should stay in C. Also this keeps the assembler code size constant which keeps the rollback code simple. So it's best to split r4k_wait into two parts, one C and one assembler. Finally add the local_irq_enable() to r4k_wait to ensure the WAIT instruction in __r4k_wait() will work properly. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Idle: Do address fiddlery in helper functions.Ralf Baechle2013-05-221-0/+11
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Idle: Consolidate all declarations in <asm/idle.h>.Ralf Baechle2013-05-222-1/+11
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: clock.h: Remove declaration of cpu_wait.Ralf Baechle2013-05-221-2/+0
| | | | | | | | | | | | Duplicate and has no business in this header file. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Rewrite pfn_valid to work in modules, too.Ralf Baechle2013-05-191-8/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes: MODPOST 393 modules ERROR: "min_low_pfn" [arch/mips/kvm/kvm.ko] undefined! make[3]: *** [__modpost] Error 1 It would have been possible to just export min_low_pfn but in the end pfn_valid should return 1 for any pfn argument for which a struct page exists so using min_low_pfn was wrong anyway. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Make virt_to_phys() work for all unmapped addresses.David Daney2013-05-172-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As reported: This problem was discovered when doing BGP traffic with the TCP MD5 option activated, where the following call chain caused a crash: * tcp_v4_rcv * tcp_v4_timewait_ack * tcp_v4_send_ack -> follow stack variable rep.th * tcp_v4_md5_hash_hdr * tcp_md5_hash_header * sg_init_one * sg_set_buf * virt_to_page I noticed that tcp_v4_send_reset uses a similar stack variable and also calls tcp_v4_md5_hash_hdr, so it has the same problem. The networking core can indirectly call virt_to_phys() on stack addresses, if this is done from PID 0, the stack will usually be in CKSEG0, so virt_to_phys() needs to work there as well Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: Jiang Liu <liuj97@gmail.com> Cc: eunb.song@samsung.com Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5220/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | Revert "MIPS: Allow ASID size to be determined at boot time."David Daney2013-05-162-60/+37
|/ | | | | | | | | | | | | | | | | | | | | | | | This reverts commit d532f3d26716a39dfd4b88d687bd344fbe77e390. The original commit has several problems: 1) Doesn't work with 64-bit kernels. 2) Calls TLBMISS_HANDLER_SETUP() before the code is generated. 3) Calls TLBMISS_HANDLER_SETUP() twice in per_cpu_trap_init() when only one call is needed. [ralf@linux-mips.org: Also revert the bits of the ASID patch which were hidden in the KVM merge.] Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: "Steven J. Hill" <Steven.Hill@imgtec.com> Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/5242/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2013-05-1052-663/+2850
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS updates from Ralf Baechle: - More work on DT support for various platforms - Various fixes that were to late to make it straight into 3.9 - Improved platform support, in particular the Netlogic XLR and BCM63xx, and the SEAD3 and Malta eval boards. - Support for several Ralink SOC families. - Complete support for the microMIPS ASE which basically reencodes the existing MIPS32/MIPS64 ISA to use non-constant size instructions. - Some fallout from LTO work which remove old cruft and will generally make the MIPS kernel easier to maintain and resistant to compiler optimization, even in absence of LTO. - KVM support. While MIPS has announced hardware virtualization extensions this KVM extension uses trap and emulate mode for virtualization of MIPS32. More KVM work to add support for VZ hardware virtualizaiton extensions and MIPS64 will probably already be merged for 3.11. Most of this has been sitting in -next for a long time. All defconfigs have been build or run time tested except three for which fixes are being sent by other maintainers. Semantic conflict with kvm updates done as per Ralf * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (118 commits) MIPS: Add new GIC clockevent driver. MIPS: Formatting clean-ups for clocksources. MIPS: Refactor GIC clocksource code. MIPS: Move 'gic_frequency' to common location. MIPS: Move 'gic_present' to common location. MIPS: MIPS16e: Add unaligned access support. MIPS: MIPS16e: Support handling of delay slots. MIPS: MIPS16e: Add instruction formats. MIPS: microMIPS: Optimise 'strnlen' core library function. MIPS: microMIPS: Optimise 'strlen' core library function. MIPS: microMIPS: Optimise 'strncpy' core library function. MIPS: microMIPS: Optimise 'memset' core library function. MIPS: microMIPS: Add configuration option for microMIPS kernel. MIPS: microMIPS: Disable LL/SC and fix linker bug. MIPS: microMIPS: Add vdso support. MIPS: microMIPS: Add unaligned access support. MIPS: microMIPS: Support handling of delay slots. MIPS: microMIPS: Add support for exception handling. MIPS: microMIPS: Floating point support. MIPS: microMIPS: Fix macro naming in micro-assembler. ...
| * Merge branch 'mti-next' of ↵Ralf Baechle2013-05-0920-135/+861
| |\ | | | | | | | | | git://git.linux-mips.org/pub/scm/sjhill/linux-sjhill into mips-for-linux-next
| | * MIPS: Add new GIC clockevent driver.Raghu Gandham2013-05-092-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | Add new clockevent driver that uses the counter present on the MIPS Global Interrupt Controller. Signed-off-by: Raghu Gandham <Raghu.Gandham@imgtec.com> Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: Formatting clean-ups for clocksources.Steven J. Hill2013-05-092-7/+2
| | | | | | | | | | | | | | | | | | Various whitespace and #ifdef removals for GIC and R4K clocksources. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: Refactor GIC clocksource code.Steven J. Hill2013-05-091-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reorganize some of the GIC clocksource driver code. Below is a list of the various changes. * No longer select CSRC_GIC by default for Malta platform. * Limit choice for either the GIC or R4K clocksource, not both. * Change location in Makefile. * Created new 'gic_read_count' function in common 'irq-gic.c' file. * Change 'git_hpt_read' function in 'csrc-gic.c' to use new function. * Surround GIC specific code in Malta platform code with #ifdef's. * Only initialize the GIC clocksource if it was selected. Original code called it unconditionally if a GIC was found. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: Move 'gic_frequency' to common location.Steven J. Hill2013-05-091-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move the global variable 'gic_frequency' to be defined in the file 'arch/mips/kernel/irq-gic.c' instead of defining it individually for each platform making use of the GIC. Also change the type to be an unsigned integer instead of signed. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: Move 'gic_present' to common location.Steven J. Hill2013-05-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move the global variable 'gic_present' to be defined in the file 'arch/mips/kernel/irq-gic.c' instead of defining it individually for each platform making use of the GIC. Also change the type to be an unsigned integer instead of signed. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: MIPS16e: Support handling of delay slots.Steven J. Hill2013-05-092-0/+21
| | | | | | | | | | | | | | | | | | | | | Add logic needed to properly calculate exceptions for delay slots when in MIPS16e mode. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: MIPS16e: Add instruction formats.Steven J. Hill2013-05-091-0/+110
| | | | | | | | | | | | | | | | | | | | | Add structures for all the MIPS16e instructions. Also add the enumerations for all the bit fields for opcodes, functions, etc. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: microMIPS: Optimise 'memset' core library function.Steven J. Hill2013-05-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Optimise 'memset' to use microMIPS instructions and/or optimisations for binary size reduction. When the microMIPS ISA is not being used, the library function compiles to the original binary code. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: microMIPS: Disable LL/SC and fix linker bug.Steven J. Hill2013-05-092-2/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Partially revert commit e0c14a260d66ba35935600d6435940a566fe806b and turn off LL/SC when building a pure microMIPS kernel. This is a temporary fix until the cmpxchg assembly macro functions are re-written to not use the HI/LO registers in address calculations. Also add .insn in selected user access functions which would otherwise produce ISA mode jump incompatibilities. This is also a temporary fix. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: microMIPS: Support handling of delay slots.Leonid Yegoshin2013-05-091-5/+17
| | | | | | | | | | | | | | | | | | | | | | | | Add logic needed to properly calculate exceptions for delay slots when in microMIPS mode. Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: microMIPS: Add support for exception handling.Steven J. Hill2013-05-092-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | All exceptions must be taken in microMIPS mode, never in classic MIPS mode or the kernel falls apart. A few NOP instructions are used to maintain the correct alignment of microMIPS versions of the exception vectors. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: microMIPS: Floating point support.Leonid Yegoshin2013-05-093-0/+20
| | | | | | | | | | | | | | | | | | | | | Add logic needed to do floating point emulation in microMIPS mode. Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by: Steven J. Hill <Steven. Hill@imgtec.com>
| | * MIPS: microMIPS: Fix macro naming in micro-assembler.Steven J. Hill2013-05-091-2/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The macros did not properly take into account the ISA that the kernel was being compiled with. A classic MIPS kernel will have the standard 'uasm_i_##op' macro functions with 'MM_uasm_i_##op' macro functions for the microMIPS version. A pure microMIPS kernel will have the standard macros with 'CL_uasm_i_##op' macro functions for the classic version. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: Allow ASID size to be determined at boot time.Steven J. Hill2013-05-081-36/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Original patch by Ralf Baechle and removed by Harold Koerfgen with commit f67e4ffc79905482c3b9b8c8dd65197bac7eb508. This allows for more generic kernels since the size of the ASID and corresponding masks can be determined at run-time. This patch is also required for the new Aptiv cores and has been tested on Malta and Malta Aptiv platforms. [ralf@linux-mips.org: Added relevant part of fix https://patchwork.linux-mips.org/patch/5213/] Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * MIPS: FW: Remove obsolete header file for MTI platforms.Steven J. Hill2013-05-081-47/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove 'arch/mips/include/asm/mips-boards/prom.h' and get rid of all inclusions of it by Malta and SEAD-3 platforms. [ralf@linux-mips.org: Fold in John Crispin <blogic@openwrt.org>'s "MIPS: ar7 powertv build"]. [ralf@linux-mips.org: Fold in John Crispin <blogic@openwrt.org>'s "MIPS: unbreak powertv build"]. [ralf@linux-mips.org: Test. Build. Your. Fscking. Code. Or...] Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: FW: Add environment variable processing.Steven J. Hill2013-05-081-0/+47
| | | | | | | | | | | | | | | | | | | | | Add parsing of the environment and command line variables passed to the kernel to the firmware library. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: Add declarations to MIPS Technologies Inc. generic header.Steven J. Hill2013-05-081-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | Add declaration of 'mips_scroll_message' and 'mips_display_message' to the common generic header file for the MIPS Technologies Inc. development boards. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: Add option to disable software I/O coherency.Steven J. Hill2013-05-013-3/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | Some MIPS controllers have hardware I/O coherency. This patch detects those and turns off software coherency. A new kernel command line option also allows the user to manually turn software coherency on or off. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: microMIPS: Add instruction utility macros.Steven J. Hill2013-05-011-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add two new macros for microMIPS. One checks if an exception was taken in either microMIPS or classic MIPS mode. The other checks if a microMIPS instruction is 16-bit or 32-bit in length. [ralf@linux-mips.org: Removed unnecessary parenthesis as noted by Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>] Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: kevink@paralogos.com Cc: ddaney.cavm@gmail.com Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Patchwork: https://patchwork.linux-mips.org/patch/4924/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> (cherry picked from commit 49df26472338b935fd5781bf94a77a88b148a716)
| | * MIPS: microMIPS: uasm: Add microMIPS micro assembler support.Steven J. Hill2013-05-011-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add new file 'uasm-micromips.c' that allows the micro assembler to generate microMIPS ISA code. It can be included in the kernel alongside the classic ISA as long as the platform supports the microMIPS ISA. Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: kevink@paralogos.com Cc: ddaney.cavm@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/4923/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> (cherry picked from commit 5f011a866afbd03a5379f67f4e70e5efbdfc16e9)
| | * MIPS: microMIPS: uasm: Split 'uasm.c' into two files.Steven J. Hill2013-05-011-24/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Split 'uasm.c' into two files. The new file 'uasm-mips.c' has the functions specific to the classic MIPS ISA. The 'uasm.c' file contains common code that can be used by classic or other ISAs that could be supported by the kernel. Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: kevink@paralogos.com Cc: ddaney.cavm@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/4922/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> (cherry picked from commit 0961103562ab958fa74f35043bf4f72e51ed6155)
| | * MIPS: microMIPS: Add instruction formats.Steven J. Hill2013-05-011-0/+449
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add structures for all the microMIPS instructions. Also add the enumerations for all the bit fields for opcodes, functions, etc. Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: kevink@paralogos.com Cc: ddaney.cavm@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/4921/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> (cherry picked from commit d7f19e43a4337d4d40ff5e241172912130d06a4c)
| * | Merge branch 'next/kvm' into mips-for-linux-nextRalf Baechle2013-05-098-4/+752
| |\ \
| | * | MIPS: If KVM is enabled then use the KVM specific routine to flush the TLBs ↵Sanjay Lal2013-05-081-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | on a ASID wrap. Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * | KVM/MIPS32: KVM Guest kernel support.Sanjay Lal2013-05-083-2/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both Guest kernel and Guest Userspace execute in UM. The memory map is as follows: Guest User address space: 0x00000000 -> 0x40000000 Guest Kernel Unmapped: 0x40000000 -> 0x60000000 Guest Kernel Mapped: 0x60000000 -> 0x80000000 - Guest Usermode virtual memory is limited to 1GB. Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * | KVM/MIPS32: Arch specific KVM data structures.Sanjay Lal2013-05-082-0/+722
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * | MIPS: IP27: Remove pfn_t.Ralf Baechle2013-05-082-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the Linux kernel traditionally pfns are represented by an unsigned long. However a few bits of the SGI IP27 platform code that were ported from IRIX are using pfn_t for historic reasons. This is conflicting with KVM's use of pfn_t. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | Merge branch 'mips-next-3.10' of ↵Ralf Baechle2013-05-0827-263/+1057
| |\ \ \ | | | | | | | | | | | | | | | git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next
| | * | | MIPS: ralink: add memory definition for MT7620John Crispin2013-05-081-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Populate struct soc_info with the data that describes our RAM window. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5183/
| | * | | MIPS: ralink: add memory definition for RT3883John Crispin2013-05-081-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Populate struct soc_info with the data that describes our RAM window. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5182/
| | * | | MIPS: ralink: add memory definition for RT2880John Crispin2013-05-081-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Populate struct soc_info with the data that describes our RAM window. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5181/
| | * | | MIPS: ralink: add memory definition for RT305xJohn Crispin2013-05-081-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Populate struct soc_info with the data that describes our RAM window. As memory detection fails on RT5350 we read the amount of available memory from the system controller. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5180/
| | * | | MIPS: add detect_memory_region()John Crispin2013-05-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a generic way of detecting the available RAM. This function is based on the implementation already used by ath79. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5178/
| | * | | MIPS: ralink: add cpu-feature-overrides.hGabor Juhos2013-05-083-0/+167
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add cpu-feature-overrides.h for RT288x, RT305x and RT3883. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5175/
| | * | | MIPS: ralink: adds support for MT7620 SoC familyJohn Crispin2013-05-081-0/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support code for mt7620 SOC. The code detects the SoC and registers the clk / pinmux settings. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5177/
| | * | | MIPS: ralink: adds support for RT3883 SoC familyJohn Crispin2013-05-081-0/+248
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support code for rt3883 SOC. The code detects the SoC and registers the clk / pinmux settings. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5185/
| | * | | MIPS: ralink: adds support for RT2880 SoC familyJohn Crispin2013-05-081-0/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support code for rt2880 SOC. The code detects the SoC and registers the clk / pinmux settings. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5176/
| | * | | MIPS: ralink: add RT5350 sdram register definesJohn Crispin2013-05-081-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a few missing defines that are needed to make memory detection work on the RT5350. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5169/
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