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* MIPS: Code clean-ups for the GIC.Steven J. Hill2012-09-131-10/+10
| | | | | | Fix whitespace, beautify the code and remove debug statements. Signed-off-by: Steven J. Hill <sjhill@mips.com>
* MIPS: Make GIC code platform independent.Steven J. Hill2012-09-131-0/+29
| | | | | | | | The GIC interrupt code is used by multiple platforms and the current code was half Malta dependent code. These changes abstract away the platform specific differences. Signed-off-by: Steven J. Hill <sjhill@mips.com>
* MIPS: Clean-up GIC and vectored interrupts.Steven J. Hill2012-07-061-1/+14
| | | | | | | | | | | This change adds macros for routing of GIC interrupts for EIC and non-EIC hardware modes. Also added Malta GIC macros having to do with performance and timer interrupts. Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3576/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: GIC: Remove dependencies from Malta files.Ralf Baechle2010-10-041-0/+1
| | | | | | This prevents the GIC code from being reusable sanely. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: GIC: Random fixes and enhancements.Chris Dearman2009-11-021-170/+18
| | | | | Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Fix compile for !CONFIG_SMPAlexander Clouter2009-08-031-1/+1
| | | | | | | | Commit fc03bc1715ca0ad4ccfe97aab16bcc9e7129c1a4 breaks compiling MIPS with SMP disabled. This patch fixes that. Signed-off-by: Alexander Clouter <alex@digriz.org.uk> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: CMP: activate CMP supportTim Anderson2009-07-031-0/+2
| | | | | | | | | Most of the CMP support was added before, this mostly correct compile problems but adds a platform specific translation for the interrupt number based on cpu number. Signed-off-by: Tim Anderson <tanderson@mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: CMP: Extend the GIC IPI interrupts beyond 32Tim Anderson2009-07-031-0/+4
| | | | | | | | | This patch extends the GIC interrupt handling beyond the current 32 bit range as well as extending the number of interrupts based on the number of CPUs. Signed-off-by: Tim Anderson <tanderson@mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Move headfiles to new location below arch/mips/includeRalf Baechle2008-10-111-0/+487
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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