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* cpuidle: remove en_core_tk_irqen flagDaniel Lezcano2013-04-2314-14/+0
| | | | | | | | | | | The en_core_tk_irqen flag is set in all the cpuidle driver which means it is not necessary to specify this flag. Remove the flag and the code related to it. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Kevin Hilman <khilman@linaro.org> # for mach-omap2/* Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* ARM: OMAP3: remove cpuidle_wrap_enterDaniel Lezcano2013-04-221-21/+9
| | | | | | | | | | | | | | | | | | | In a previous commit the en_core_tk_irqen flag has been added but we missed the cpuidle_wrap_enter which was doing the job to measure the time for the 'omap3_enter_idle' function. Actually, I don't see any reason to use this wrapper in the code. In the better case, the time computation is not correctly done because of the different operations done in omap3_enter_idle_bm which were not taken into account before the en_core_tk_irqen flag was set. As the time is reflected for the state overridden by the omap3_enter_idle_bm, using the wrapper is pointless now, so removing it. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Kevin Hilman <khilman@linaro.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* ARM: shmobile: cpuidle: remove shmobile_enter_wfi prototypeDaniel Lezcano2013-04-221-3/+0
| | | | | | | | | | | | | | | Commit 688036b538974de32ce55be8b0e013b003992abc removed the function 'shmobile_enter_wfi' but we forgot to remove the definition in the header file. Note this function is just an alias to 'cpu_do_idle()' wrapped into a cpuidle function callback prototype which already exists with the default WFI state and the arm_simple_enter function. Remove the function prototype. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* ARM: shmobile: cpuidle: remove shmobile_enter_wfi functionDaniel Lezcano2013-04-221-1/+0
| | | | | | | | | | | Remove the shmobile_enter_wfi function which is the same as the common WFI enter function from the arm cpuidle driver defined with the ARM_CPUIDLE_WFI_STATE macro. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* Merge tag 'omap-pm-v3.10/cleanup/cpuidle-v2' of ↵Rafael J. Wysocki2013-04-1049-171/+416
|\ | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into pm-cpuidle OMAP CPUidle cleanups for v3.10 from Kevin Hilman
| * ARM: OMAP4+: CPUidle: Consolidate idle driver for OMAP5 supportSantosh Shilimkar2013-04-091-15/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | The OMAP5 idle driver can re-use most of OMAP4 CPUidle driver implementation. Also the next derivative SOCs are going to re-use the MPUSS so, same driver with minor updates can be re-used. Prepare the code so that its easier to add CPUidle support for OMAP5 devices. Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
| * ARM: OMAP4+: CPUidle: Deprecate use of omap4_mpuss_read_prev_context_state()Santosh Shilimkar2013-04-093-20/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current OMAP4 CPUIdle driver is using omap4_mpuss_read_prev_context_state() to check whether the MPU cluster lost context or not before calling cpu_cluster_pm_exit(). This was initially done an optimization for corner cases, where if the cluster low power entry fails for some reason, the cluster context restore gets skipped. However, since reading the previous context is expensive (involving slow accesses to the PRCM), it's better to avoid it and simply check the target cluster state instead. Moving forward, OMAP CPUidle drivers needs to be moved to drivers/idle/* once the PRM/CM code gets moved to drivers. This patch also reduces one dependency with platform code for idle driver movement. Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [khilman@linaro.org: minor changelog edits] Signed-off-by: Kevin Hilman <khilman@linaro.org>
| * ARM: OMAP4: CPUidle: Make C-state description field more preciseSantosh Shilimkar2013-04-091-3/+3
| | | | | | | | | | | | | | | | | | | | | | It is useful to know the CPU power state along with MPUSS power state in a supported C-state. Since the data is available via sysfs, one can avoid scrolling the source code for precise construction of C-state. Reported-by: Nishanth Menon <nm@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
| * ARM: OMAP: CPUidle: Unregister drivere on device registration failureSantosh Shilimkar2013-04-092-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | If the CPUidle device registration fails for some reason, we should unregister the driver on error path. Fix the code accordingly. Also when at it, check of the driver registration failure too. Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
| * ARM: OMAP4: CPUidle: Avoid double idle driver registrationSantosh Shilimkar2013-04-091-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | OMAP4 CPUidle driver registration call is under a loop which leads to calling cpuidle_register_driver twice which is not intended. Fix it by moving the driver registration outside the loop. Reported-by: Nishanth Menon <nm@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
| * ARM: omap3: cpuidle: enable time keepingDaniel Lezcano2013-04-091-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | The TIME_VALID flag is specified for the different states but the time residency computation is not done, no tk flag, no time computation in the idle function. Set the en_core_tk_irqen flag to activate it. Cc: stable@vger.kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
| * Merge branch 'pm-cpuidle-next' into linux-nextRafael J. Wysocki2013-04-084-66/+8
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * pm-cpuidle-next: cpuidle: imx6: remove timer broadcast initialization cpuidle: OMAP4: remove timer broadcast initialization cpuidle: ux500: remove timer broadcast initialization cpuidle: initialize the broadcast timer framework timer: move enum definition out of ifdef section cpuidle: kirkwood: fix coccicheck warnings cpuidle / kirkwood: remove redundant Kconfig option cpuidle / ux500 : use CPUIDLE_FLAG_TIMER_STOP flag cpuidle / imx6 : use CPUIDLE_FLAG_TIMER_STOP flag cpuidle / omap4 : use CPUIDLE_FLAG_TIMER_STOP flag cpuidle : handle clockevent notify from the cpuidle framework
| * \ Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds2013-04-0317-72/+230
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM fixes from Russell King: "Another round of ARM fixes, which include: - Fixing a problem with LPAE mapping sections - Reporting of some hwcaps on Krait CPUs - Avoiding repetitive warnings in the breakpoint code - Fixing a build error noticed on Dove platforms with PJ4 CPUs - Fix masking of level 2 cache revision. - Fixing timer-based udelay() - A larger fix for an erratum causing people major grief with Cortex A15 CPUs" * 'fixes' of git://git.linaro.org/people/rmk/linux-arm: ARM: 7690/1: mm: fix CONFIG_LPAE typos ARM: 7689/1: add unwind annotations to ftrace asm ARM: 7685/1: delay: use private ticks_per_jiffy field for timer-based delay ops ARM: 7684/1: errata: Workaround for Cortex-A15 erratum 798181 (TLBI/DSB operations) ARM: 7682/1: cache-l2x0: fix masking of RTL revision numbering and set_debug init ARM: iWMMXt: always enable iWMMXt support with PJ4 CPUs ARM: 7681/1: hw_breakpoint: use warn_once to avoid spam from reset_ctrl_regs() ARM: 7678/1: Work around faulty ISAR0 register in some Krait CPUs ARM: 7680/1: Detect support for SDIV/UDIV from ISAR0 register ARM: 7679/1: Clear IDIVT hwcap if CONFIG_ARM_THUMB=n ARM: 7677/1: LPAE: Fix mapping in alloc_init_section for unaligned addresses ARM: KVM: vgic: take distributor lock on sync_hwstate path ARM: KVM: vgic: force EOIed LRs to the empty state
| | * | ARM: 7690/1: mm: fix CONFIG_LPAE typosPaul Bolle2013-04-032-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_LPAE doesn't exist: the correct option is CONFIG_ARM_LPAE, so fix up the two typos under arch/arm/. The fix to head.S is slightly scary, but this is just for setting up an early io-mapping for the serial port when running on a big-endian, LPAE system. Since these systems don't exist in the wild (at least, I have no access to one outside of kvmtool, which doesn't provide a serial port suitable for earlyprintk), then we can revisit the code later if it causes any problems. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 7689/1: add unwind annotations to ftrace asmRabin Vincent2013-04-031-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add unwind annotations to the ftrace assembly code so that the function tracer's stacktracing options (func_stack_trace, etc.) work when CONFIG_ARM_UNWIND is enabled. Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 7685/1: delay: use private ticks_per_jiffy field for timer-based delay opsWill Deacon2013-04-033-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 70264367a243 ("ARM: 7653/2: do not scale loops_per_jiffy when using a constant delay clock") fixed a problem with our timer-based delay loop, where loops_per_jiffy is scaled by cpufreq yet used directly by the timer delay ops. This patch fixes the problem in a more elegant way by keeping a private ticks_per_jiffy field in the delay ops, independent of loops_per_jiffy and therefore not subject to scaling. The loop-based delay continues to use loops_per_jiffy directly, as it should. Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 7684/1: errata: Workaround for Cortex-A15 erratum 798181 (TLBI/DSB ↵Catalin Marinas2013-04-036-1/+102
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | operations) On Cortex-A15 (r0p0..r3p2) the TLBI/DSB are not adequately shooting down all use of the old entries. This patch implements the erratum workaround which consists of: 1. Dummy TLBIMVAIS and DSB on the CPU doing the TLBI operation. 2. Send IPI to the CPUs that are running the same mm (and ASID) as the one being invalidated (or all the online CPUs for global pages). 3. CPU receiving the IPI executes a DMB and CLREX (part of the exception return code already). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 7682/1: cache-l2x0: fix masking of RTL revision numbering and set_debug ↵Rob Herring2013-04-031-7/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | init Commit b8db6b8 (ARM: 7547/4: cache-l2x0: add support for Aurora L2 cache ctrl) moved the masking of the part ID which caused the RTL version to be lost. Commit 6248d06 (ARM: 7545/1: cache-l2x0: make outer_cache_fns a field of l2x0_of_data) changed how .set_debug is initialized. Both commits break commit 74ddcdb (ARM: 7608/1: l2x0: Only set .set_debug on PL310 r3p0 and earlier) which uses the RTL version to conditionally set .set_debug function pointer. Commit b8db6b8 also caused the printed cache ID to be missing the version information. Fix this by reverting how the part number is masked so the RTL version info is maintained. The cache-id-part DT property does not set the RTL bits so masking them should have no effect. Also, re-arrange the order of the function pointer init so the .set_debug function can be overridden. Reported-by: Paolo Pisati <paolo.pisati@canonical.com> Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Yehuda Yitschak <yehuday@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: iWMMXt: always enable iWMMXt support with PJ4 CPUsRussell King2013-04-031-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Jason Cooper reports these build errors: arch/arm/kernel/built-in.o: In function `iwmmxt_do': /.../arch/arm/kernel/pj4-cp0.c:36: undefined reference to `iwmmxt_task_release' /.../arch/arm/kernel/pj4-cp0.c:40: undefined reference to `iwmmxt_task_switch' make: *** [vmlinux] Error 1 This is caused because the PJ4 code explicitly references the iWMMXt code, but doesn't require it to be built. Fix this by ensuring that iWMMXt is always enabled with PJ4. Reported-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 7681/1: hw_breakpoint: use warn_once to avoid spam from reset_ctrl_regs()Santosh Shilimkar2013-03-221-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CPU debug features like hardware break, watchpoints can be used only when the debug mode is enabled and available. Unfortunately on OMAP4 based devices, after a CPU power cycle, the debug feature gets disabled which leads to a flood of messages coming from reset_ctrl_regs() which gets called on every CPU_PM_EXIT with CPUidle enabled. So make use of warn_once() so that system is usable. Thanks to Will for pointers and Lokesh for the analysis of the issue. Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 7678/1: Work around faulty ISAR0 register in some Krait CPUsStepan Moskovchenko2013-03-221-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some early versions of the Krait CPU design incorrectly indicate that they only support the UDIV and SDIV instructions in Thumb mode when they actually support them in ARM and Thumb mode. It seems that these CPUs follow the DDI0406B ARM ARM which has two possible values for the divide instructions field, instead of the DDI0406C document which has three possible values. Work around this problem by checking the MIDR against Krait CPUs with this faulty ISAR0 register and force the hwcaps to indicate support in both modes. [sboyd: Rewrote commit text to reflect real reasoning now that we autodetect udiv/sdiv] Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 7680/1: Detect support for SDIV/UDIV from ISAR0 registerStephen Boyd2013-03-222-2/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ISAR0 register indicates support for the SDIV and UDIV instructions in both the Thumb and ARM instruction set. Read the register to detect the supported instructions and update the elf_hwcap mask as appropriate. This is better than adding more and more cpuid checks in proc-v7.S for each new cpu variant that supports these instructions. Acked-by: Will Deacon <will.deacon@arm.com> Cc: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 7679/1: Clear IDIVT hwcap if CONFIG_ARM_THUMB=nStephen Boyd2013-03-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't advertise support for the SDIV/UDIV thumb instructions if the kernel is not compiled with support for thumb userspace. This is in line with how we remove the THUMB hwcap in these configurations. Acked-by: Will Deacon <will.deacon@arm.com> Cc: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 7677/1: LPAE: Fix mapping in alloc_init_section for unaligned addressesSricharan R2013-03-221-26/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With LPAE enabled, alloc_init_section() does not map the entire address space for unaligned addresses. The issue also reproduced with CMA + LPAE. CMA tries to map 16MB with page granularity mappings during boot. alloc_init_pte() is called and out of 16MB, only 2MB gets mapped and rest remains unaccessible. Because of this OMAP5 boot is broken with CMA + LPAE enabled. Fix the issue by ensuring that the entire addresses are mapped. Signed-off-by: R Sricharan <r.sricharan@ti.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Christoffer Dall <chris@cloudcar.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Laura Abbott <lauraa@codeaurora.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Christoffer Dall <chris@cloudcar.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | Merge branch 'kvm-arm/vgic-fixes' of ↵Russell King2013-03-221-21/+14
| | |\ \ | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into fixes
| | | * | ARM: KVM: vgic: take distributor lock on sync_hwstate pathMarc Zyngier2013-02-221-18/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the maintenance interrupt handling is actually out of the handler itself, the code becomes quite racy as we can get preempted while we process the state. Wrapping this code around the distributor lock ensures that we're not preempted and relatively race-free. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
| | | * | ARM: KVM: vgic: force EOIed LRs to the empty stateMarc Zyngier2013-02-221-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The VGIC doesn't guarantee that an EOIed LR that has been configured to generate a maintenance interrupt will appear as empty. While the code recovers from this situation, it is better to clean the LR and flag it as empty so it can be quickly recycled. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
| * | | | Merge tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2013-04-0229-58/+154
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM SoC bug fixes from Arnd Bergmann: "After a quiet set of fixes for 3.9-rc4, a lot of people woke up and sent urgent fixes for 3.9. I pushed back on a number of them that got deferred to 3.10, but these are the ones that seemed important. Regression in 3.9: - Multiple regressions in OMAP2+ clock cleanup - SH-Mobile frame buffer bug fix that merged here because of maintainer MIA - ux500 prcmu changes broke DT booting - MMCI duplicated regulator setup on ux500 - New ux500 clock driver broke ethernet on snowball - Local interrupt driver for mvebu broke ethernet - MVEBU GPIO driver did not get set up right on Orion DT - incorrect interrupt number on Orion crypto for DT Long-standing bugs, including candidates for stable: - Kirkwood MMC needs to disable invalid card detect pins - MV SDIO pinmux was wrong on Mirabox - GoFlex Net board file needs to set NAND chip delay - MSM timer restart race - ep93xx early debug code broke in 3.7 - i.MX CPU hotplug race - Incorrect clock setup for OMAP1 USB - Workaround for bad clock setup by some old OMAP4 boot loaders - Static I/O mappings on cns3xxx since 3.2" * tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: cns3xxx: fix mapping of private memory region arm: mvebu: Fix pinctrl for Armada 370 Mirabox SDIO port. arm: orion5x: correct IRQ used in dtsi for mv_cesa arm: orion5x: fix orion5x.dtsi gpio parameters ARM: Kirkwood: fix unused mvsdio gpio pins arm: mvebu: Use local interrupt only for the timer 0 ARM: kirkwood: Fix chip-delay for GoFlex Net ARM: ux500: Enable the clock controlling Ethernet on Snowball ARM: ux500: Stop passing ios_handler() as an MMCI power controlling call-back ARM: ux500: Apply the TCPM and TCDM locations and sizes to dbx5x0 DT fbdev: sh_mobile_lcdc: fixup B side hsync adjust settings ARM: OMAP: clocks: Delay clk inits atleast until slab is initialized ARM: imx: fix sync issue between imx_cpu_die and imx_cpu_kill ARM: msm: Stop counting before reprogramming clockevent ARM: ep93xx: Fix wait for UART FIFO to be empty ARM: OMAP4: PM: fix PM regression introduced by recent clock cleanup ARM: OMAP3: hwmod data: keep MIDLEMODE in force-standby for musb ARM: OMAP4: clock data: lock USB DPLL on boot ARM: OMAP1: fix USB host on 1710
| | * \ \ \ Merge tag 'v3.9-rc1_cns3xxx_fixes' of ↵Arnd Bergmann2013-04-022-21/+11
| | |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.infradead.org/users/cbou/linux-cns3xxx into fixes From Anton Vorontsov <anton@enomsg.org>: This tag includes Mac Lin's work to revive CNS3xxx booting: "Since commit 0536bdf33faf (ARM: move iotable mappings within the vmalloc region), [...] the pre-defined iotable mappings is not in the vmalloc region. [...] move the iotable mappings into the vmalloc region, and merge the MPCore private memory region (containing the SCU, the GIC and the TWD) as a single region." Plus there is a small cosmetic fix, also from Mac Lin. * tag 'v3.9-rc1_cns3xxx_fixes' of git://git.infradead.org/users/cbou/linux-cns3xxx: ARM: cns3xxx: fix mapping of private memory region [arnd: dropped the cosmetic fix from the merge as it is not needed for 3.9] Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | | * | | | ARM: cns3xxx: fix mapping of private memory regionMac Lin2013-03-302-21/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 0536bdf33faf (ARM: move iotable mappings within the vmalloc region), the Cavium CNS3xxx cannot boot anymore. This is caused by the pre-defined iotable mappings is not in the vmalloc region. This patch move the iotable mappings into the vmalloc region, and merge the MPCore private memory region (containing the SCU, the GIC and the TWD) as a single region. Signed-off-by: Mac Lin <mkl0301@gmail.com> Signed-off-by: Anton Vorontsov <anton@enomsg.org> Cc: stable@vger.kernel.org [v3.3+]
| | * | | | | Merge tag 'mvebu_fixes_for_v3.9_round2' of ↵Arnd Bergmann2013-03-298-6/+24
| | |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.infradead.org/users/jcooper/linux into fixes From Jason Cooper <jason@lakedaemon.net>: mvebu fixes for v3.9 (round 2) - mvebu - interrupt fix - DT pinctrl definition for sdio - kirkwood - chip-delay for GoFlex Net (fix reading nand) - set mvsdio unused pins to invalid value for legacy boards (0 is valid) - orion5x - fix typo in gpio parameters - use correct irq in dtsi * tag 'mvebu_fixes_for_v3.9_round2' of git://git.infradead.org/users/jcooper/linux: arm: mvebu: Fix pinctrl for Armada 370 Mirabox SDIO port. arm: orion5x: correct IRQ used in dtsi for mv_cesa arm: orion5x: fix orion5x.dtsi gpio parameters ARM: Kirkwood: fix unused mvsdio gpio pins arm: mvebu: Use local interrupt only for the timer 0 ARM: kirkwood: Fix chip-delay for GoFlex Net Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | | * | | | | arm: mvebu: Fix pinctrl for Armada 370 Mirabox SDIO port.Ryan Press2013-03-282-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The previous configuration used the wrong "clk" pin. Without this change mv_sdio worked because the bootloader would set the pin up, but with a bootloader that does not set the pin, mv_sdio fails to detect any card. I have tested this change using a mwifiex_sdio wireless network adapter over the SDIO interface. Signed-off-by: Ryan Press <ryan@presslab.us> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | | * | | | | arm: orion5x: correct IRQ used in dtsi for mv_cesaAlexander Clouter2013-03-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The crypto functionality in the orion5x dtsi uses the Ethernet IRQ and so things do not work and there is much grumbling at boot time. The IRQ for the crypto should be 28, and not 22, and that is what this patch corrects. Signed-off-by: Alexander Clouter <alex@digriz.org.uk> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | | * | | | | arm: orion5x: fix orion5x.dtsi gpio parametersAlexander Clouter2013-03-281-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | orion5x.dtsi is missing the gpio alias as well as including a typo ('ngpio' instead of 'ngpios') that prevented the orion-gpio driver from loading. Also missing were the interrupt-controller properties. This patches resolves those glitches. Signed-off-by: Alexander Clouter <alex@digriz.org.uk> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | | * | | | | ARM: Kirkwood: fix unused mvsdio gpio pinsSebastian Hesselbarth2013-03-283-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mvsdio_platform_data allows to pass card detect and write protect gpio numbers to the driver. Some kirkwood boards don't use both pins as they are not connected, and don't set the corresponding value in platform_data. This will leave the unset values in platform_data initialized as 0, which is in fact a valid gpio pin. mvsdio will grab that pin and configure it as gpio, which in turn breaks nand controller as mpp0 also carries nand_io2. This patch fixes the above by initializing unused gpio functions in the platform_data with an invalid (-1) value. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Reported-by: Soeren Moch <smoch@web.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | | * | | | | arm: mvebu: Use local interrupt only for the timer 0Gregory CLEMENT2013-03-281-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit 3a6f08a37 "arm: mvebu: Add support for local interrupt", managed the 28th first interrupts as local interrupt to match the hardware specification. Among these interrupts there are the Gigabits Ethernet ones used by the mvneta driver. Unfortunately the state of the percpu_irq API prevents the driver to use it. Indeed the interrupts have to be freed when the .stop() function is called. As the free_percpu_irq() function don't disable the interrupt line, we have to do it on each CPU before calling this. The function disable_percpu_irq() only disable the percpu on the current CPU and there is no function which allows to disable a percpu irq on a given CPU. Waiting for the extension of the percpu_irq API, this fix allows to use again the mvneta driver. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | | * | | | | ARM: kirkwood: Fix chip-delay for GoFlex NetEric Hutter2013-03-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes "Too few good blocks within range" issues on GoFlex Net by setting chip-delay to 40. The basic problem was discussed at http://forum.doozan.com/read.php?2,7451 Signed-off-by: Eric Hutter <hutter.eric@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Cc: <stable@vger.kernel.org> # v3.6.x Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * | | | | | Merge tag 'ep93xx-fixes-for-3.9-rc5' of ↵Arnd Bergmann2013-03-281-3/+7
| | |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://github.com/RyanMallon/linux-ep93xx into fixes From Ryan Mallon <rmallon@gmail.com>: It is a regression fix for some ep93xx boards which are failing to boot on current mainline. The patch has been tested in next over the last few days. * tag 'ep93xx-fixes-for-3.9-rc5' of git://github.com/RyanMallon/linux-ep93xx: ARM: ep93xx: Fix wait for UART FIFO to be empty Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | | * | | | | | ARM: ep93xx: Fix wait for UART FIFO to be emptyH Hartley Sweeten2013-03-181-3/+7
| | | | |/ / / / | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 210dce5f "ARM: ep93xx: properly wait for UART FIFO to be empty" Removed the timeout loop while waiting for the uart transmit fifo to empty. Some bootloaders leave the uart in a state where there might be bytes in the uart that are not transmitted when execution is handed over to the kernel. This results in a deadlocked system while waiting for the fifo to empty. Add back the timeout wait to prevent the deadlock. Increase the wait time to hopefully prevent the decompressor corruption that lead to commit 210dce5f. This corruption was probably due to a slow uart baudrate. The 10* increase in the wait time should be enough for all cases. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ryan Mallon <rmallon@gmail.com>
| | * | | | | | Merge tag 'imx-fixes-3.9-4' of ↵Arnd Bergmann2013-03-284-0/+27
| | |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.linaro.org/people/shawnguo/linux-2.6 into fixes From Shawn Guo <shawn.guo@linaro.org>: The imx fixes for 3.9, take 4: Running suspend/resume without no_console_suspend setting on kernel cmdline will likely makes system hang. It causesd by the sync issue between imx_cpu_die() and imx_cpu_kill() call. Fix the issue by synchronizing the calls using cpu jumping argument register which is free to use in kernel. * tag 'imx-fixes-3.9-4' of git://git.linaro.org/people/shawnguo/linux-2.6: ARM: imx: fix sync issue between imx_cpu_die and imx_cpu_kill ARM: imx: add dependency check for DEBUG_IMX_UART_PORT Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | | * | | | | | ARM: imx: fix sync issue between imx_cpu_die and imx_cpu_killShawn Guo2013-03-263-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a sync issue with hotplug operation. It's possible that when imx_cpu_kill gets running on primary core, the imx_cpu_die execution on the core which is to be killed hasn't been finished yet. The problem will very likely be hit when running suspend without no_console_suspend setting on kernel cmdline. It uses cpu jumping argument register to sync imx_cpu_die and imx_cpu_kill. The register will be set in imx_cpu_die and imx_cpu_kill will wait for the register being cleared to actually kill the cpu. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: <stable@vger.kernel.org>
| | * | | | | | | Merge tag 'ux500-fixes-for-v3.9' of ↵Arnd Bergmann2013-03-275-5/+18
| | |\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into fixes From Linus Walleij <linus.walleij@stericsson.com>: Fixes boot regressions on Device Tree: - Get TCPM and TCDM locations from the device tree - Skip passing the ios_handler for the MMCI - Enable the ethernet clock for Snowball * tag 'ux500-fixes-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: ARM: ux500: Enable the clock controlling Ethernet on Snowball ARM: ux500: Stop passing ios_handler() as an MMCI power controlling call-back ARM: ux500: Apply the TCPM and TCDM locations and sizes to dbx5x0 DT Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | | * | | | | | | ARM: ux500: Enable the clock controlling Ethernet on SnowballLee Jones2013-03-273-2/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes a regression introduced by common clk enablement. On some u8500 based boards, the FMSC clock which is usually used for flash, is wired up to the SMSC911x Ethernet driver. However, the SMSC911x doesn't have common clk support yet, rendering it unusable. Prior to the introduction of common clk the FMSC clock was default on; however, common clk disables all clocks by default and insists drivers take responsibility to enable theirs. This fix enables the FMSC clock on Snowball, subsequently turning on the SMSC911x Ethernet chip. It will be removed when the driver is compatible with common clk. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | | * | | | | | | ARM: ux500: Stop passing ios_handler() as an MMCI power controlling call-backLee Jones2013-03-271-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes a regression introduced during the v3.9 merge window. Now MMCI on/off functionality is using the regulator framework from the MMCI driver, if we provide the ios_handler call-back we essentially duplicate functionality, which causes a large mess and lots of booting issues. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | | * | | | | | | ARM: ux500: Apply the TCPM and TCDM locations and sizes to dbx5x0 DTLee Jones2013-03-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes a regression introduced by commit: 05ec260 mfd:db8500-prcmu: update resource passing All DBx5x0 based SoCs have access to two Tightly Coupled Memory (TCM) locations based on the PRCMU itself. One area from program memory (TCPM) and one for data memory (TCDM). The PRCMU needs to know where these are in order to function correctly. However, these are currently passed though platform device resources, which can only be obtained if Device Tree booting isn't in use. Thus we must also support them in DT by supplying them through the PRCMU node. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | | | | | | Merge tag 'omap-for-v3.9-rc3/fixes-signed' of ↵Arnd Bergmann2013-03-279-22/+64
| | |\ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes From Tony Lindgren <tony@atomide.com>: A clock regression fix that happened with the common clock conversion, and few USB regression fixes. * tag 'omap-for-v3.9-rc3/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP: clocks: Delay clk inits atleast until slab is initialized ARM: OMAP4: PM: fix PM regression introduced by recent clock cleanup ARM: OMAP3: hwmod data: keep MIDLEMODE in force-standby for musb ARM: OMAP4: clock data: lock USB DPLL on boot ARM: OMAP1: fix USB host on 1710 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | | * | | | | | | | ARM: OMAP: clocks: Delay clk inits atleast until slab is initializedRajendra Nayak2013-03-263-6/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk inits on OMAP happen quite early, even before slab is available. The dependency comes from the fact that the timer init code starts to use clocks and hwmod and we need clocks to be initialized by then. There are various problems doing clk inits this early, one is, not being able to do dynamic clk registrations and hence the dependency on clk-private.h. The other is, inability to debug early kernel crashes without enabling DEBUG_LL and earlyprintk. Doing early clk init also exposed another instance of a kernel panic due to a BUG() when CONFIG_DEBUG_SLAB is enabled. [ 0.000000] Kernel BUG at c01174f8 [verbose debug info unavailable] [ 0.000000] Internal error: Oops - BUG: 0 [#1] SMP ARM [ 0.000000] Modules linked in: [ 0.000000] CPU: 0 Not tainted (3.9.0-rc1-12179-g72d48f9 #6) [ 0.000000] PC is at __kmalloc+0x1d4/0x248 [ 0.000000] LR is at __clk_init+0x2e0/0x364 [ 0.000000] pc : [<c01174f8>] lr : [<c0441f54>] psr: 600001d3 [ 0.000000] sp : c076ff28 ip : c065cefc fp : c0441f54 [ 0.000000] r10: 0000001c r9 : 000080d0 r8 : c076ffd4 [ 0.000000] r7 : c074b578 r6 : c0794d88 r5 : 00000040 r4 : 00000000 [ 0.000000] r3 : 00000000 r2 : c07cac70 r1 : 000080d0 r0 : 0000001c [ 0.000000] Flags: nZCv IRQs off FIQs off Mode SVC_32 ISA ARM Segment kernel [ 0.000000] Control: 10c53c7d Table: 8000404a DAC: 00000017 [ 0.000000] Process swapper (pid: 0, stack limit = 0xc076e240) [ 0.000000] Stack: (0xc076ff28 to 0xc0770000) [ 0.000000] ff20: 22222222 c0794ec8 c06546e8 00000000 00000040 c0794d88 [ 0.000000] ff40: c074b578 c076ffd4 c07951c8 c076e000 00000000 c0441f54 c074b578 c076ffd4 [ 0.000000] ff60: c0793828 00000040 c0794d88 c074b578 c076ffd4 c0776900 c076e000 c07272ac [ 0.000000] ff80: 2f800000 c074c968 c07f93d0 c0719780 c076ffa0 c076ff98 00000000 00000000 [ 0.000000] ffa0: 00000000 00000000 00000000 00000001 c074cd6c c077b1ec 8000406a c0715724 [ 0.000000] ffc0: 00000000 00000000 00000000 00000000 00000000 c074c968 10c53c7d c0776974 [ 0.000000] ffe0: c074cd6c c077b1ec 8000406a 411fc092 00000000 80008074 00000000 00000000 [ 0.000000] [<c01174f8>] (__kmalloc+0x1d4/0x248) from [<c0441f54>] (__clk_init+0x2e0/0x364) [ 0.000000] [<c0441f54>] (__clk_init+0x2e0/0x364) from [<c07272ac>] (omap4xxx_clk_init+0xbc/0x140) [ 0.000000] [<c07272ac>] (omap4xxx_clk_init+0xbc/0x140) from [<c0719780>] (setup_arch+0x15c/0x284) [ 0.000000] [<c0719780>] (setup_arch+0x15c/0x284) from [<c0715724>] (start_kernel+0x7c/0x334) [ 0.000000] [<c0715724>] (start_kernel+0x7c/0x334) from [<80008074>] (0x80008074) [ 0.000000] Code: e5883004 e1a00006 e28dd00c e8bd8ff0 (e7f001f2) [ 0.000000] ---[ end trace 1b75b31a2719ed1c ]--- [ 0.000000] Kernel panic - not syncing: Attempted to kill the idle task! It was a know issue, that slab allocations would fail when common clock core tries to cache parent pointers for mux clocks on OMAP, and hence a patch 'clk: Allow late cache allocation for clk->parents, commit 7975059d' was added to work this problem around. A BUG() within kmalloc() with CONFIG_DEBUG_SLAB enabled was completely overlooked causing this regression. More details on the issue reported can be found here, http://www.mail-archive.com/linux-omap@vger.kernel.org/msg85932.html With all these issues around clk inits happening way too early, it makes sense to at least move them to a point where dynamic memory allocations are possible. So move them to a point just before the timer code starts using clocks and hwmod. This should at least pave way for clk inits on OMAP moving to dynamic clock registrations instead of using the static macros defined in clk-private.h. The issue with kernel panic while CONFIG_DEBUG_SLAB is enabled was reported by Piotr Haber and Tony Lindgren and this patch fixes the reported issue as well. Reported-by: Piotr Haber <phaber@broadcom.com> Reported-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Mike Turquette <mturquette@linaro.org> Acked-by: Paul Walmsley <paul@pwsan.com> Cc: stable@vger.kernel.org # v3.8 Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | | | | | | | Merge tag 'omap-fixes-a-for-3.9-rc' of ↵Tony Lindgren2013-03-196-16/+45
| | | |\ \ \ \ \ \ \ \ | | | | |/ / / / / / / | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.9-rc3/fixes Miscellaneous OMAP fixes for v3.9-rc. These primarily deal with OMAP2+ power management regressions. There's also a fix for the OMAP1 OHCI controller. Basic build, boot, and PM test logs are at: http://www.pwsan.com/omap/testlogs/fixes_a_3.9-rc/20130314101856/
| | | | * | | | | | | ARM: OMAP4: PM: fix PM regression introduced by recent clock cleanupPaul Walmsley2013-03-132-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 17b7e7d33530e2bbd3bdc90f4db09b91cfdde2bb ("ARM: OMAP4: clock/hwmod data: start to remove some IP block control "clocks"") introduced a regression preventing the L3INIT clockdomain of OMAP4 systems from entering idle. This in turn prevented these systems from entering full chip clock-stop. The regression was caused by the incorrect removal of a so-called "optional functional clock" from the OMAP4 clock data. This wasn't caught for two reasons. First, I missed the retention entry failure in the branch test logs: http://www.pwsan.com/omap/testlogs/cleanup_a_3.9/20130126014242/pm/4460pandaes/4460pandaes_log.txt Second, the integration data for the OCP2SCP PHY IP block, added by commit 0c6688753f9912c6a7013549ec31c8844020bbc1 ("ARM: OMAP4: hwmod data: add remaining USB-related IP blocks"), should have associated this clock with the IP block, but did not. Fix by adding back the so-called "optional" functional clock to the clock data, and by linking that clock to the OCP2SCP PHY IP block integration hwmod data. The problem patch was discovered by J, Keerthy <j-keerthy@ti.com>. Cc: Keerthy <j-keerthy@ti.com> Cc: Benoît Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | | | * | | | | | | ARM: OMAP3: hwmod data: keep MIDLEMODE in force-standby for musbGrazvydas Ignotas2013-03-133-5/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For some unknown reason, allowing hwmod to control MIDLEMODE causes core_pwrdm to not hit idle states for musb in DM3730 at least. I've verified that setting any MIDLEMODE value other than "force standby" before enabling the device causes subsequent suspend attempts to fail with core_pwrdm not entering idle states, even if the driver is unloaded and "force standby" is restored before suspend attempt. To recover from this, soft reset can be used, but that's not suitable solution for suspend. Keeping the register set at force standby (reset value) makes it work and device still functions properly, as musb has driver-controlled OTG_FORCESTDBY register that controls MSTANDBY signal. Note that TI PSP kernels also have similar workarounds. This patch also fixes HWMOD_SWSUP_MSTANDBY documentation to match the actual flag name. Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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