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* ARM: mach-shmobile: kzm9g: defconfig updateKuninori Morimoto2012-05-121-7/+17
| | | | | | | | | | | This patch enable GPIO-KEY/FSI, and remove debug settings, and be cleanuped by c2330e286f68f1c408b4aa6515ba49d57f05beae script Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Simon Horman <horms@verge.net.au> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* ARM: mach-shmobile: kzm9g: add PCF8757 gpio-keyKuninori Morimoto2012-05-121-0/+59
| | | | | | | | | | This patch adds extra GPIO via PCF8757 chip, and use it as gpio-key. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Simon Horman <horms@verge.net.au> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* ARM: mach-shmobile: kzm9g: add SDHI supportKuninori Morimoto2012-05-121-0/+57
| | | | | | | Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Simon Horman <horms@verge.net.au> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* ARM: mach-shmobile: kzm9g: add MMCIF supportKuninori Morimoto2012-05-121-0/+49
| | | | | | | Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Simon Horman <horms@verge.net.au> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* ARM: mach-shmobile: kzm9g: correct screen directionKuninori Morimoto2012-05-121-1/+3
| | | | | | | | | | The correct screen direction of KZM9G board needs PORT226/SC settings. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Simon Horman <horms@verge.net.au> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* ARM: mach-shmobile: sh73a0.h: add GPIO_NRKuninori Morimoto2012-05-121-0/+3
| | | | | | | | | | GPIO_NR is added in order to clarify end of GPIO array. We can add extra GPIO from it. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Simon Horman <horms@verge.net.au> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* ARM: mach-shmobile: pfc-sh73a0: fixup MSEL2CR MSEL18 for I2C-3Kuninori Morimoto2012-05-121-2/+2
| | | | | | | | | MSEL2CR MSEL18 should be 1 if I2C-3 Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Simon Horman <horms@verge.net.au> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* ARM: mach-shmobile: kzm9g: add ST1232 Touchscreen supportKuninori Morimoto2012-05-121-0/+14
| | | | | | | Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Simon Horman <horms@verge.net.au> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* ARM: mach-shmobile: kzm9g: add LCDC supportKuninori Morimoto2012-05-121-0/+143
| | | | | | | | | | | AS3711 chip initalization is required for enabling LCDC backlight, but there is no driver for this chip. So, this patch sends its settings when boot. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Simon Horman <horms@verge.net.au> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* ARM: mach-shmobile: kzm9g: add external USB Host supportKuninori Morimoto2012-05-121-0/+31
| | | | | | | | | | This patch uses r8a66597_hcd driver, since renesas_usbhs driver doesn't support external R8A66597 chip. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Simon Horman <horms@verge.net.au> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* ARM: mach-shmobile: kzm9g: add SMSC 9221 supportKuninori Morimoto2012-05-121-0/+39
| | | | | | | Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Simon Horman <horms@verge.net.au> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* ARM: mach-shmobile: kzm9g: add defconfigKuninori Morimoto2012-05-121-0/+127
| | | | | | | Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Simon Horman <horms@verge.net.au> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* ARM: mach-shmobile: add KZM-A9-GT board supportKuninori Morimoto2012-05-123-0/+66
| | | | | | | | | This adds very basic KZM-A9-GT board (SH73a0) support Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Simon Horman <horms@verge.net.au> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* ARM: mach-shmobile: clock-r8a7740: use followparent_recalc on usb24sKuninori Morimoto2012-05-121-6/+1
| | | | | | | | | | | If the clocks is always same value as the parent clock, we can use followparent_recalc() for .recalc Reported-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Simon Horman <horms@verge.net.au> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* ARM: mach-shmobile: clock-r8a7740: add MMCIF clockKuninori Morimoto2012-05-121-1/+3
| | | | | | | Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Simon Horman <horms@verge.net.au> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* ARM: mach-shmobile: clock-r8a7740: add SDHI clockKuninori Morimoto2012-05-121-1/+9
| | | | | | | Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Simon Horman <horms@verge.net.au> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* ARM: mach-shmobile: clock-r8a7740: add USB clockKuninori Morimoto2012-05-121-2/+116
| | | | | | | | | | | R8A7740 USB needs many clocks for workaround, and it has confusing name "usb24s" and "usb24". This "usb24s" will be used by other clocks. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Simon Horman <horms@verge.net.au> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* ARM: mach-shmobile: clock-r8a7740: add FSI clockKuninori Morimoto2012-05-121-1/+3
| | | | | | Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* ARM: mach-shmobile: r8a7740: cleanup I2C workaround methodKuninori Morimoto2012-05-121-6/+6
| | | | | | | | | | | Current workaround of I2C on r8a7740 used mdelay(), but it was an overkill. This patch cleans up the workaround delay. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Simon Horman <horms@verge.net.au> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* ARM: mach-shmobile: r8a7740: add gpio_irq supportKuninori Morimoto2012-05-121-0/+39
| | | | | | | Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Simon Horman <horms@verge.net.au> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* ARM: mach-shmobile: sh7372: Add FSI DMAEngine supportKuninori Morimoto2012-05-122-0/+12
| | | | | | | Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Simon Horman <horms@verge.net.au> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* ARM / mach-shmobile: Use preset_lpj with calibrate_delay()Magnus Damm2012-05-121-1/+2
| | | | | | | | | | | | | | | | | | | | Update the mach-shmobile shared delay calibration code for late timers. All existing in-tree non-DT socs are however using early timers today and they are unaffected by this change. The patch modifies shmobile_setup_delay() from using lpj_fine to preset_lpj. This change allows us to preset the worst case loops-per-jiffy value to all CPU cores on the system. The old code which made use of lpj_fine did not affect the secondary CPU cores which made it impossible to boot on SMP without early timers. Needed for SMP SoCs using late timers like EMEV2 or any other mach-shmobile SMP SoC that makes use of late timers via DT. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* Merge branch 'renesas-dt' into renesas-soc-coreRafael J. Wysocki2012-05-127-13/+155
|\ | | | | | | | | | | | | | | | | | | * renesas-dt: ARM: mach-shmobile: sh7372 generic board support via DT V2 ARM: mach-shmobile: Rework sh7372 INTCS demuxer V2 ARM: mach-shmobile: Use INTC_IRQ_PINS_16H on sh7372 ARM: mach-shmobile: Use 0x3400 as INTCS vector offset ARM: mach-shmobile: Introduce INTC_IRQ_PINS_16H ARM: mach-shmobile: Introduce shmobile_setup_delay()
| * ARM: mach-shmobile: sh7372 generic board support via DT V2Magnus Damm2012-04-112-0/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add generic DT board support for the sh7372 SoC V2. SCIF serial ports and timers are kept as regular platform devices. Other on-chip and on-board devices should be configured via the device tree. Tested on the mackerel board via kexec using a zImage kernel with an appended dtb. At this point there is no interrupt controller support in place but such code will be added over time when proper IRQ domain support has been added to INTC. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
| * ARM: mach-shmobile: Rework sh7372 INTCS demuxer V2Magnus Damm2012-04-111-9/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is the sh7372 INTC demux rework V2. Updates the sh7372 INTCS demuxer to not hook into the INTCA interrupt controller. The mask register for the chained INTCS interrupt source happens to be located in the INTCS register range instead of the INTCA as expected. To allow each INTCA and INTCS interrupt controller to work in their own IRQ range this patch moves the INTCS vector away. Needed for future IRQ domain support. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
| * ARM: mach-shmobile: Use INTC_IRQ_PINS_16H on sh7372Magnus Damm2012-04-111-3/+8
| | | | | | | | | | | | | | | | | | | | Use INTC_IRQ_PINS_16H on sh7372 to have two separate interrupt controllers for the external IRQ pins. This is preparation work for future IRQ domain support. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
| * ARM: mach-shmobile: Use 0x3400 as INTCS vector offsetMagnus Damm2012-04-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update mach-shmobile to use 0x3400 as INTCS_VECT_BASE. Since the ARM architecture a little while back added support for 10 bit irqs we can now undo the previously merged commit 9b7c23adb350a108737a993c9c781463c1439dc6 and use 0x3400 as INTCS vector base. This change is necessary to avoid overlapping of interrupt ranges so separate IRQ domains can be used for different INTC instances. Without this fix the vectors used by various INTC instances are overlapping on for instance sh7372 which works at the moment but breaks upcoming IRQ domain support. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
| * ARM: mach-shmobile: Introduce INTC_IRQ_PINS_16HMagnus Damm2012-04-111-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add INTC_IRQ_PINS_16H to allow broken out support of the the high 16 external interrupt pins. On SoCs with 32 external interrupt pins the interrupt vectors for the low 16 and the high 16 interrupt pins are sparesly populated. The low 16 are at 0x0200 and high 16 are at 0x3200 which with current macros results in a separation of 384 linux interrupts. This sparse population makes it unsuitable with a single IRQ domain to cover the full IRQ range, so this macro breaks out the 32 pins into two separate 16 bit controllers to allow two independent INTC instances with two separate IRQ domains. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
| * ARM: mach-shmobile: Introduce shmobile_setup_delay()Magnus Damm2012-04-112-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | Add the function shmobile_setup_delay() to let platforms configure their maximum loops per jiffy delay. With this jiffies calculation done the dependency on early timer is removed. In the future this allows us to assign timers using the regular driver model via the device tree. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* | ARM / mach-shmobile: Invalidate caches when booting secondary coresMagnus Damm2012-05-121-1/+55
| | | | | | | | | | | | | | | | | | | | | | | | Make sure L1 caches are invalidated when booting secondary cores. Needed to boot all mach-shmobile SMP systems that are using Cortex-A9 including sh73a0, r8a7779 and EMEV2. Thanks to imx and tegra guys for actual code. Signed-off-by: Magnus Damm <damm@opensource.se> Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* | ARM / mach-shmobile: sh73a0 SMP TWD boot regression fixKuninori Morimoto2012-05-124-11/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix SMP TWD boot regression on sh73a0 based platforms caused by: 4200b16 ARM: shmobile: convert to twd_local_timer_register() interface After the merge of the above commit it has been impossible to boot sh73a0 based SoCs with SMP enabled and CONFIG_HAVE_ARM_TWD=y. The kernel crashes at smp_init_cpus() timing which is before the console has been initialized, so to the user this looks like a kernel lock up without any particular error message. This patch fixes the regression on sh73a0 by moving the TWD registration code from smp_init_cpus() to sys_timer->init() time. This patch removed shmobile_twd_init() which is no longer needed Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* | ARM / mach-shmobile: r8a7779 SMP TWD boot regression fixMagnus Damm2012-05-123-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix SMP TWD boot regression on r8a7779 based platforms caused by: 4200b16 ARM: shmobile: convert to twd_local_timer_register() interface After the merge of the above commit it has been impossible to boot r8a7779 based SoCs with SMP enabled and CONFIG_HAVE_ARM_TWD=y. The kernel crashes at smp_init_cpus() timing which is before the console has been initialized, so to the user this looks like a kernel lock up without any particular error message. This patch fixes the regression on r8a7779 by moving the TWD registration code from smp_init_cpus() to sys_timer->init() time. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* | ARM: mach-shmobile: convert ag5evm to use the generic MMC GPIO hotplug helperGuennadi Liakhovetski2012-05-121-20/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This also fixes the following modular mmc build failure: arch/arm/mach-shmobile/built-in.o: In function `mackerel_sdhi0_gpio_cd': pfc-sh7372.c:(.text+0x1138): undefined reference to `mmc_detect_change' on this platform by eliminating the use of an inline function, which calls into the mmc core. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Reviewed-by: Simon Horman <horms@verge.net.au> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* | ARM: mach-shmobile: convert mackerel to use the generic MMC GPIO hotplug helperGuennadi Liakhovetski2012-05-121-20/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This also fixes the following modular mmc build failure: arch/arm/mach-shmobile/built-in.o: In function `ag5evm_sdhi0_gpio_cd': pfc-sh73a0.c:(.text+0x7c0): undefined reference to `mmc_detect_change' on this platform by eliminating the use of an inline function, which calls into the mmc core. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Tested-by: Simon Horman <horms@verge.net.au> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* | Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds2012-04-3014-88/+188
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM fixes from Russell King. * 'fixes' of git://git.linaro.org/people/rmk/linux-arm: ARM: 7406/1: hotplug: copy the affinity mask when forcefully migrating IRQs ARM: 7405/1: kexec: call platform_cpu_kill on the killer rather than the victim ARM: 7403/1: tls: remove covert channel via TPIDRURW ARM: 7401/1: mm: Fix section mismatches ARM: OMAP: fix DMA vs memory ordering ARM: 7390/1: dts: versatile-pb/ab fix MMC IRQs ARM: 7400/1: vfp: clear fpscr length and stride bits on entry to sig handler ARM: 7399/1: vfp: move user vfp state save/restore code out of signal.c ARM: 7398/1: l2x0: only write to debug registers on PL310 ARM: 7397/1: l2x0: only apply workaround for erratum #753970 on PL310 ARM: 7396/1: errata: only handle ARM erratum #326103 on affected cores
| * | ARM: 7406/1: hotplug: copy the affinity mask when forcefully migrating IRQsWill Deacon2012-04-281-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a CPU is hotplugged off, we migrate any IRQs currently affine to it away and onto another online CPU by calling the irq_set_affinity function of the relevant interrupt controller chip. This function returns either IRQ_SET_MASK_OK or IRQ_SET_MASK_OK_NOCOPY, to indicate whether irq_data.affinity was updated. If we are forcefully migrating an interrupt (because the affinity mask no longer identifies any online CPUs) then we should update the IRQ affinity mask to reflect the new CPU set. Failure to do so can potentially leave /proc/irq/n/smp_affinity identifying only offline CPUs, which may confuse userspace IRQ balancing daemons. This patch updates migrate_one_irq to copy the affinity mask when the interrupt chip returns IRQ_SET_MASK_OK after forcefully changing the affinity of an interrupt. Cc: stable@vger.kernel.org Reported-by: Leif Lindholm <leif.lindholm@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7405/1: kexec: call platform_cpu_kill on the killer rather than the victimWill Deacon2012-04-281-11/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When performing a kexec on an SMP system, the secondary cores are stopped by calling machine_shutdown(), which in turn issues IPIs to offline the other CPUs. Unfortunately, this isn't enough to reboot the cores into a new kernel (since they are just executing a cpu_relax loop somewhere in memory) so we make use of platform_cpu_kill, part of the CPU hotplug implementation, to place the cores somewhere safe. This function expects to be called on the killing CPU for each core that it takes out. This patch moves the platform_cpu_kill callback out of the IPI handler and into smp_send_stop, therefore ensuring that it executes on the killing CPU rather than on the victim, matching what the hotplug code requires. Cc: stable@vger.kernel.org Reported-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7403/1: tls: remove covert channel via TPIDRURWWill Deacon2012-04-281-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TPIDRURW is a user read/write register forming part of the group of thread registers in more recent versions of the ARM architecture (~v6+). Currently, the kernel does not touch this register, which allows tasks to communicate covertly by reading and writing to the register without context-switching affecting its contents. This patch clears TPIDRURW when TPIDRURO is updated via the set_tls macro, which is called directly from __switch_to. Since the current behaviour makes the register useless to userspace as far as thread pointers are concerned, simply clearing the register (rather than saving and restoring it) will not cause any problems to userspace. Cc: stable@vger.kernel.org Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7401/1: mm: Fix section mismatchesStephen Boyd2012-04-282-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | WARNING: vmlinux.o(.text+0x111b8): Section mismatch in reference from the function arm_memory_present() to the function .init.text:memory_present() The function arm_memory_present() references the function __init memory_present(). This is often because arm_memory_present lacks a __init annotation or the annotation of memory_present is wrong. WARNING: arch/arm/mm/built-in.o(.text+0x1edc): Section mismatch in reference from the function alloc_init_pud() to the function .init.text:alloc_init_section() The function alloc_init_pud() references the function __init alloc_init_section(). This is often because alloc_init_pud lacks a __init annotation or the annotation of alloc_init_section is wrong. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: OMAP: fix DMA vs memory orderingRussell King2012-04-231-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using coherent DMA memory with the OMAP DMA engine results in unpredictable behaviour due to memory ordering issues; as things stand, there is no guarantee that data written to coherent DMA memory will be visible to the DMA hardware. This is because the OMAP dma_write() accessor contains no barriers, necessary on ARMv6 and above. The effect of this can be seen in comments in the OMAP serial driver, which incorrectly talks about cache flushing for the coherent DMA stuff. Rather than adding barriers to the accessors, add it in the DMA support code just before we enable DMA, and just after we disable DMA. This avoids having barriers for every DMA register access. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7390/1: dts: versatile-pb/ab fix MMC IRQsLinus Walleij2012-04-232-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MMCI driver will not work without two IRQs since this is not flagged as a single-irq variant. Looking through the complex IRQ definition for the MMCI on the versatile (including an #if 1 statement forcing MMCI IRQ0 to the VIC) this appears to the the correct IRQ number for both models. Cc: Niklas Hernaeus <niklas.hernaeus@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7400/1: vfp: clear fpscr length and stride bits on entry to sig handlerWill Deacon2012-04-231-1/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM PCS mandates that the length and stride bits of the fpscr are cleared on entry to and return from a public interface. Although signal handlers run asynchronously with respect to the interrupted function, the handler itself expects to run as though it has been called like a normal function. This patch updates the state mirroring the VFP hardware before entry to a signal handler so that it adheres to the PCS. Furthermore, we disable VFP to ensure that we trap on any floating point operation performed by the signal handler and synchronise the hardware appropriately. A check is inserted after the signal handler to avoid redundant flushing if VFP was not used. Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7399/1: vfp: move user vfp state save/restore code out of signal.cWill Deacon2012-04-233-51/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The user VFP state must be preserved (subject to ucontext modifications) across invocation of a signal handler and this is currently handled by vfp_{preserve,restore}_context in signal.c Since this code requires intimate low-level knowledge of the VFP state, this patch moves it into vfpmodule.c. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7398/1: l2x0: only write to debug registers on PL310Will Deacon2012-04-231-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PL310 errata #588369 and #727915 require writes to the debug registers of the cache controller to work around known problems. Writing these registers on L220 may cause deadlock, so ensure that we only perform this operation when we identify a PL310 at probe time. Cc: stable@vger.kernel.org Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7397/1: l2x0: only apply workaround for erratum #753970 on PL310Will Deacon2012-04-231-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The workaround for PL310 erratum #753970 can lead to deadlock on systems with an L220 cache controller. This patch makes the workaround effective only when the cache controller is identified as a PL310 at probe time. Cc: stable@vger.kernel.org Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7396/1: errata: only handle ARM erratum #326103 on affected coresWill Deacon2012-04-232-6/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Erratum #326103 ("FSR write bit incorrect on a SWP to read-only memory") only affects the ARM 1136 core prior to r1p0. The workaround disassembles the faulting instruction to determine whether it was a read or write access on all v6 cores. An issue has been reported on the ARM 11MPCore whereby loading the faulting instruction may happen in parallel with that page being unmapped, resulting in a deadlock due to the lack of TLB broadcasting in hardware: http://lists.infradead.org/pipermail/linux-arm-kernel/2012-March/091561.html This patch limits the workaround so that it is only used on affected cores, which are known to be UP only. Other v6 cores can rely on the FSR to indicate the access type correctly. Cc: stable@vger.kernel.org Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | Merge tag 'fixes-for-linus' of ↵Linus Torvalds2012-04-2819-140/+207
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "Nothing controversial, just another batch of fixes: - Samsung/exynos fixes for more merge window fallout: build errors and warnings mostly, but also some clock/device setup issues on exynos4/5 - PXA bug and warning fixes related to gpio and pinmux - IRQ domain conversion bugfixes for U300 and MSM - A regulator setup fix for U300" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: PXA2xx: MFP: fix potential direction bug ARM: PXA2xx: MFP: fix bug with MFP_LPM_KEEP_OUTPUT arm/sa1100: fix sa1100-rtc memory resource ARM: pxa: fix gpio wakeup setting ARM: SAMSUNG: add missing MMC_CAP2_BROKEN_VOLTAGE capability ARM: EXYNOS: Fix compilation error when CONFIG_OF is not defined ARM: EXYNOS: Fix resource on dev-dwmci.c ARM: S3C24XX: Fix build warning for S3C2410_PM ARM: mini2440_defconfig: Fix build error ARM: msm: Fix gic irqdomain support ARM: EXYNOS: Fix incorrect initialization of GIC ARM: EXYNOS: use 'exynos4-sdhci' as device name for sdhci controllers ARM: u300: bump all IRQ numbers by one ARM: ux300: Fix unimplementable regulation constraints
| * \ \ Merge branch 'v3.4-samsung-fixes-3' of ↵Olof Johansson2012-04-2710-39/+78
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes * 'v3.4-samsung-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: SAMSUNG: add missing MMC_CAP2_BROKEN_VOLTAGE capability ARM: EXYNOS: Fix compilation error when CONFIG_OF is not defined ARM: EXYNOS: Fix resource on dev-dwmci.c ARM: S3C24XX: Fix build warning for S3C2410_PM ARM: mini2440_defconfig: Fix build error ARM: EXYNOS: Fix incorrect initialization of GIC ARM: EXYNOS: use 'exynos4-sdhci' as device name for sdhci controllers
| | * | | ARM: SAMSUNG: add missing MMC_CAP2_BROKEN_VOLTAGE capabilityMarek Szyprowski2012-04-243-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 6e8201f57c935 "mmc: core: add the capability for broken voltage" introduced a new quirk to indicate that MMC core should ignore voltage change errors reported by the regulators core. This is required to get SDHCI working on UniversalC210, NURI and GONI boards again after commit ceb6143b2df81c ("mmc: sdhci: fix vmmc handling"). Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | ARM: EXYNOS: Fix compilation error when CONFIG_OF is not definedTushar Behera2012-04-241-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixed following compile time error. arch/arm/mach-exynos/common.c: In function 'exynos5_init_irq': arch/arm/mach-exynos/common.c:539:2: error: implicit declaration of function 'of_irq_init' arch/arm/mach-exynos/common.c:539:14: error: 'exynos4_dt_irq_match' undeclared (first use in this function) arch/arm/mach-exynos/common.c:539:14: note: each undeclared identifier is reported only once for each function it appears in Cc: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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