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* ARM: imx: merge plat-mxc into mach-imxShawn Guo2012-10-151-224/+0
| | | | | | | | | | | | | It's really unnecessary to have plat-mxc, and let's merge it into mach-imx. It's pretty much just a bunch of file renaming and Kconfig/Makefile merge. To make the change less invasive, we keep using Kconfig symbol CONFIG_ARCH_MXC for mach-imx sub-architecture. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Arnd Bergmann <arnd@arndb.de>
* ARM: mxc: Include missing irqs.h headerFabio Estevam2012-07-281-0/+1
| | | | | | | | | | Include irqs.h in order to fix the following build error: arch/arm/plat-mxc/tzic.c:195:11: error: 'FIQ_START' undeclared (first use in this function) Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* Merge tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2012-07-231-0/+4
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull arm-soc power management changes from Arnd Bergmann: "These are various power management related changes, mainly concerning cpuidle on i.MX and OMAP, as well as a the move of the omap smartreflex driver to live in the power subsystem." Fix up conflicts in arch/arm/mach-{imx/mach-imx6q.c,omap2/prm2xxx_3xxx.h} * tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (37 commits) ARM: OMAP2+: PM: fix IRQ_NOAUTOEN removal by mis-merge ARM: OMAP2+: do not allow SmartReflex to be built as a module ARM: OMAP2: Use hwmod to initialize mmc for 2420 ARM: OMAP3: PM: cpuidle: optimize the clkdm idle latency in C1 state ARM: OMAP3: PM: cpuidle: optimize the PER latency in C1 state ARM: OMAP3: PM: cpuidle: default to C1 in next_valid_state ARM: OMAP3: PM: cleanup cam_pwrdm leftovers ARM: OMAP3: PM: call pre/post transition per powerdomain ARM: OMAP2+: powerdomain: allow pre/post transtion to be per pwrdm ARM: OMAP3: PM: Remove IO Daisychain control from cpuidle ARM: OMAP3PLUS: hwmod: reconfigure IO Daisychain during hwmod mux ARM: OMAP3+: PRM: Enable IO wake up ARM: OMAP4: PRM: Add IO Daisychain support ARM: OMAP3: PM: Move IO Daisychain function to omap3 prm file ARM: OMAP3: PM: correct enable/disable of daisy io chain ARM: OMAP2+: PRM: fix compile for OMAP4-only build W1: OMAP HDQ1W: use runtime PM ARM: OMAP2+: HDQ1W: use omap_device W1: OMAP HDQ1W: use 32-bit register accesses W1: OMAP HDQ1W: allow driver to be built on all OMAP2+ ...
| * ARM: imx: Add comments to tzic_enable_waker()Robert Lee2012-06-051-0/+4
| | | | | | | | | | | | | | | | Add additional comments to the tzic_enable_wake() funciton to clarify its intended usage. Signed-off-by: Robert Lee <rob.lee@linaro.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: fiq: change FIQ_START to a variableShawn Guo2012-07-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit a2be01b (ARM: only include mach/irqs.h for !SPARSE_IRQ) makes mach/irqs.h only be included for !SPARSE_IRQ build. There are a nubmer of platforms have FIQ_START defined in mach/irqs.h for FIQ support. arch/arm/mach-rpc/include/mach/irqs.h:#define FIQ_START 64 arch/arm/mach-s3c24xx/include/mach/irqs.h:#define FIQ_START IRQ_EINT0 arch/arm/plat-mxc/include/mach/irqs.h:#define FIQ_START 0 If SPARSE_IRQ is enabled for any of these platforms, the following compile error will be seen. arch/arm/kernel/fiq.c: In function ‘enable_fiq’: arch/arm/kernel/fiq.c:127:19: error: ‘FIQ_START’ undeclared (first use in this function) arch/arm/kernel/fiq.c:127:19: note: each undeclared identifier is reported only once for each function it appears in arch/arm/kernel/fiq.c: In function ‘disable_fiq’: arch/arm/kernel/fiq.c:132:20: error: ‘FIQ_START’ undeclared (first use in this function) The patch changes fiq code to have init_FIQ take FIQ_START from platforms as a parameter and assign it to variable fiq_start which is to replace FIQ_START uses in enable_fiq/disable_fiq. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Rob Herring <rob.herring@calxeda.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: imx: move irq_domain_add_legacy call into tzic driverShawn Guo2012-07-011-8/+20
|/ | | | | | | | | | | | | | Move irq_domain_add_legacy call from imx5*-dt.c into tzic init function and have the tzic driver adopt irqdomain support for both DT and non-DT boot. Now tzic init function calls irq_alloc_descs to get irq_base and adds a lenacy irqdomain with the irq_base, so that the mapping between tzic irq and Linux irq number can be handled by irqdomain. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
* ARM: mx5: use generic irq chip pm interface for pm functions onHui Wang2011-12-251-11/+29
| | | | | | | | | | | | | | | | | | Two problems exist in the current i.MX5 pm suspend/resume and idle functions. The first is the current i.MX5 suspend routine will call tzic_enable_wake(1) to set wake source, this will set all enabled irq as wake source rather than those wake capable. The second is i.MX5 idle will call mx5_cpu_lp_set() to prepare enter low power mode, but it forgets to call wfi instruction to enter this mode. To fix these two problems, using generic irq chip pm interface and modify function imx5_idle(). [Tested by Shawn Guo on imx51 babbage board. Tested by Hui Wang on imx51 pdk board.] Signed-off-by: Hui Wang <jason77.wang@gmail.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM:i.MX: fix build error in tzic/avic.cJason Liu2011-11-041-0/+1
| | | | | | arch/arm/plat-mxc/tzic.c:105: error: expected '=', ',', ';', 'asm' or '__attribute__' before 'tzic_handle_irq' Signed-off-by: Jason Liu <jason.hui@linaro.org>
*-. Merge branches 'features/assorted', 'features/imx-pata' and ↵Sascha Hauer2011-09-291-2/+30
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | 'features/imx-multi-irq-v2' into imx-features Conflicts: arch/arm/plat-mxc/avic.c arch/arm/plat-mxc/include/mach/common.h Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * ARM i.MX tzic: add handle_irq functionSascha Hauer2011-09-261-1/+23
| |/ |/| | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM i.MX avic: convert to use generic irq chipHui Wang2011-09-231-1/+7
|/ | | | | | | | | | | | | | Convert i.MX avic irq handler to use generic irq chip. This not only provides a cleanup implementation of irq chip handler, but also implements suspend/resume interface with the help of generic irq chip interface. Change mxc_irq_chip to a new structure mxc_extra_irq to handle fiq and priority functions. Signed-off-by: Hui Wang <jason77.wang@gmail.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: mxc: convert tzic to use generic irq chipShawn Guo2011-07-071-72/+25
| | | | | | | | The patch converts mxc tzic interrupt controller to use generic irq chip. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX tzic: do not depend on MXC_INTERNAL_IRQSSascha Hauer2011-07-071-1/+3
| | | | | | This becomes meaningless in subsequent patches. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arm: Fold irq_set_chip/irq_set_handlerThomas Gleixner2011-03-291-2/+2
| | | | | | Use irq_set_chip_and_handler() instead. Converted with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* arm: Cleanup the irq namespaceThomas Gleixner2011-03-291-2/+2
| | | | | | Convert to the new function names. Automated with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* ARM: plat-mxc: irq_data conversion.Lennert Buytenhek2011-01-131-19/+19
| | | | Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
* mx51: support FIQ on TZIC, revisedPeter Horton2010-12-141-7/+39
| | | | | | | | | | | Add support for FIQ on mx51 TZIC TZIC changes tested with FIQ audio on an mx51 board AVIC changes build with mx3_defconfig, not tested Signed-off-by: Peter Horton <phorton@bitbox.co.uk> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mxc/tzic: add base address when accessing TZIC registersJason Wang2010-08-211-2/+3
| | | | | | | | | When we call tzic_enable_wake function, the kernel will crash because of access to an unmapped address. This is because two register access operations forgot to add base address. Signed-off-by: Jason Wang <jason77.wang@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: imx: get rid of mxc_gpio_initUwe Kleine-König2010-06-241-2/+0
| | | | | | | This function is defined once for each imx family and so is in the way when compiling a kernel for more than one SoC. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
* mx5: Add registration of GPIOs for MX5 devicesDinh Nguyen2010-04-221-1/+3
| | | | | | | | Register the gpio irqs on Freescale's MX51 Babbage HW. Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com> Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mxc: TrustZone interrupt controller (TZIC) for Freescale i.MX5 familyAmit Kucheria2010-02-091-0/+172
Freescale i.MX51 processor uses a new interrupt controller. Add driver for TrustZone Interrupt Controller Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com>
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